coreboot-gerrit January 2024

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[main]: src/soc/amd/glinda: Update the PCIE MMCONFIG base address and size
by ANAND VAIKAR (Code Review) 14 Jan '24

14 Jan '24

Attention is currently required from: Anand Vaikar, Felix Held, Fred Reitberger, Nikolai Vyssotski, ritul guru. ANAND VAIKAR has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79832?usp=email ) Change subject: src/soc/amd/glinda: Update the PCIE MMCONFIG base address and size ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/79832/comment/b012f32c_530a72e4 : PS1, Line 7: for glinda > i'd drop the 'for glinda' at the end so that everything fits into the 72 chars of the first line. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/79832?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifa8377df7a2973a88d414c217b5ed114c8ae5cc3 Gerrit-Change-Number: 79832 Gerrit-PatchSet: 2 Gerrit-Owner: Anand Vaikar <a.vaikar2021(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ritul guru <ritul.bits(a)gmail.com> Gerrit-CC: ANAND VAIKAR <a.vaikar1987(a)gmail.com> Gerrit-Attention: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Attention: Anand Vaikar <a.vaikar2021(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Sun, 14 Jan 2024 05:56:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: [RFC] region: Introduce region_create() functions
by Maximilian Brune (Code Review) 14 Jan '24

14 Jan '24

Attention is currently required from: Jérémy Compostella, Martin L Roth, Nico Huber. Maximilian Brune has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79905?usp=email ) Change subject: [RFC] region: Introduce region_create() functions ...................................................................... Patch Set 1: (5 comments) File src/commonlib/include/commonlib/region.h: https://review.coreboot.org/c/coreboot/+/79905/comment/2e6e744d_0f63bb43 : PS1, Line 99: assert(offset + size - 1 >= offset); > But the assert, it does nothing... I am not sure I understand. I thought it is checking for an overflow which shouldn't happen since region_create is called from "trusted" code? Looks right to me https://review.coreboot.org/c/coreboot/+/79905/comment/9d8aa610_d27463bb : PS1, Line 103: static inline int region_create_untrusted( Does it make sense to mix the constructor and the checking of invalid input values? Personally I like to separate them in order to avoid having to return nested error codes everywhere. I am in favor of checking input values once and as early as possible. So instead of something like this: ``` int smm_handler_xyx(size_t base, size_t size) { if (function_using_region(base, size)) { return -1; } } int function_using_region(size_t base, size_t size) { struct region r; if (region_create_untrusted(&r, base, size)) { return -1; } ... } ``` I like it more like this: ``` int smm_handler_xyx(size_t base, size_t size) { if (base + size < base) { return -1; // overflow detected (possible malicious input values) } function_using_region(base, size); } void function_using_region(size_t base, size_t size) { struct region r = region_create(base, size); ... } ``` https://review.coreboot.org/c/coreboot/+/79905/comment/f3d97699_3a823cd3 : PS1, Line 104: struct region *r, unsigned long long offset, unsigned long long size) Is there a specific reason why you use "unsigned long long" type? https://review.coreboot.org/c/coreboot/+/79905/comment/745aac48_6d375b42 : PS1, Line 106: offset > SIZE_MAX || size > SIZE_MAX I am puzzled. Under which circumstances can offset or size be bigger than SIZE_MAX? File util/cbfstool/cbfstool.c: https://review.coreboot.org/c/coreboot/+/79905/comment/618d23ac_f77f0c18 : PS1, Line 334: if (region_create_untrusted( If I understand correctly the only real difference between `region_create` and `region_create_untrusted` is that `region_create` asserts and `region_create_untrusted` gives the opportunity to handle the error? In that case it seems more reasonable to assert if the regions (ranges) come from coreboot internal code (compared to external) in order for the developer to easier catch the error. And for regions coming from external stuff (e.g. SMM) to just handle the error in order to not crash the system unnecessarily (like you already do). Having said that it seems to make more sense to just use region_create here? -- To view, visit https://review.coreboot.org/c/coreboot/+/79905?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4ae3e6274c981c9ab4fb1263c2a72fa68ef1c32b Gerrit-Change-Number: 79905 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Comment-Date: Sun, 14 Jan 2024 04:51:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Martin L Roth <gaumless(a)gmail.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: libpayload: Make sure to install into the right DESTDIR
by Martin L Roth (Code Review) 14 Jan '24

14 Jan '24

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79908?usp=email ) Change subject: libpayload: Make sure to install into the right DESTDIR ...................................................................... libpayload: Make sure to install into the right DESTDIR A recent update broke installation of commonlib headers with a relative path in $(DESTDIR), which is the default. Make sure to install into the right location in case we changed the current directory. Change-Id: I61fa4aa0ecd0f81ee03ff89183e1b65e7875dea6 Signed-off-by: Nico Huber <nico.h(a)gmx.de> Fixes: ee53dfd07d3b (libpayload: Remove shell for loops in install Makefile target) Reviewed-on: https://review.coreboot.org/c/coreboot/+/79908 Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M payloads/libpayload/Makefile.inc 1 file changed, 2 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Felix Singer: Looks good to me, approved Paul Menzel: Looks good to me, approved diff --git a/payloads/libpayload/Makefile.inc b/payloads/libpayload/Makefile.inc index e4d45a6..61f932f 100644 --- a/payloads/libpayload/Makefile.inc +++ b/payloads/libpayload/Makefile.inc @@ -128,8 +128,8 @@ install -m 755 -d $(DESTDIR)/libpayload/include find include -type d -exec install -m755 -d $(DESTDIR)/libpayload/{} \; find include -type f -exec install -m644 {} $(DESTDIR)/libpayload/{} \; - cd $(coreboottop)/src/commonlib/bsd && find include -type d -exec install -m755 -d $(DESTDIR)/libpayload/{} \; - cd $(coreboottop)/src/commonlib/bsd && find include -type f -exec install -m644 {} $(DESTDIR)/libpayload/{} \; + cd $(coreboottop)/src/commonlib/bsd && find include -type d -exec install -m755 -d $(abspath $(DESTDIR))/libpayload/{} \; + cd $(coreboottop)/src/commonlib/bsd && find include -type f -exec install -m644 {} $(abspath $(DESTDIR))/libpayload/{} \; install -m 644 $(obj)/libpayload-config.h $(DESTDIR)/libpayload/include $(foreach item,$(includes), \ install -m 755 -d $(DESTDIR)/libpayload/include/$(call extract_nth,2,$(item)); \ -- To view, visit https://review.coreboot.org/c/coreboot/+/79908?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I61fa4aa0ecd0f81ee03ff89183e1b65e7875dea6 Gerrit-Change-Number: 79908 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[main]: drivers/mipi: Update init code for BOE_NV110WUM_L60
by Martin L Roth (Code Review) 14 Jan '24

14 Jan '24

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79897?usp=email ) Change subject: drivers/mipi: Update init code for BOE_NV110WUM_L60 ...................................................................... drivers/mipi: Update init code for BOE_NV110WUM_L60 1. Correct bank1 to bank0 2. Adjust CLK duty 3. Fix abnormal power off setting 4. Change VDDE power off frame from VGL to VGH Fixes: 0d50536("drivers/mipi: Add support for BOE_NV110WUM_L60 panel") BUG=b:319398058 TEST=boot Ciri with BOE_NV110WUM_L60 and see firmware screen Change-Id: I2f068ba0ec9dede3e3361b55c38a8eca8793905a Signed-off-by: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79897 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Yidi Lin <yidilin(a)google.com> Reviewed-by: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> --- M src/drivers/mipi/panel-BOE_NV110WUM_L60.c 1 file changed, 5 insertions(+), 5 deletions(-) Approvals: Yu-Ping Wu: Looks good to me, approved Yidi Lin: Looks good to me, approved cong yang: Looks good to me, but someone else must approve build bot (Jenkins): Verified diff --git a/src/drivers/mipi/panel-BOE_NV110WUM_L60.c b/src/drivers/mipi/panel-BOE_NV110WUM_L60.c index 79bae69..d30a1cf 100644 --- a/src/drivers/mipi/panel-BOE_NV110WUM_L60.c +++ b/src/drivers/mipi/panel-BOE_NV110WUM_L60.c @@ -26,8 +26,8 @@ 0x88, 0xFA, 0xFF, 0xFF, 0x8F, 0xFF, 0x08, 0x9A, 0x33), PANEL_DCS(0xB2, 0x00, 0x47, 0xB0, 0x80, 0x00, 0x12, 0x71, 0x3C, 0xA3, 0x11, 0x00, 0x00, 0x00, 0x88, 0xF5, 0x22, 0x8F), - PANEL_DCS(0xB4, 0x49, 0x49, 0x32, 0x32, 0x14, 0x32, 0x84, 0x7E, - 0x84, 0x7E, 0x01, 0x9C), + PANEL_DCS(0xB4, 0x49, 0x49, 0x32, 0x32, 0x14, 0x32, 0x84, 0x6E, + 0x84, 0x6E, 0x01, 0x9C), PANEL_DCS(0xE9, 0xCD), PANEL_DCS(0xBA, 0x84), PANEL_DCS(0xE9, 0x3F), @@ -75,7 +75,7 @@ 0x05, 0x0E, 0x04, 0x94, 0x18, 0x00, 0x10, 0xF0, 0x03, 0x0C, 0x20, 0x00, 0x06, 0x0B, 0x0B, 0x33, 0x0E), PANEL_DCS(0xBD, 0x01), - PANEL_DCS(0xD8, 0xFF, 0xAF, 0xFF, 0xFF, 0xFA, 0xA0, 0xFF, 0xAF, + PANEL_DCS(0xD8, 0xFF, 0xFF, 0xFF, 0xFF, 0xFA, 0xA0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFA, 0xA0), PANEL_DCS(0xB1, 0x01, 0xBF, 0x11), PANEL_DCS(0xCB, 0x86), @@ -91,7 +91,7 @@ 0xA0, 0x00, 0x00), PANEL_DCS(0xBD, 0x02), PANEL_DCS(0xB4, 0x02, 0x00, 0xBB, 0x11), - PANEL_DCS(0xD8, 0xAF, 0xFF, 0xFF, 0xFF, 0xFA, 0xA0, 0xAF, 0xFF, + PANEL_DCS(0xD8, 0xFF, 0xAF, 0xFF, 0xFF, 0xFA, 0xA0, 0xFF, 0xAF, 0xFF, 0xFF, 0xFA, 0xA0), PANEL_DCS(0xE7, 0xFE, 0x01, 0xFE, 0x01, 0xFE, 0x01, 0x00, 0x00, 0x00, 0x23, 0x00, 0x23, 0x81, 0x02, 0x40, 0x00, 0x20, @@ -105,7 +105,7 @@ PANEL_DCS(0xB4, 0x03, 0xFF, 0xF8), PANEL_DCS(0xE9, 0x3F), PANEL_DCS(0xE1, 0x00), - PANEL_DCS(0xBD, 0x01), + PANEL_DCS(0xBD, 0x00), PANEL_DCS(0xE9, 0xC4), PANEL_DCS(0xBA, 0x96), PANEL_DCS(0xE9, 0x3F), -- To view, visit https://review.coreboot.org/c/coreboot/+/79897?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2f068ba0ec9dede3e3361b55c38a8eca8793905a Gerrit-Change-Number: 79897 Gerrit-PatchSet: 5 Gerrit-Owner: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-MessageType: merged

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[S] Change in coreboot[main]: mb/google/geralt: Enable IVO_T109NW41 MIPI panel for Ciri
by Martin L Roth (Code Review) 14 Jan '24

14 Jan '24

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79845?usp=email ) Change subject: mb/google/geralt: Enable IVO_T109NW41 MIPI panel for Ciri ...................................................................... mb/google/geralt: Enable IVO_T109NW41 MIPI panel for Ciri The IVO_T109NW41 will be the second source MIPI panel for Ciri. BUG=b:319025360 TEST=boot Ciri with IVO_T109NW41 panel, see firmware screen BRANCH=None Change-Id: I9dc2228d39bb8bb048d1f37727c96b0ad621e912 Signed-off-by: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79845 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> Reviewed-by: Yidi Lin <yidilin(a)google.com> --- M src/mainboard/google/geralt/Kconfig M src/mainboard/google/geralt/panel_ciri.c 2 files changed, 10 insertions(+), 0 deletions(-) Approvals: Yu-Ping Wu: Looks good to me, approved build bot (Jenkins): Verified Yidi Lin: Looks good to me, approved diff --git a/src/mainboard/google/geralt/Kconfig b/src/mainboard/google/geralt/Kconfig index 7782267..282b262 100644 --- a/src/mainboard/google/geralt/Kconfig +++ b/src/mainboard/google/geralt/Kconfig @@ -43,6 +43,7 @@ select RTC select MIPI_PANEL_BOE_TV110C9M_LL0 if BOARD_GOOGLE_GERALT select MIPI_PANEL_BOE_NV110WUM_L60 if BOARD_GOOGLE_CIRI + select MIPI_PANEL_IVO_T109NW41 if BOARD_GOOGLE_CIRI select FW_CONFIG select FW_CONFIG_SOURCE_CHROMEEC_CBI diff --git a/src/mainboard/google/geralt/panel_ciri.c b/src/mainboard/google/geralt/panel_ciri.c index c50e2fa..3d01183 100644 --- a/src/mainboard/google/geralt/panel_ciri.c +++ b/src/mainboard/google/geralt/panel_ciri.c @@ -35,6 +35,15 @@ .disp_path = DISP_PATH_MIPI, .pwm_ctrl_gpio = true, }, + + [34] = { + .name = "IVO_T109NW41", + .power_on = power_on_mipi_himax_83102j, + .configure_backlight = configure_mipi_pwm_backlight, + .orientation = LB_FB_ORIENTATION_LEFT_UP, + .disp_path = DISP_PATH_MIPI, + .pwm_ctrl_gpio = true, + } }; struct panel_description *get_panel_description(uint32_t panel_id) -- To view, visit https://review.coreboot.org/c/coreboot/+/79845?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9dc2228d39bb8bb048d1f37727c96b0ad621e912 Gerrit-Change-Number: 79845 Gerrit-PatchSet: 6 Gerrit-Owner: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-MessageType: merged

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[M] Change in coreboot[main]: mb/google/geralt: Enable BOE_NV110WUM_L60 panel for Ciri
by Martin L Roth (Code Review) 14 Jan '24

14 Jan '24

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/78957?usp=email ) Change subject: mb/google/geralt: Enable BOE_NV110WUM_L60 panel for Ciri ...................................................................... mb/google/geralt: Enable BOE_NV110WUM_L60 panel for Ciri The MIPI panel BOE_NV110WUM_L60 will be used for Ciri, enable it. Also remove the `mdelay(10)` after mtk_i2c_bus_init, because MTK confirms this is not needed. Add mdelay(2) between VDD18 and VSP/VSN to meet the panel datasheet. BUG=b:308968270 TEST=Boot to firmware screen BRANCH=None Change-Id: I0a04f062f81c543d38716d7ff185b5633c1aa3a9 Signed-off-by: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78957 Reviewed-by: Yidi Lin <yidilin(a)google.com> Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/geralt/Kconfig M src/mainboard/google/geralt/Makefile.inc M src/mainboard/google/geralt/panel.c M src/mainboard/google/geralt/panel.h A src/mainboard/google/geralt/panel_ciri.c M src/mainboard/google/geralt/panel_geralt.c 6 files changed, 76 insertions(+), 23 deletions(-) Approvals: Yu-Ping Wu: Looks good to me, approved Yidi Lin: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/google/geralt/Kconfig b/src/mainboard/google/geralt/Kconfig index feac88a..7782267 100644 --- a/src/mainboard/google/geralt/Kconfig +++ b/src/mainboard/google/geralt/Kconfig @@ -42,6 +42,7 @@ select HAVE_LINEAR_FRAMEBUFFER select RTC select MIPI_PANEL_BOE_TV110C9M_LL0 if BOARD_GOOGLE_GERALT + select MIPI_PANEL_BOE_NV110WUM_L60 if BOARD_GOOGLE_CIRI select FW_CONFIG select FW_CONFIG_SOURCE_CHROMEEC_CBI diff --git a/src/mainboard/google/geralt/Makefile.inc b/src/mainboard/google/geralt/Makefile.inc index e954309..b1af289 100644 --- a/src/mainboard/google/geralt/Makefile.inc +++ b/src/mainboard/google/geralt/Makefile.inc @@ -24,4 +24,5 @@ ramstage-y += panel.c ramstage-y += regulator.c ramstage-y += reset.c +ramstage-$(CONFIG_BOARD_GOOGLE_CIRI) += panel_ciri.c ramstage-$(CONFIG_BOARD_GOOGLE_GERALT) += panel_geralt.c diff --git a/src/mainboard/google/geralt/panel.c b/src/mainboard/google/geralt/panel.c index 202eda7..3f55cac 100644 --- a/src/mainboard/google/geralt/panel.c +++ b/src/mainboard/google/geralt/panel.c @@ -3,10 +3,14 @@ #include <boardid.h> #include <cbfs.h> #include <console/console.h> +#include <delay.h> #include <edid.h> #include <gpio.h> #include <identity.h> #include <soc/gpio_common.h> +#include <soc/i2c.h> +#include <soc/pmif.h> +#include <soc/regulator.h> #include <string.h> #include "gpio.h" @@ -59,3 +63,22 @@ lb_add_gpios(gpios, backlight_gpios, ARRAY_SIZE(backlight_gpios)); } + +void power_on_mipi_panel(const struct tps65132s_cfg *cfg) +{ + mtk_i2c_bus_init(cfg->i2c_bus, I2C_SPEED_FAST); + + /* Enable VM18V */ + mainboard_enable_regulator(MTK_REGULATOR_VDD18, true); + mdelay(2); + if (tps65132s_setup(cfg) != CB_SUCCESS) + printk(BIOS_ERR, "Failed to set up voltage regulator tps65132s\n"); + gpio_output(GPIO_DISP_RST_1V8_L, 0); + mdelay(1); + gpio_output(GPIO_DISP_RST_1V8_L, 1); + mdelay(1); + gpio_output(GPIO_DISP_RST_1V8_L, 0); + mdelay(1); + gpio_output(GPIO_DISP_RST_1V8_L, 1); + mdelay(6); +} diff --git a/src/mainboard/google/geralt/panel.h b/src/mainboard/google/geralt/panel.h index 3d0fafd..7e07fb1 100644 --- a/src/mainboard/google/geralt/panel.h +++ b/src/mainboard/google/geralt/panel.h @@ -4,9 +4,11 @@ #define __MAINBOARD_GOOGLE_GERALT_PANEL_H__ #include <soc/display.h> +#include <soc/tps65132s.h> void configure_mipi_pwm_backlight(void); void fill_lp_backlight_gpios(struct lb_gpios *gpios); +void power_on_mipi_panel(const struct tps65132s_cfg *cfg); uint32_t panel_id(void); struct panel_description *get_panel_description(uint32_t panel_id); diff --git a/src/mainboard/google/geralt/panel_ciri.c b/src/mainboard/google/geralt/panel_ciri.c new file mode 100644 index 0000000..c50e2fa --- /dev/null +++ b/src/mainboard/google/geralt/panel_ciri.c @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <console/console.h> +#include <soc/i2c.h> + +#include "gpio.h" +#include "panel.h" + +#define PMIC_TPS65132_I2C I2C3 + +static void power_on_mipi_himax_83102j(void) +{ + const struct tps65132s_reg_setting reg_settings[] = { + { PMIC_TPS65132_VPOS, 0x11, 0x1f }, + { PMIC_TPS65132_VNEG, 0x11, 0x1f }, + { PMIC_TPS65132_DLYX, 0x55, 0xff }, + { PMIC_TPS65132_ASSDD, 0x5b, 0xff }, + }; + const struct tps65132s_cfg cfg = { + .i2c_bus = PMIC_TPS65132_I2C, + .en = GPIO_EN_PPVAR_MIPI_DISP, + .sync = GPIO_EN_PPVAR_MIPI_DISP_150MA, + .settings = reg_settings, + .setting_counts = ARRAY_SIZE(reg_settings), + }; + power_on_mipi_panel(&cfg); +} + +static struct panel_description ciri_panels[] = { + [17] = { + .name = "BOE_NV110WUM_L60", + .power_on = power_on_mipi_himax_83102j, + .configure_backlight = configure_mipi_pwm_backlight, + .orientation = LB_FB_ORIENTATION_LEFT_UP, + .disp_path = DISP_PATH_MIPI, + .pwm_ctrl_gpio = true, + }, +}; + +struct panel_description *get_panel_description(uint32_t panel_id) +{ + uint32_t id = panel_id & 0xFF; + + if (id >= ARRAY_SIZE(ciri_panels)) + return NULL; + + return &ciri_panels[id]; +} diff --git a/src/mainboard/google/geralt/panel_geralt.c b/src/mainboard/google/geralt/panel_geralt.c index 6eed3fb12..0b59a4e 100644 --- a/src/mainboard/google/geralt/panel_geralt.c +++ b/src/mainboard/google/geralt/panel_geralt.c @@ -1,15 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <boardid.h> #include <console/console.h> -#include <delay.h> -#include <gpio.h> -#include <soc/gpio_common.h> #include <soc/i2c.h> -#include <soc/regulator.h> -#include <soc/tps65132s.h> -#include <soc/pmif.h> -#include <string.h> #include "gpio.h" #include "panel.h" @@ -31,21 +23,7 @@ .settings = reg_settings, .setting_counts = ARRAY_SIZE(reg_settings), }; - - /* Enable VM18V */ - mainboard_enable_regulator(MTK_REGULATOR_VDD18, true); - mtk_i2c_bus_init(PMIC_TPS65132_I2C, I2C_SPEED_FAST); - mdelay(10); - if (tps65132s_setup(&cfg) != CB_SUCCESS) - printk(BIOS_ERR, "Failed to set up voltage regulator tps65132s\n"); - gpio_output(GPIO_DISP_RST_1V8_L, 0); - mdelay(1); - gpio_output(GPIO_DISP_RST_1V8_L, 1); - mdelay(1); - gpio_output(GPIO_DISP_RST_1V8_L, 0); - mdelay(1); - gpio_output(GPIO_DISP_RST_1V8_L, 1); - mdelay(6); + power_on_mipi_panel(&cfg); } static struct panel_description panels[] = { -- To view, visit https://review.coreboot.org/c/coreboot/+/78957?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0a04f062f81c543d38716d7ff185b5633c1aa3a9 Gerrit-Change-Number: 78957 Gerrit-PatchSet: 14 Gerrit-Owner: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: ot_hao.han(a)mediatek.com <ot_hao.han(a)mediatek.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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[M] Change in coreboot[main]: [RFC] region: Introduce region_create() functions
by Martin L Roth (Code Review) 14 Jan '24

14 Jan '24

Attention is currently required from: Jérémy Compostella, Nico Huber. Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79905?usp=email ) Change subject: [RFC] region: Introduce region_create() functions ...................................................................... Patch Set 1: Code-Review+1 (2 comments) Patchset: PS1: LGTM File src/commonlib/include/commonlib/region.h: https://review.coreboot.org/c/coreboot/+/79905/comment/736eed54_81f3e881 : PS1, Line 99: assert(offset + size - 1 >= offset); > This would not allow empty regions. […] I don't see the need for zero-size regions. I guess they could be used as a marker or something, but that seems outside of the intended region usage. I think excluding them is totally reasonable. But the assert, it does nothing... -- To view, visit https://review.coreboot.org/c/coreboot/+/79905?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4ae3e6274c981c9ab4fb1263c2a72fa68ef1c32b Gerrit-Change-Number: 79905 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Comment-Date: Sun, 14 Jan 2024 02:33:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: tree: Use accessor functions for struct region fields
by Martin L Roth (Code Review) 14 Jan '24

14 Jan '24

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79904?usp=email ) Change subject: tree: Use accessor functions for struct region fields ...................................................................... tree: Use accessor functions for struct region fields Always use the high-level API region_offset() and region_sz() functions. This excludes the internal `region.c` code as well as unit tests. FIT payload support was also skipped, as it seems it never tried to use the API and would need a bigger overhaul. Change-Id: Iaae116a1ab2da3b2ea2a5ebcd0c300b238582834 Signed-off-by: Nico Huber <nico.h(a)gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79904 Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> --- M src/cpu/x86/smm/smm_module_loader.c M src/lib/fmap.c M util/cbfstool/bpdt_formats/bpdt_1_6.c M util/cbfstool/bpdt_formats/bpdt_1_7.c 4 files changed, 23 insertions(+), 23 deletions(-) Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved Felix Singer: Looks good to me, approved diff --git a/src/cpu/x86/smm/smm_module_loader.c b/src/cpu/x86/smm/smm_module_loader.c index f827e7b..d965593 100644 --- a/src/cpu/x86/smm/smm_module_loader.c +++ b/src/cpu/x86/smm/smm_module_loader.c @@ -363,7 +363,7 @@ { unsigned int region_counter = 0; for (; region_counter < SMM_REGIONS_ARRAY_SIZE; region_counter++) - if (region_list[region_counter].size == 0) + if (region_sz(&region_list[region_counter]) == 0) break; if (region_counter >= SMM_REGIONS_ARRAY_SIZE) { diff --git a/src/lib/fmap.c b/src/lib/fmap.c index 8901ff7..75c5a9f 100644 --- a/src/lib/fmap.c +++ b/src/lib/fmap.c @@ -235,15 +235,15 @@ if (area == NULL) return -1; - if ((ar->offset != le32toh(area->offset)) || - (ar->size != le32toh(area->size))) { + if (region_offset(ar) != le32toh(area->offset) || + region_sz(ar) != le32toh(area->size)) { rdev_munmap(&fmrd, area); offset += sizeof(struct fmap_area); continue; } printk(BIOS_DEBUG, "FMAP: area (%zx, %zx) found, named %s\n", - ar->offset, ar->size, area->name); + region_offset(ar), region_sz(ar), area->name); memcpy(name, area->name, FMAP_STRLEN); @@ -253,7 +253,7 @@ } printk(BIOS_DEBUG, "FMAP: area (%zx, %zx) not found\n", - ar->offset, ar->size); + region_offset(ar), region_sz(ar)); return -1; } diff --git a/util/cbfstool/bpdt_formats/bpdt_1_6.c b/util/cbfstool/bpdt_formats/bpdt_1_6.c index c5cedd3..477a58c 100644 --- a/util/cbfstool/bpdt_formats/bpdt_1_6.c +++ b/util/cbfstool/bpdt_formats/bpdt_1_6.c @@ -149,14 +149,14 @@ if (!l) return NULL; - l->data_offset = r[DP].offset; - l->data_size = r[DP].size; - l->bp1_offset = r[BP1].offset; - l->bp1_size = r[BP1].size; - l->bp2_offset = r[BP2].offset; - l->bp2_size = r[BP2].size; - l->bp3_offset = r[BP3].offset; - l->bp3_size = r[BP3].size; + l->data_offset = region_offset(&r[DP]); + l->data_size = region_sz(&r[DP]); + l->bp1_offset = region_offset(&r[BP1]); + l->bp1_size = region_sz(&r[BP1]); + l->bp2_offset = region_offset(&r[BP2]); + l->bp2_size = region_sz(&r[BP2]); + l->bp3_offset = region_offset(&r[BP3]); + l->bp3_size = region_sz(&r[BP3]); l->checksum = 0; /* unused */ return l; diff --git a/util/cbfstool/bpdt_formats/bpdt_1_7.c b/util/cbfstool/bpdt_formats/bpdt_1_7.c index 9badc82..7e42a7b 100644 --- a/util/cbfstool/bpdt_formats/bpdt_1_7.c +++ b/util/cbfstool/bpdt_formats/bpdt_1_7.c @@ -196,16 +196,16 @@ l->size = sizeof(struct cse_layout) - sizeof(l->rom_bypass); l->redundancy = 0; l->checksum = 0; - l->data_offset = r[DP].offset; - l->data_size = r[DP].size; - l->bp1_offset = r[BP1].offset; - l->bp1_size = r[BP1].size; - l->bp2_offset = r[BP2].offset; - l->bp2_size = r[BP2].size; - l->bp3_offset = r[BP3].offset; - l->bp3_size = r[BP3].size; - l->bp4_offset = r[BP4].offset; - l->bp4_size = r[BP4].size; + l->data_offset = region_offset(&r[DP]); + l->data_size = region_sz(&r[DP]); + l->bp1_offset = region_offset(&r[BP1]); + l->bp1_size = region_sz(&r[BP1]); + l->bp2_offset = region_offset(&r[BP2]); + l->bp2_size = region_sz(&r[BP2]); + l->bp3_offset = region_offset(&r[BP3]); + l->bp3_size = region_sz(&r[BP3]); + l->bp4_offset = region_offset(&r[BP4]); + l->bp4_size = region_sz(&r[BP4]); l->bp5_offset = 0; l->bp5_size = 0; l->temp_base_addr = 0; -- To view, visit https://review.coreboot.org/c/coreboot/+/79904?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iaae116a1ab2da3b2ea2a5ebcd0c300b238582834 Gerrit-Change-Number: 79904 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-MessageType: merged

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[S] Change in coreboot[main]: sb/intel/bd82x6x/early_usb: Print error for invalid USB setting
by Martin L Roth (Code Review) 14 Jan '24

14 Jan '24

Attention is currently required from: Angel Pons, Patrick Rudolph, Paul Menzel. Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78827?usp=email ) Change subject: sb/intel/bd82x6x/early_usb: Print error for invalid USB setting ...................................................................... Patch Set 10: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/78827/comment/f7e3b384_3907165f : PS8, Line 15: Tested: Lenovo X220 still boots. > That's correct. So what needs to be done here to get this batch merged? Can this comment just be resolved? -- To view, visit https://review.coreboot.org/c/coreboot/+/78827?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If76e9126b4aba8e16c1c91dece725aac12e1a7e9 Gerrit-Change-Number: 78827 Gerrit-PatchSet: 10 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sun, 14 Jan 2024 02:03:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/hp/compaq_elite_8300_usdt: Add VBT
by Martin L Roth (Code Review) 14 Jan '24

14 Jan '24

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79430?usp=email ) Change subject: mb/hp/compaq_elite_8300_usdt: Add VBT ...................................................................... mb/hp/compaq_elite_8300_usdt: Add VBT Extracted from a system running OEM BIOS v03.08 (latest as of now). Build-tested and boots Linux (through SeaBIOS). Command used: intelvbttool --inlegacy --outvbt data.vbt Change-Id: Ibd999d30d6e8fea1368afae67f4dc1c3039d3ae1 Signed-off-by: Riku Viitanen <riku.viitanen(a)protonmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79430 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/hp/compaq_elite_8300_usdt/Kconfig A src/mainboard/hp/compaq_elite_8300_usdt/data.vbt 2 files changed, 1 insertion(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved diff --git a/src/mainboard/hp/compaq_elite_8300_usdt/Kconfig b/src/mainboard/hp/compaq_elite_8300_usdt/Kconfig index 911bed0..c487fdd 100644 --- a/src/mainboard/hp/compaq_elite_8300_usdt/Kconfig +++ b/src/mainboard/hp/compaq_elite_8300_usdt/Kconfig @@ -7,6 +7,7 @@ select HAVE_ACPI_TABLES select HAVE_CMOS_DEFAULT select HAVE_OPTION_TABLE + select INTEL_GMA_HAVE_VBT select INTEL_INT15 select MAINBOARD_HAS_TPM1 select MAINBOARD_HAS_LIBGFXINIT diff --git a/src/mainboard/hp/compaq_elite_8300_usdt/data.vbt b/src/mainboard/hp/compaq_elite_8300_usdt/data.vbt new file mode 100644 index 0000000..4e24edf --- /dev/null +++ b/src/mainboard/hp/compaq_elite_8300_usdt/data.vbt Binary files differ -- To view, visit https://review.coreboot.org/c/coreboot/+/79430?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibd999d30d6e8fea1368afae67f4dc1c3039d3ae1 Gerrit-Change-Number: 79430 Gerrit-PatchSet: 7 Gerrit-Owner: Riku Viitanen <riku.viitanen(a)protonmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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