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[M] Change in coreboot[main]: mb/lenovo/t520: Remove superfluous comments related to PCI devices
by Felix Singer (Code Review) 13 Jan '24

13 Jan '24

Attention is currently required from: Alexander Couzens. Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79966?usp=email ) Change subject: mb/lenovo/t520: Remove superfluous comments related to PCI devices ...................................................................... mb/lenovo/t520: Remove superfluous comments related to PCI devices Since all devicetrees from lenovo/t520 are using the reference names for PCI devices now, remove the equivalent comments documenting their function. Change-Id: I307dbf7a7d6fc9086e868d8315ba7a66b94a24e7 Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/mainboard/lenovo/t520/devicetree.cb M src/mainboard/lenovo/t520/variants/t520/overridetree.cb M src/mainboard/lenovo/t520/variants/w520/overridetree.cb 3 files changed, 25 insertions(+), 25 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/79966/1 diff --git a/src/mainboard/lenovo/t520/devicetree.cb b/src/mainboard/lenovo/t520/devicetree.cb index de59198..a2e12c3 100644 --- a/src/mainboard/lenovo/t520/devicetree.cb +++ b/src/mainboard/lenovo/t520/devicetree.cb @@ -18,11 +18,11 @@ device domain 0 on subsystemid 0x17aa 0x21cf inherit - device ref host_bridge on end # host bridge + device ref host_bridge on end device ref peg10 on end # NVIDIA Copcie_rporation GF119M [NVS 4200M] device ref igd on subsystemid 0x17aa 0x21d1 - end # vga controller + end chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH # GPI routing @@ -50,27 +50,27 @@ register "spi_uvscc" = "0x2005" register "spi_lvscc" = "0x2005" - device ref mei1 on end # Management Engine Interface 1 + device ref mei1 on end device ref mei2 off end device ref me_ide_r off end device ref me_kt off end - device ref gbe on # Intel Gigabit Ethernet + device ref gbe on subsystemid 0x17aa 0x21ce end - device ref ehci2 on end # USB2 EHCI #2 - device ref hda on end # High Definition Audio - device ref pcie_rp1 off end # PCIe Port #1 - device ref pcie_rp2 on end # PCIe Port #2 Integrated Wireless LAN - device ref pcie_rp3 off end # PCIe Port #3 + device ref ehci2 on end + device ref hda on end + device ref pcie_rp1 off end + device ref pcie_rp2 on end # Integrated Wireless LAN + device ref pcie_rp3 off end device ref pcie_rp4 on smbios_slot_desc "7" "3" "ExpressCard Slot" "8" - end # PCIe Port #4 Express Card - device ref pcie_rp5 on end # PCIe Port #5 MMC/SDXC + IEEE1394 - device ref pcie_rp6 off end # PCIe Port #6 Intel Ethernet PHY - device ref pcie_rp7 off end # PCIe Port #7 - device ref pcie_rp8 off end # PCIe Port #8 - device ref ehci1 on end # USB2 EHCI #1 - device ref lpc on #LPC bridge + end + device ref pcie_rp5 on end # MMC/SDXC + IEEE1394 + device ref pcie_rp6 off end # Intel Ethernet PHY + device ref pcie_rp7 off end + device ref pcie_rp8 off end + device ref ehci1 on end + device ref lpc on chip ec/lenovo/pmh7 device pnp ff.1 on end # dummy register "backlight_enable" = "true" @@ -129,9 +129,9 @@ register "has_thinker1" = "1" end - end # LPC bridge - device ref sata1 on end # SATA Controller 1 - device ref smbus on # SMBUS controller + end + device ref sata1 on end + device ref smbus on # eeprom, 8 virtual devices, same chip chip drivers/i2c/at24rf08c device i2c 54 on end @@ -143,9 +143,9 @@ device i2c 5e on end device i2c 5f on end end - end # SMBus - device ref sata2 off end # IDE controller - device ref thermal off end # Thermal controller + end + device ref sata2 off end + device ref thermal off end end end end diff --git a/src/mainboard/lenovo/t520/variants/t520/overridetree.cb b/src/mainboard/lenovo/t520/variants/t520/overridetree.cb index b2c2839..52946d1 100644 --- a/src/mainboard/lenovo/t520/variants/t520/overridetree.cb +++ b/src/mainboard/lenovo/t520/variants/t520/overridetree.cb @@ -2,14 +2,14 @@ register "spd_addresses" = "{0x50, 0, 0x51, 0}" device domain 0 on chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH - device ref lpc on # LPC bridge + device ref lpc on chip ec/lenovo/h8 device pnp ff.2 on end # dummy register "has_wwan_detection" = "1" register "wwan_gpio_num" = "70" register "wwan_gpio_lvl" = "0" end - end # LPC bridge + end end end end diff --git a/src/mainboard/lenovo/t520/variants/w520/overridetree.cb b/src/mainboard/lenovo/t520/variants/w520/overridetree.cb index 84d4dd6..a01784e 100644 --- a/src/mainboard/lenovo/t520/variants/w520/overridetree.cb +++ b/src/mainboard/lenovo/t520/variants/w520/overridetree.cb @@ -2,7 +2,7 @@ register "spd_addresses" = "{0x50, 0x52, 0x51, 0x53}" device domain 0 on chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH - device ref pcie_rp7 on end # PCIe Port #7 USB 3.0 + device ref pcie_rp7 on end # USB 3.0 end end end -- To view, visit https://review.coreboot.org/c/coreboot/+/79966?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I307dbf7a7d6fc9086e868d8315ba7a66b94a24e7 Gerrit-Change-Number: 79966 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-MessageType: newchange

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[XS] Change in coreboot[main]: mb/lenovo/t520: Convert remaining PCI numbers into reference names
by Felix Singer (Code Review) 13 Jan '24

13 Jan '24

Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79965?usp=email ) Change subject: mb/lenovo/t520: Convert remaining PCI numbers into reference names ...................................................................... mb/lenovo/t520: Convert remaining PCI numbers into reference names Change-Id: I18ce899516fd38b21ded1e3144aa22e705c534b8 Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/mainboard/lenovo/t520/devicetree.cb M src/mainboard/lenovo/t520/variants/t520/overridetree.cb M src/mainboard/lenovo/t520/variants/w520/overridetree.cb 3 files changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/79965/1 diff --git a/src/mainboard/lenovo/t520/devicetree.cb b/src/mainboard/lenovo/t520/devicetree.cb index 3cb18b4..de59198 100644 --- a/src/mainboard/lenovo/t520/devicetree.cb +++ b/src/mainboard/lenovo/t520/devicetree.cb @@ -144,8 +144,8 @@ device i2c 5f on end end end # SMBus - device pci 1f.5 off end # IDE controller - device pci 1f.6 off end # Thermal controller + device ref sata2 off end # IDE controller + device ref thermal off end # Thermal controller end end end diff --git a/src/mainboard/lenovo/t520/variants/t520/overridetree.cb b/src/mainboard/lenovo/t520/variants/t520/overridetree.cb index d1634f8..b2c2839 100644 --- a/src/mainboard/lenovo/t520/variants/t520/overridetree.cb +++ b/src/mainboard/lenovo/t520/variants/t520/overridetree.cb @@ -2,7 +2,7 @@ register "spd_addresses" = "{0x50, 0, 0x51, 0}" device domain 0 on chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH - device pci 1f.0 on # LPC bridge + device ref lpc on # LPC bridge chip ec/lenovo/h8 device pnp ff.2 on end # dummy register "has_wwan_detection" = "1" diff --git a/src/mainboard/lenovo/t520/variants/w520/overridetree.cb b/src/mainboard/lenovo/t520/variants/w520/overridetree.cb index 4e03e75..84d4dd6 100644 --- a/src/mainboard/lenovo/t520/variants/w520/overridetree.cb +++ b/src/mainboard/lenovo/t520/variants/w520/overridetree.cb @@ -2,7 +2,7 @@ register "spd_addresses" = "{0x50, 0x52, 0x51, 0x53}" device domain 0 on chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH - device pci 1c.6 on end # PCIe Port #7 USB 3.0 + device ref pcie_rp7 on end # PCIe Port #7 USB 3.0 end end end -- To view, visit https://review.coreboot.org/c/coreboot/+/79965?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I18ce899516fd38b21ded1e3144aa22e705c534b8 Gerrit-Change-Number: 79965 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-MessageType: newchange

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[M] Change in coreboot[main]: mb/lenovo/x230: Remove superfluous comments related to PCI devices
by Felix Singer (Code Review) 13 Jan '24

13 Jan '24

Attention is currently required from: Alexander Couzens. Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79964?usp=email ) Change subject: mb/lenovo/x230: Remove superfluous comments related to PCI devices ...................................................................... mb/lenovo/x230: Remove superfluous comments related to PCI devices Since all devicetrees from lenovo/x230 are using the reference names for PCI devices now, remove the equivalent comments documenting their function. Change-Id: Ia06f976ef1439377ff22149044feaa3463d2aeb8 Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/mainboard/lenovo/x230/devicetree.cb M src/mainboard/lenovo/x230/variants/x230/overridetree.cb M src/mainboard/lenovo/x230/variants/x230s/overridetree.cb 3 files changed, 32 insertions(+), 32 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/79964/1 diff --git a/src/mainboard/lenovo/x230/devicetree.cb b/src/mainboard/lenovo/x230/devicetree.cb index 52a2e70..9e17158 100644 --- a/src/mainboard/lenovo/x230/devicetree.cb +++ b/src/mainboard/lenovo/x230/devicetree.cb @@ -19,9 +19,9 @@ device domain 0 on subsystemid 0x17aa 0x21fa inherit - device ref host_bridge on end # host bridge - device ref peg10 off end # PCIe Bridge for discrete graphics - device ref igd on end # vga controller + device ref host_bridge on end + device ref peg10 off end # discrete graphics + device ref igd on end chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH # GPI routing @@ -52,33 +52,33 @@ register "spi_uvscc" = "0x2005" register "spi_lvscc" = "0x2005" - device ref xhci on end # USB 3.0 Controller - device ref mei1 on end # Management Engine Interface 1 - device ref mei2 off end # Management Engine Interface 2 - device ref me_ide_r off end # Management Engine IDE-R - device ref me_kt off end # Management Engine KT + device ref xhci on end + device ref mei1 on end + device ref mei2 off end + device ref me_ide_r off end + device ref me_kt off end device ref gbe on subsystemid 0x17aa 0x21f3 - end # Intel Gigabit Ethernet - device ref ehci2 on end # USB2 EHCI #2 - device ref hda on end # High Definition Audio + end + device ref ehci2 on end + device ref hda on end device ref pcie_rp1 on chip drivers/ricoh/rce822 register "sdwppol" = "1" register "disable_mask" = "0x87" device pci 00.0 on end end - end # PCIe Port #1 - device ref pcie_rp2 on end # PCIe Port #2 - device ref pcie_rp3 off end # PCIe Port #3 - device ref pcie_rp4 off end # PCIe Port #4 - device ref pcie_rp5 off end # PCIe Port #5 - device ref pcie_rp6 off end # PCIe Port #6 - device ref pcie_rp7 off end # PCIe Port #7 - device ref pcie_rp8 off end # PCIe Port #8 - device ref ehci1 on end # USB2 EHCI #1 - device ref pci_bridge off end # PCI bridge - device ref lpc on #LPC bridge + end + device ref pcie_rp2 on end + device ref pcie_rp3 off end + device ref pcie_rp4 off end + device ref pcie_rp5 off end + device ref pcie_rp6 off end + device ref pcie_rp7 off end + device ref pcie_rp8 off end + device ref ehci1 on end + device ref pci_bridge off end + device ref lpc on chip ec/lenovo/pmh7 device pnp ff.1 on end # dummy register "backlight_enable" = "true" @@ -130,8 +130,8 @@ register "wwan_gpio_num" = "70" register "wwan_gpio_lvl" = "0" end - end # LPC bridge - device ref sata1 on end # SATA Controller 1 + end + device ref sata1 on end device ref smbus on # eeprom, 8 virtual devices, same chip chip drivers/i2c/at24rf08c @@ -144,9 +144,9 @@ device i2c 5e on end device i2c 5f on end end - end # SMBus - device ref sata2 off end # SATA Controller 2 - device ref thermal on end # Thermal + end + device ref sata2 off end + device ref thermal on end end end end diff --git a/src/mainboard/lenovo/x230/variants/x230/overridetree.cb b/src/mainboard/lenovo/x230/variants/x230/overridetree.cb index 487bdfe..d82faae 100644 --- a/src/mainboard/lenovo/x230/variants/x230/overridetree.cb +++ b/src/mainboard/lenovo/x230/variants/x230/overridetree.cb @@ -5,13 +5,13 @@ register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }" device ref pcie_rp3 on smbios_slot_desc "7" "3" "ExpressCard Slot" "8" - end # PCIe Port #3 (expresscard) - device ref lpc on # LPC bridge + end + device ref lpc on chip ec/lenovo/h8 register "eventa_enable" = "0x01" device pnp ff.2 on end end - end # LPC Controller + end end end end diff --git a/src/mainboard/lenovo/x230/variants/x230s/overridetree.cb b/src/mainboard/lenovo/x230/variants/x230s/overridetree.cb index e30062a..09e7f92 100644 --- a/src/mainboard/lenovo/x230/variants/x230s/overridetree.cb +++ b/src/mainboard/lenovo/x230/variants/x230s/overridetree.cb @@ -19,7 +19,7 @@ # Enable SATA ports 0 (HDD bay) & 1 (WWAN M.2 SATA) register "sata_port_map" = "0x3" - device ref lpc on # LPC bridge + device ref lpc on chip ec/lenovo/h8 register "config1" = "0x05" register "config3" = "0xc4" @@ -29,7 +29,7 @@ register "has_bdc_detection" = "0" device pnp ff.2 on end end - end # LPC Controller + end end end end -- To view, visit https://review.coreboot.org/c/coreboot/+/79964?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia06f976ef1439377ff22149044feaa3463d2aeb8 Gerrit-Change-Number: 79964 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-MessageType: newchange

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[XS] Change in coreboot[main]: mb/lenovo/x230: Convert remaining PCI numbers into reference names
by Felix Singer (Code Review) 13 Jan '24

13 Jan '24

Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79963?usp=email ) Change subject: mb/lenovo/x230: Convert remaining PCI numbers into reference names ...................................................................... mb/lenovo/x230: Convert remaining PCI numbers into reference names Change-Id: I38ef315dbdadb140e8e7163e755a078bc906e1b5 Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/mainboard/lenovo/x230/variants/x230/overridetree.cb M src/mainboard/lenovo/x230/variants/x230s/overridetree.cb 2 files changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/79963/1 diff --git a/src/mainboard/lenovo/x230/variants/x230/overridetree.cb b/src/mainboard/lenovo/x230/variants/x230/overridetree.cb index 978d017..487bdfe 100644 --- a/src/mainboard/lenovo/x230/variants/x230/overridetree.cb +++ b/src/mainboard/lenovo/x230/variants/x230/overridetree.cb @@ -3,10 +3,10 @@ chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH register "docking_supported" = "1" register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }" - device pci 1c.2 on + device ref pcie_rp3 on smbios_slot_desc "7" "3" "ExpressCard Slot" "8" end # PCIe Port #3 (expresscard) - device pci 1f.0 on # LPC bridge + device ref lpc on # LPC bridge chip ec/lenovo/h8 register "eventa_enable" = "0x01" device pnp ff.2 on end diff --git a/src/mainboard/lenovo/x230/variants/x230s/overridetree.cb b/src/mainboard/lenovo/x230/variants/x230s/overridetree.cb index 9d020e3..e30062a 100644 --- a/src/mainboard/lenovo/x230/variants/x230s/overridetree.cb +++ b/src/mainboard/lenovo/x230/variants/x230s/overridetree.cb @@ -19,7 +19,7 @@ # Enable SATA ports 0 (HDD bay) & 1 (WWAN M.2 SATA) register "sata_port_map" = "0x3" - device pci 1f.0 on # LPC bridge + device ref lpc on # LPC bridge chip ec/lenovo/h8 register "config1" = "0x05" register "config3" = "0xc4" -- To view, visit https://review.coreboot.org/c/coreboot/+/79963?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I38ef315dbdadb140e8e7163e755a078bc906e1b5 Gerrit-Change-Number: 79963 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-MessageType: newchange

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[M] Change in coreboot[main]: mb/lenovo/t430: Remove superfluous comments related to PCI devices
by Felix Singer (Code Review) 13 Jan '24

13 Jan '24

Attention is currently required from: Alexander Couzens. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79942?usp=email ) Change subject: mb/lenovo/t430: Remove superfluous comments related to PCI devices ...................................................................... Patch Set 1: (1 comment) File src/mainboard/lenovo/t430s/variants/t431s/overridetree.cb: https://review.coreboot.org/c/coreboot/+/79942/comment/4ceac179_00f030f6 : PS1, Line 18: device ref peg10 off end Readd comment "discrete graphics" -- To view, visit https://review.coreboot.org/c/coreboot/+/79942?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I84f432e89c41a02115715f7f1b56123dd0d81171 Gerrit-Change-Number: 79942 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Comment-Date: Sat, 13 Jan 2024 21:49:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[main]: mb/lenovo/t530: Remove superfluous comments related to PCI devices
by Felix Singer (Code Review) 13 Jan '24

13 Jan '24

Attention is currently required from: Alexander Couzens, Arthur Heymans. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79938?usp=email ) Change subject: mb/lenovo/t530: Remove superfluous comments related to PCI devices ...................................................................... Patch Set 3: (1 comment) File src/mainboard/lenovo/t530/devicetree.cb: https://review.coreboot.org/c/coreboot/+/79938/comment/8b782411_1f30af49 : PS3, Line 22: device ref peg10 on end Readd comment "discrete graphics" -- To view, visit https://review.coreboot.org/c/coreboot/+/79938?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5ba08843506bc22136aea42ac37936a4f5cad5ce Gerrit-Change-Number: 79938 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Comment-Date: Sat, 13 Jan 2024 21:45:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[main]: mb/lenovo/t430: Remove superfluous comments related to PCI devices
by Felix Singer (Code Review) 13 Jan '24

13 Jan '24

Attention is currently required from: Alexander Couzens. Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79942?usp=email ) Change subject: mb/lenovo/t430: Remove superfluous comments related to PCI devices ...................................................................... mb/lenovo/t430: Remove superfluous comments related to PCI devices Since all devicetrees from lenovo/t430 are using the reference names for PCI devices now, remove the equivalent comments documenting their function. Change-Id: I84f432e89c41a02115715f7f1b56123dd0d81171 Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/mainboard/lenovo/t430s/devicetree.cb M src/mainboard/lenovo/t430s/variants/t430s/overridetree.cb M src/mainboard/lenovo/t430s/variants/t431s/overridetree.cb 3 files changed, 33 insertions(+), 33 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/79942/1 diff --git a/src/mainboard/lenovo/t430s/devicetree.cb b/src/mainboard/lenovo/t430s/devicetree.cb index 23a41d6..fae1871 100644 --- a/src/mainboard/lenovo/t430s/devicetree.cb +++ b/src/mainboard/lenovo/t430s/devicetree.cb @@ -17,9 +17,9 @@ device domain 0 on subsystemid 0x17aa 0x21fb inherit - device ref host_bridge on end # host bridge - device ref peg10 on end # PCIe Bridge for discrete graphics - device ref igd on end # Integrated Graphics Controller + device ref host_bridge on end + device ref peg10 on end # Discrete graphics + device ref igd on end chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH # GPI routing @@ -52,28 +52,28 @@ register "spi_uvscc" = "0x2005" register "spi_lvscc" = "0x2005" - device ref xhci on end # USB 3.0 Controller - device ref mei1 on end # Management Engine Interface 1 - device ref mei2 off end # Management Engine Interface 2 - device ref me_ide_r off end # Management Engine IDE-R - device ref me_kt off end # Management Engine KT + device ref xhci on end + device ref mei1 on end + device ref mei2 off end + device ref me_ide_r off end + device ref me_kt off end device ref gbe on subsystemid 0x17aa 0x21f3 - end # Intel Gigabit Ethernet - device ref ehci2 on end # USB Enhanced Host Controller #2 - device ref hda on end # High Definition Audio Controller - device ref pcie_rp1 off end # PCIe Port #1 - device ref pcie_rp2 on end # PCIe Port #2 Integrated Wireless LAN + end + device ref ehci2 on end + device ref hda on end + device ref pcie_rp1 off end + device ref pcie_rp2 on end # Integrated Wireless LAN device ref pcie_rp3 on smbios_slot_desc "7" "3" "ExpressCard Slot" "8" - end # PCIe Port #3 ExpressCard - device ref pcie_rp4 off end # PCIe Port #4 - device ref pcie_rp5 off end # PCIe Port #5 - device ref pcie_rp6 off end # PCIe Port #6 Intel Gigabit Ethernet PHY (not PCIe) - device ref pcie_rp7 off end # PCIe Port #7 - device ref pcie_rp8 off end # PCIe Port #8 - device ref ehci1 on end # USB Enhanced Host Controller #1 - device ref pci_bridge off end # PCI bridge + end + device ref pcie_rp4 off end + device ref pcie_rp5 off end + device ref pcie_rp6 off end # Intel Gigabit Ethernet PHY (not PCIe) + device ref pcie_rp7 off end + device ref pcie_rp8 off end + device ref ehci1 on end + device ref pci_bridge off end device ref lpc on chip ec/lenovo/pmh7 device pnp ff.1 on end # dummy @@ -117,8 +117,8 @@ register "eventd_enable" = "0xff" register "evente_enable" = "0x0d" end - end # LPC Controller - device ref sata1 on end # 6 port SATA AHCI Controller + end + device ref sata1 on end device ref smbus on # eeprom, 8 virtual devices, same chip chip drivers/i2c/at24rf08c @@ -131,9 +131,9 @@ device i2c 5e on end device i2c 5f on end end - end # SMBus Controller - device ref sata2 off end # SATA Controller 2 - device ref thermal on end # Thermal + end + device ref sata2 off end + device ref thermal on end end end end diff --git a/src/mainboard/lenovo/t430s/variants/t430s/overridetree.cb b/src/mainboard/lenovo/t430s/variants/t430s/overridetree.cb index 2515150..5677a87 100644 --- a/src/mainboard/lenovo/t430s/variants/t430s/overridetree.cb +++ b/src/mainboard/lenovo/t430s/variants/t430s/overridetree.cb @@ -4,7 +4,7 @@ chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH # Enable hotplug on Port 5 for Thunderbolt controller register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 1, 0, 0, 0 }" - device ref pcie_rp5 on end # PCIe Port #5 Thunderbolt controller + device ref pcie_rp5 on end # Thunderbolt controller device ref lpc on chip ec/lenovo/h8 device pnp ff.2 on end # dummy @@ -12,7 +12,7 @@ register "bdc_gpio_num" = "54" register "bdc_gpio_lvl" = "0" end - end # LPC Controller + end end end end diff --git a/src/mainboard/lenovo/t430s/variants/t431s/overridetree.cb b/src/mainboard/lenovo/t430s/variants/t431s/overridetree.cb index 3e13627..c9d3c0f 100644 --- a/src/mainboard/lenovo/t430s/variants/t431s/overridetree.cb +++ b/src/mainboard/lenovo/t430s/variants/t431s/overridetree.cb @@ -15,7 +15,7 @@ device domain 0 on subsystemid 0x17aa 0x2208 inherit - device ref peg10 off end # PCIe Bridge for discrete graphics + device ref peg10 off end chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH # Enable SATA ports 0 (HDD bay) & 1 (WWAN M.2 SATA) & 4 (dock) @@ -23,14 +23,14 @@ # T431s has no Express Card slot. register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }" - device ref pcie_rp1 on # PCIe Port #1 + device ref pcie_rp1 on chip drivers/ricoh/rce822 # Ricoh cardreader register "disable_mask" = "0x87" register "sdwppol" = "0" device pci 00.0 on end # Ricoh SD card reader end end - device ref pcie_rp3 off end # PCIe Port #3 + device ref pcie_rp3 off end device ref lpc on chip ec/lenovo/h8 device pnp ff.2 on end # dummy @@ -41,8 +41,8 @@ # T431s only has BT on wlan card register "has_bdc_detection" = "0" end - end # LPC Controller - device ref thermal off end # Thermal + end + device ref thermal off end end end end -- To view, visit https://review.coreboot.org/c/coreboot/+/79942?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I84f432e89c41a02115715f7f1b56123dd0d81171 Gerrit-Change-Number: 79942 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-MessageType: newchange

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[S] Change in coreboot[main]: mb/lenovo/t430: Convert remaining PCI numbers into reference names
by Felix Singer (Code Review) 13 Jan '24

13 Jan '24

Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79941?usp=email ) Change subject: mb/lenovo/t430: Convert remaining PCI numbers into reference names ...................................................................... mb/lenovo/t430: Convert remaining PCI numbers into reference names Change-Id: Ib94dd2778cf89ae8b97b43031d729c728f59a29e Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/mainboard/lenovo/t430s/variants/t430s/overridetree.cb M src/mainboard/lenovo/t430s/variants/t431s/overridetree.cb 2 files changed, 7 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/79941/1 diff --git a/src/mainboard/lenovo/t430s/variants/t430s/overridetree.cb b/src/mainboard/lenovo/t430s/variants/t430s/overridetree.cb index 698460b..2515150 100644 --- a/src/mainboard/lenovo/t430s/variants/t430s/overridetree.cb +++ b/src/mainboard/lenovo/t430s/variants/t430s/overridetree.cb @@ -4,8 +4,8 @@ chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH # Enable hotplug on Port 5 for Thunderbolt controller register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 1, 0, 0, 0 }" - device pci 1c.4 on end # PCIe Port #5 Thunderbolt controller - device pci 1f.0 on + device ref pcie_rp5 on end # PCIe Port #5 Thunderbolt controller + device ref lpc on chip ec/lenovo/h8 device pnp ff.2 on end # dummy register "has_bdc_detection" = "1" diff --git a/src/mainboard/lenovo/t430s/variants/t431s/overridetree.cb b/src/mainboard/lenovo/t430s/variants/t431s/overridetree.cb index fcd137f..3e13627 100644 --- a/src/mainboard/lenovo/t430s/variants/t431s/overridetree.cb +++ b/src/mainboard/lenovo/t430s/variants/t431s/overridetree.cb @@ -15,7 +15,7 @@ device domain 0 on subsystemid 0x17aa 0x2208 inherit - device pci 01.0 off end # PCIe Bridge for discrete graphics + device ref peg10 off end # PCIe Bridge for discrete graphics chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH # Enable SATA ports 0 (HDD bay) & 1 (WWAN M.2 SATA) & 4 (dock) @@ -23,15 +23,15 @@ # T431s has no Express Card slot. register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }" - device pci 1c.0 on # PCIe Port #1 + device ref pcie_rp1 on # PCIe Port #1 chip drivers/ricoh/rce822 # Ricoh cardreader register "disable_mask" = "0x87" register "sdwppol" = "0" device pci 00.0 on end # Ricoh SD card reader end end - device pci 1c.2 off end # PCIe Port #3 - device pci 1f.0 on + device ref pcie_rp3 off end # PCIe Port #3 + device ref lpc on chip ec/lenovo/h8 device pnp ff.2 on end # dummy register "config0" = "0xa6" @@ -42,7 +42,7 @@ register "has_bdc_detection" = "0" end end # LPC Controller - device pci 1f.6 off end # Thermal + device ref thermal off end # Thermal end end end -- To view, visit https://review.coreboot.org/c/coreboot/+/79941?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib94dd2778cf89ae8b97b43031d729c728f59a29e Gerrit-Change-Number: 79941 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-MessageType: newchange

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[M] Change in coreboot[main]: mb/lenovo/x220: Remove superfluous comments related to PCI devices
by Felix Singer (Code Review) 13 Jan '24

13 Jan '24

Attention is currently required from: Alexander Couzens. Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79940?usp=email ) Change subject: mb/lenovo/x220: Remove superfluous comments related to PCI devices ...................................................................... mb/lenovo/x220: Remove superfluous comments related to PCI devices Since all devicetrees from lenovo/x220 are using the reference names for PCI devices now, remove the equivalent comments documenting their function. Change-Id: Ic8bff0516811371e1fbb72765c8d03812a689701 Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/mainboard/lenovo/x220/devicetree.cb M src/mainboard/lenovo/x220/variants/x1/overridetree.cb M src/mainboard/lenovo/x220/variants/x220/overridetree.cb 3 files changed, 33 insertions(+), 33 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/79940/1 diff --git a/src/mainboard/lenovo/x220/devicetree.cb b/src/mainboard/lenovo/x220/devicetree.cb index 866d6c3..233f690 100644 --- a/src/mainboard/lenovo/x220/devicetree.cb +++ b/src/mainboard/lenovo/x220/devicetree.cb @@ -38,9 +38,9 @@ device domain 0 on subsystemid 0x17aa 0x21db inherit - device ref host_bridge on end # host bridge - device ref peg10 off end # PCIe Bridge for discrete graphics - device ref igd on end # vga controller + device ref host_bridge on end + device ref peg10 off end + device ref igd on end chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH # GPI routing @@ -68,37 +68,37 @@ register "spi_uvscc" = "0x2005" register "spi_lvscc" = "0x2005" - device ref mei1 on end # Management Engine Interface 1 - device ref mei2 off end # Management Engine Interface 2 - device ref me_ide_r off end # Management Engine IDE-R - device ref me_kt off end # Management Engine KT + device ref mei1 on end + device ref mei2 off end + device ref me_ide_r off end + device ref me_kt off end device ref gbe on subsystemid 0x17aa 0x21ce - end # Intel Gigabit Ethernet - device ref ehci2 on end # USB2 EHCI #2 - device ref hda on end # High Definition Audio - device ref pcie_rp1 off end # PCIe Port #1 - device ref pcie_rp2 on # PCIe Port #2 (wlan) + end + device ref ehci2 on end + device ref hda on end + device ref pcie_rp1 off end + device ref pcie_rp2 on smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthShort" "WIFI" "SlotDataBusWidth1X" end - device ref pcie_rp3 off end # PCIe Port #3 + device ref pcie_rp3 off end device ref pcie_rp4 on smbios_slot_desc "7" "3" "ExpressCard Slot" "8" - end # PCIe Port #4 + end device ref pcie_rp5 on chip drivers/ricoh/rce822 register "sdwppol" = "1" register "disable_mask" = "0x87" device pci 00.0 on end end - end # PCIe Port #5 (SD) - device ref pcie_rp6 off end # PCIe Port #6 - device ref pcie_rp7 on end # PCIe Port #7 Optional XHCI controller - device ref pcie_rp8 off end # PCIe Port #8 - device ref ehci1 on end # USB2 EHCI #1 - device ref pci_bridge off end # PCI bridge - device ref lpc on #LPC bridge + end + device ref pcie_rp6 off end + device ref pcie_rp7 on end # Optional XHCI controller + device ref pcie_rp8 off end + device ref ehci1 on end + device ref pci_bridge off end + device ref lpc on chip ec/lenovo/pmh7 device pnp ff.1 on end # dummy register "backlight_enable" = "true" @@ -149,8 +149,8 @@ register "wwan_gpio_num" = "70" register "wwan_gpio_lvl" = "0" end - end # LPC bridge - device ref sata1 on end # SATA Controller 1 + end + device ref sata1 on end device ref smbus on # eeprom, 8 virtual devices, same chip chip drivers/i2c/at24rf08c @@ -163,9 +163,9 @@ device i2c 5e on end device i2c 5f on end end - end # SMBus - device ref sata2 off end # SATA Controller 2 - device ref thermal on end # Thermal + end + device ref sata2 off end + device ref thermal on end end end end diff --git a/src/mainboard/lenovo/x220/variants/x1/overridetree.cb b/src/mainboard/lenovo/x220/variants/x1/overridetree.cb index 2defac8..bf88150 100644 --- a/src/mainboard/lenovo/x220/variants/x1/overridetree.cb +++ b/src/mainboard/lenovo/x220/variants/x1/overridetree.cb @@ -21,10 +21,10 @@ # X1 does not have ExpressCard slot register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }" - device ref pcie_rp1 off end # PCIe Port #1 - device ref pcie_rp3 off end # PCIe Port #3 - device ref pcie_rp4 off end # PCIe Port #4 - device ref lpc on #LPC bridge + device ref pcie_rp1 off end + device ref pcie_rp3 off end + device ref pcie_rp4 off end + device ref lpc on chip ec/lenovo/h8 device pnp ff.2 on end # dummy register "config2" = "0xe0" @@ -36,7 +36,7 @@ register "event5_enable" = "0x3c" register "evente_enable" = "0x3d" end - end # LPC bridge + end end end end diff --git a/src/mainboard/lenovo/x220/variants/x220/overridetree.cb b/src/mainboard/lenovo/x220/variants/x220/overridetree.cb index 9325480..b9caa25 100644 --- a/src/mainboard/lenovo/x220/variants/x220/overridetree.cb +++ b/src/mainboard/lenovo/x220/variants/x220/overridetree.cb @@ -1,13 +1,13 @@ chip northbridge/intel/sandybridge device domain 0 on chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH - device ref lpc on #LPC bridge + device ref lpc on chip ec/lenovo/h8 device pnp ff.2 on end # dummy register "eventa_enable" = "0x01" register "eventb_enable" = "0xf0" end - end # LPC bridge + end end end end -- To view, visit https://review.coreboot.org/c/coreboot/+/79940?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic8bff0516811371e1fbb72765c8d03812a689701 Gerrit-Change-Number: 79940 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-MessageType: newchange

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[S] Change in coreboot[main]: mb/lenovo/x220: Convert remaining PCI numbers into reference names
by Felix Singer (Code Review) 13 Jan '24

13 Jan '24

Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79939?usp=email ) Change subject: mb/lenovo/x220: Convert remaining PCI numbers into reference names ...................................................................... mb/lenovo/x220: Convert remaining PCI numbers into reference names Change-Id: Ife8f3bc8b7fd14bb9a0e8dd4bc3d33b44c8f794f Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/mainboard/lenovo/x220/variants/x1/overridetree.cb M src/mainboard/lenovo/x220/variants/x220/overridetree.cb 2 files changed, 5 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/79939/1 diff --git a/src/mainboard/lenovo/x220/variants/x1/overridetree.cb b/src/mainboard/lenovo/x220/variants/x1/overridetree.cb index d236139..2defac8 100644 --- a/src/mainboard/lenovo/x220/variants/x1/overridetree.cb +++ b/src/mainboard/lenovo/x220/variants/x1/overridetree.cb @@ -21,10 +21,10 @@ # X1 does not have ExpressCard slot register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }" - device pci 1c.0 off end # PCIe Port #1 - device pci 1c.2 off end # PCIe Port #3 - device pci 1c.3 off end # PCIe Port #4 - device pci 1f.0 on #LPC bridge + device ref pcie_rp1 off end # PCIe Port #1 + device ref pcie_rp3 off end # PCIe Port #3 + device ref pcie_rp4 off end # PCIe Port #4 + device ref lpc on #LPC bridge chip ec/lenovo/h8 device pnp ff.2 on end # dummy register "config2" = "0xe0" diff --git a/src/mainboard/lenovo/x220/variants/x220/overridetree.cb b/src/mainboard/lenovo/x220/variants/x220/overridetree.cb index 8e939fd..9325480 100644 --- a/src/mainboard/lenovo/x220/variants/x220/overridetree.cb +++ b/src/mainboard/lenovo/x220/variants/x220/overridetree.cb @@ -1,7 +1,7 @@ chip northbridge/intel/sandybridge device domain 0 on chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH - device pci 1f.0 on #LPC bridge + device ref lpc on #LPC bridge chip ec/lenovo/h8 device pnp ff.2 on end # dummy register "eventa_enable" = "0x01" -- To view, visit https://review.coreboot.org/c/coreboot/+/79939?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ife8f3bc8b7fd14bb9a0e8dd4bc3d33b44c8f794f Gerrit-Change-Number: 79939 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-MessageType: newchange

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