coreboot-gerrit April 2023

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[M] Change in coreboot[master]: util/docker/jenkins-node: Clean up package installation
by Felix Singer (Code Review) 08 Apr '23

08 Apr '23

Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74245 ) Change subject: util/docker/jenkins-node: Clean up package installation ...................................................................... Patch Set 2: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/74245 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe620e5b20a5f1a5d4e1c4c98942c136f450f280 Gerrit-Change-Number: 74245 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 08 Apr 2023 23:40:16 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: util/docker/jenkins-node: Allow pip to install packages system-wide
by Felix Singer (Code Review) 08 Apr '23

08 Apr '23

Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74292 ) Change subject: util/docker/jenkins-node: Allow pip to install packages system-wide ...................................................................... util/docker/jenkins-node: Allow pip to install packages system-wide Call pip3 with `--break-system-packages` allowing it to install packages system-wide. This fixes building the Docker container. Change-Id: Id093f2c69fec43556c434fbca7b36095a7e6bd97 Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M util/docker/coreboot-jenkins-node/Dockerfile 1 file changed, 15 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/74292/1 diff --git a/util/docker/coreboot-jenkins-node/Dockerfile b/util/docker/coreboot-jenkins-node/Dockerfile index b277efa..7ab703c 100644 --- a/util/docker/coreboot-jenkins-node/Dockerfile +++ b/util/docker/coreboot-jenkins-node/Dockerfile @@ -44,8 +44,8 @@ python3-pyrsistent \ swig \ && apt-get clean \ - && pip3 install --upgrade --no-cache-dir pip \ - && pip3 install --no-cache-dir \ + && pip3 install --upgrade --no-cache-dir --break-system-packages pip \ + && pip3 install --no-cache-dir --break-system-packages \ setuptools==58.2.0 \ jinja2==3.0.3 \ recommonmark===0.5.0 \ -- To view, visit https://review.coreboot.org/c/coreboot/+/74292 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id093f2c69fec43556c434fbca7b36095a7e6bd97 Gerrit-Change-Number: 74292 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: cpu/intel/sandybridge: Add `hyper_threading` option
by Felix Singer (Code Review) 08 Apr '23

08 Apr '23

Attention is currently required from: Nico Huber. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29669 ) Change subject: cpu/intel/sandybridge: Add `hyper_threading` option ...................................................................... Patch Set 18: (1 comment) File src/cpu/intel/model_206ax/bootblock.c: https://review.coreboot.org/c/coreboot/+/29669/comment/2035e550_f989082f PS18, Line 87: if (need_reset) { How about inverting the condition so that the trivial case comes first? This way we also save the indentations. ``` if (!need_reset) { RCBA32_OR(SOFT_RESET_LOCK, 1); return; } /* Set current requests */ RCBA32(SOFT_RESET_DATA) = soft_reset; .... ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/29669 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2b73e32ff5af8ea64a47e8aa706e27648aaf0993 Gerrit-Change-Number: 29669 Gerrit-PatchSet: 18 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-CC: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Sat, 08 Apr 2023 20:11:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: cpu/intel/sandybridge: Add `hyper_threading` option
by Felix Singer (Code Review) 08 Apr '23

08 Apr '23

Attention is currently required from: Nico Huber. Felix Singer has uploaded a new patch set (#18) to the change originally created by Nico Huber. ( https://review.coreboot.org/c/coreboot/+/29669 ) Change subject: cpu/intel/sandybridge: Add `hyper_threading` option ...................................................................... cpu/intel/sandybridge: Add `hyper_threading` option More and more people request an option to disable HT. To implement that we have to toggle a bit in a `soft reset` register in the PCH that can override certain default settings of the CPU when it comes out of reset. The `soft reset` register is already used for other settings. So we have to take care that all settings are gathered before we issue the reset. Note, the current code using `soft reset` for flex ratio selection seems incomplete. Tested on ThinkPad X220 (i5-2520M) and ThinkPad W530 (i7-3940XM). Change-Id: I2b73e32ff5af8ea64a47e8aa706e27648aaf0993 Signed-off-by: Nico Huber <nico.h(a)gmx.de> Signed-off-by: Evgeny Zinoviev <me(a)ch1p.io> --- M src/cpu/intel/model_206ax/bootblock.c M src/mainboard/lenovo/l520/cmos.default M src/mainboard/lenovo/l520/cmos.layout M src/mainboard/lenovo/t420/cmos.default M src/mainboard/lenovo/t420/cmos.layout M src/mainboard/lenovo/t420s/cmos.default M src/mainboard/lenovo/t420s/cmos.layout M src/mainboard/lenovo/t430/cmos.default M src/mainboard/lenovo/t430/cmos.layout M src/mainboard/lenovo/t430s/cmos.default M src/mainboard/lenovo/t430s/cmos.layout M src/mainboard/lenovo/t520/cmos.default M src/mainboard/lenovo/t520/cmos.layout M src/mainboard/lenovo/t530/cmos.default M src/mainboard/lenovo/t530/cmos.layout M src/mainboard/lenovo/x1_carbon_gen1/cmos.default M src/mainboard/lenovo/x1_carbon_gen1/cmos.layout M src/mainboard/lenovo/x220/cmos.default M src/mainboard/lenovo/x220/cmos.layout M src/mainboard/lenovo/x230/cmos.default M src/mainboard/lenovo/x230/cmos.layout M src/southbridge/intel/bd82x6x/pch.h 22 files changed, 122 insertions(+), 19 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/29669/18 -- To view, visit https://review.coreboot.org/c/coreboot/+/29669 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2b73e32ff5af8ea64a47e8aa706e27648aaf0993 Gerrit-Change-Number: 29669 Gerrit-PatchSet: 18 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-CC: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/amd/birman: Add a region specifically for AMDFW
by Bao Zheng (Code Review) 08 Apr '23

08 Apr '23

Attention is currently required from: Jason Glenesk, Matt DeVillier, Zheng Bao, Fred Reitberger, Felix Held. Hello Zheng Bao, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/74291 to review the following change. Change subject: mb/amd/birman: Add a region specifically for AMDFW ...................................................................... mb/amd/birman: Add a region specifically for AMDFW Change-Id: Iae2ef4f886cb4796b792ce4855d87e24b32357b7 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M src/mainboard/amd/birman/board_phoenix_32M.fmd M src/mainboard/amd/birman/chromeos_phoenix_32M.fmd M src/soc/amd/phoenix/Makefile.inc 3 files changed, 18 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/74291/1 diff --git a/src/mainboard/amd/birman/board_phoenix_32M.fmd b/src/mainboard/amd/birman/board_phoenix_32M.fmd index b05f343..1546335 100644 --- a/src/mainboard/amd/birman/board_phoenix_32M.fmd +++ b/src/mainboard/amd/birman/board_phoenix_32M.fmd @@ -2,11 +2,12 @@ BIOS_BOTTOM 16M { EC_SIG 4K FMAP 4K - COREBOOT(CBFS) + AMDFW(CBFS) EC_BODY@15872K 256K RW_MRC_CACHE 256K } BIOS_TOP @16M { AMDFWBODY + COREBOOT(CBFS) @8M } } diff --git a/src/mainboard/amd/birman/chromeos_phoenix_32M.fmd b/src/mainboard/amd/birman/chromeos_phoenix_32M.fmd index 750148e..52165f4 100644 --- a/src/mainboard/amd/birman/chromeos_phoenix_32M.fmd +++ b/src/mainboard/amd/birman/chromeos_phoenix_32M.fmd @@ -6,7 +6,7 @@ RO_SECTION { FMAP 2K RO_FRID 64 - COREBOOT(CBFS) + AMDFW(CBFS) GBB 448K } } @@ -34,5 +34,6 @@ } BIOS_TOP @16M { AMDFWBODY + COREBOOT(CBFS) @8M } } diff --git a/src/soc/amd/phoenix/Makefile.inc b/src/soc/amd/phoenix/Makefile.inc index 37b58dd..ae285f0 100644 --- a/src/soc/amd/phoenix/Makefile.inc +++ b/src/soc/amd/phoenix/Makefile.inc @@ -252,6 +252,10 @@ $(OPT_SPL_TABLE_FILE) \ --location $(CONFIG_AMD_FWM_POSITION) \ --output $@ +ifeq ($(CONFIG_COREBOOT_ROMSIZE_KB),32768) +regions-for-file-apu/amdfw=AMDFW +$(info region-amdfw $(call regions-for-file,apu/amdfw)) +endif ifeq ($(CONFIG_AMDFW_SPLIT),y) $(obj)/amdfw.rom.body: $(obj)/amdfw.rom -- To view, visit https://review.coreboot.org/c/coreboot/+/74291 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iae2ef4f886cb4796b792ce4855d87e24b32357b7 Gerrit-Change-Number: 74291 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: demo. 32m
by Bao Zheng (Code Review) 08 Apr '23

08 Apr '23

Attention is currently required from: Jason Glenesk, Matt DeVillier, Zheng Bao, Fred Reitberger, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Matt DeVillier, Zheng Bao, Fred Reitberger, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/72964 to look at the new patch set (#6). Change subject: demo. 32m ...................................................................... demo. 32m Change-Id: I684e6b803c4e2882d1cab71fb9e2974cb9dd68d4 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M src/mainboard/amd/birman/Kconfig 1 file changed, 11 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/72964/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/72964 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I684e6b803c4e2882d1cab71fb9e2974cb9dd68d4 Gerrit-Change-Number: 72964 Gerrit-PatchSet: 6 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: soc/amd/spi: Mmap 32M/64M flash
by Bao Zheng (Code Review) 08 Apr '23

08 Apr '23

Attention is currently required from: Bao Zheng, Jason Glenesk, Raul Rangel, Marshall Dawson, Matt DeVillier, Zheng Bao, Martin Roth, Fred Reitberger, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Matt DeVillier, Zheng Bao, Martin Roth, Fred Reitberger, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74260 to look at the new patch set (#7). Change subject: soc/amd/spi: Mmap 32M/64M flash ...................................................................... soc/amd/spi: Mmap 32M/64M flash For the flash size bigger than 16M, AMD SOC maps only one 16M page at a time and use SPI ROM page register to switch pages. We let CBFS and flashmap access the physical SPI device not being aware the existence of the switcher. We need to switch back to page 0 in munmap because the FSP relies on this fact. This is one of series of patches to support 32/64M flash. The most important one. BUG=b:255374782 Change-Id: Ibd2bf1390635494443cac9ee8600a4a741a78c0d Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M src/soc/amd/common/block/lpc/Kconfig M src/soc/amd/common/block/lpc/Makefile.inc A src/soc/amd/common/block/lpc/spi_map_big.c 3 files changed, 119 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/74260/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/74260 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibd2bf1390635494443cac9ee8600a4a741a78c0d Gerrit-Change-Number: 74260 Gerrit-PatchSet: 7 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: soc/intel/common: Order the CPUs based on their APIC IDs
by Subrata Banik (Code Review) 08 Apr '23

08 Apr '23

Attention is currently required from: Sridhar Siricilla. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72131 ) Change subject: soc/intel/common: Order the CPUs based on their APIC IDs ...................................................................... Patch Set 12: (1 comment) File src/soc/intel/common/block/acpi/cpu_hybrid.c: https://review.coreboot.org/c/coreboot/+/72131/comment/8dde4c22_799ae7b0 PS12, Line 31: uint8_t total_cpu_cnt; > This is still within total core count of Intel SOC for now. But, I can update it to uint16_t which can support higher CPU count(beyond 255). should be of 2-byte -- To view, visit https://review.coreboot.org/c/coreboot/+/72131 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8ab6053ffd036185d74d5469fbdf36d48e0021ce Gerrit-Change-Number: 72131 Gerrit-PatchSet: 12 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Comment-Date: Sat, 08 Apr 2023 14:41:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: ACPI: Add helper for MADT LAPIC NMIs
by Sridhar Siricilla (Code Review) 08 Apr '23

08 Apr '23

Attention is currently required from: Lance Zhao, Tim Wawrzynczak, Ronak Kanabar, Kyösti Mälkki. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74311 ) Change subject: ACPI: Add helper for MADT LAPIC NMIs ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74311 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2cb8676efc1aba1b154fd04c49e53b2530239b4c Gerrit-Change-Number: 74311 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Sat, 08 Apr 2023 11:46:20 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/intel/common: Order the CPUs based on their APIC IDs
by Sridhar Siricilla (Code Review) 08 Apr '23

08 Apr '23

Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72131 ) Change subject: soc/intel/common: Order the CPUs based on their APIC IDs ...................................................................... Patch Set 12: (2 comments) File src/soc/intel/common/block/acpi/cpu_hybrid.c: https://review.coreboot.org/c/coreboot/+/72131/comment/300cdcfb_62a3d44f PS12, Line 28: int32_t apic_ids[CONFIG_MAX_CPUS]; > uint32_t I don't think APIC ID numbering can go beyond 2,147,483,647, so this shouldn't be any issue! I too agree there won't be any negative APIC number, but this might require type change for argument of bubblesort() API. If so, existing bubblesort() API can't be used for negative numbers. https://review.coreboot.org/c/coreboot/+/72131/comment/28e40239_8f5002e8 PS12, Line 31: uint8_t total_cpu_cnt; > How does this work for >255 local APICs ? This is still within total core count of Intel SOC for now. But, I can update it to uint16_t which can support higher CPU count(beyond 255). -- To view, visit https://review.coreboot.org/c/coreboot/+/72131 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8ab6053ffd036185d74d5469fbdf36d48e0021ce Gerrit-Change-Number: 72131 Gerrit-PatchSet: 12 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Sat, 08 Apr 2023 10:25:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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coreboot-gerrit April 2023