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Change subject: soc/amd/mendocino: update FSP parameters for eDP power sequence adjustment
......................................................................
soc/amd/mendocino: update FSP parameters for eDP power sequence adjustment
Update UPD parameters for eDP power sequence adjustment.
1. Set edp_panel_t8_ms for varybl to blon.
2. Set edp_panel_t9_ms for bloff to varybloff.
BUG=b:271704149
TEST=Build; Verify the UPD was pass to system integrated table.
Signed-off-by: Chris Wang <chris.wang(a)amd.corp-partner.google.com>
Change-Id: Ibdf50db12d982b45edca205e8f4612deb702453d
---
M src/soc/amd/mendocino/chip.h
M src/soc/amd/mendocino/fsp_m_params.c
2 files changed, 24 insertions(+), 4 deletions(-)
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Change subject: mb/google/skyrim/var/winterhold: adjust eDP panel power sequence
......................................................................
mb/google/skyrim/var/winterhold: adjust eDP panel power sequence
1. Set edp_panel_t8_ms to 112ms
2. Set edp_panel_t9_ms to 8ms
BUG=b:271704149
BRANCH=none
TEST=Build; Verify the UPD was passed to system integrated table.
Signed-off-by: Chris Wang <chris.wang(a)amd.corp-partner.google.com>
Change-Id: Ifefd47a86e53d574098ae2e5bd2f41ae79353385
---
M src/mainboard/google/skyrim/variants/winterhold/overridetree.cb
1 file changed, 19 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/74759/4
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Change subject: vc/amd/fsp/mendocino/FspmUpd: Update UPD structure for MDN-FSP
......................................................................
vc/amd/fsp/mendocino/FspmUpd: Update UPD structure for MDN-FSP
Update UPD structure to align with MDN-FSP. Also, rename the UDP name to
match the eDP sequence timing in ms.
BUG=b:271704149
BRANCH=none
Test=Build/Boot to ChromeOS
Signed-off-by: Chris Wang <chris.wang(a)amd.corp-partner.google.com>
Change-Id: Id410c40a65c0fd4b9b73cf36dc1f08eba0a3e44c
---
M src/vendorcode/amd/fsp/mendocino/FspmUpd.h
1 file changed, 20 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/74757/2
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Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74774 )
Change subject: device/Kconfig: Reduce PCIe hotplug bus numbers and IO resources
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
> Hey Jeremy. […]
Will let Jeremy comments first.
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Change subject: drivers/i2c: Add PI7C9X2G608GP PCIe switch driver (pi608gp)
......................................................................
Patch Set 14: Code-Review+1
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Change subject: drivers/i2c: Add PI7C9X2G608GP PCIe switch driver (pi608gp)
......................................................................
Patch Set 14:
(1 comment)
Commit Message:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-175012):
https://review.coreboot.org/c/coreboot/+/74433/comment/93b7ec00_10e67786
PS14, Line 29: Link to the datasheet:
Possible unwrapped commit description (prefer a maximum 72 chars per line)
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Change subject: drivers/i2c: Add PI7C9X2G608GP PCIe switch driver (pi608gp)
......................................................................
drivers/i2c: Add PI7C9X2G608GP PCIe switch driver (pi608gp)
This patch adds some of the variety of configuration options exported
by the Pericom Inc. PI7C9X2G608GP PCIe switch over its SMBus interface.
Currently implemented options are only used to adjust the switch
upstream port amplitude and de-emphasis levels in millivolts. Only
values specified in the switch datasheet (in tables 6-6 and 6-8) are
allowed.
Example of a devicetree.cb entry:
chip drivers/i2c/pi608gp
register "gen2_3p5_enable" = "true"
register "gen2_3p5_amp" = "AMP_LVL_MV(425)"
register "gen2_3p5_deemph" = \
"DEEMPH_LVL_MV(37, 5)"
device i2c 0x6f on
ops pi608gp_ops
end
end
Link to the datasheet:
https://web.archive.org/web/20210225074853/https://www.diodes.com/assets/Da…
BUG=none
TEST=Create devicetree.cb and Kconfig entries for this driver
in a mainboard containing the switch and verify, that the values read
out from the switch config space match the values programmed over the
SMBus.
Change-Id: Id191c4e97b99da58efd3ba38bf8cca3603ece4d5
Signed-off-by: Jan Samek <jan.samek(a)siemens.com>
---
A src/drivers/i2c/pi608gp/Kconfig
A src/drivers/i2c/pi608gp/Makefile.inc
A src/drivers/i2c/pi608gp/chip.h
A src/drivers/i2c/pi608gp/pi608gp.c
A src/drivers/i2c/pi608gp/pi608gp.h
5 files changed, 257 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/74433/14
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74121 )
Change subject: [RFC] drivers/option: Add option list in cbtable
......................................................................
Patch Set 2:
(1 comment)
File src/drivers/option/cfr.h:
https://review.coreboot.org/c/coreboot/+/74121/comment/42ffa177_16c4bed5
PS2, Line 10: SETUP_MENU_VAR_FLAG_READONLY = 1 << 0,
: SETUP_MENU_VAR_FLAG_GRAYOUT = 1 << 1,
: SETUP_MENU_VAR_FLAG_SUPPRESS = 1 << 2,
> This will make for some very long lines, maybe just RDONLY, GRAYED and SUPPRS?
Or shorten the prefix: CFR_OPTFLAG_
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