coreboot-gerrit April 2023

coreboot-gerrit@coreboot.org

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[L] Change in coreboot[master]: drivers/i2c: Add PI7C9X2G608GP PCIe switch driver (pi608gp)
by Paul Menzel (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Mario Scheithauer, Lean Sheng Tan, Werner Zeh, Jan Samek. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74433 ) Change subject: drivers/i2c: Add PI7C9X2G608GP PCIe switch driver (pi608gp) ...................................................................... Patch Set 13: (2 comments) File src/drivers/i2c/pi608gp/pi608gp.c: https://review.coreboot.org/c/coreboot/+/74433/comment/6160f8ae_4dcba32e PS12, Line 48: { 0, 0} > I would like to keep the numbers aligned, as it reads better and can be easier compared with the tab […] Oh, now I noticed it. It is probably one of the cases, where automatic formatting tools are also going to trip. But coreboot does not use those yet, so I am marking this as resolved. https://review.coreboot.org/c/coreboot/+/74433/comment/b1813b7f_c11bc6cb PS12, Line 71: /* Compose the SMBus message for register read init operation (from MSB to LSB): : Byte 1: 7:3 = Rsvd., 2:0 = Command, : Byte 2: 7:4 = Rsvd., 3:0 = Port Select[4:1], : Byte 3: 7 = Port Select[0], 6 = Rsvd., 5:2 = Byte Enable, 1:0 = Reg. Addr. [11:10], : Byte 4: 7:0 = Reg. Addr.[9:2] (Reg. Addr. [1:0] fixed to 0). */ > Can you please elaborate, e.g. […] I’d use: /* * Compose … * […] */ -- To view, visit https://review.coreboot.org/c/coreboot/+/74433 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id191c4e97b99da58efd3ba38bf8cca3603ece4d5 Gerrit-Change-Number: 74433 Gerrit-PatchSet: 13 Gerrit-Owner: Jan Samek <jan.samek(a)siemens.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Jan Samek <jan.samek(a)siemens.com> Gerrit-Comment-Date: Wed, 26 Apr 2023 09:43:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Jan Samek <jan.samek(a)siemens.com> Gerrit-MessageType: comment

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[L] Change in coreboot[master]: [RFC] drivers/option: Add option list in cbtable
by Sean Rhodes (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Benjamin Doron, Angel Pons, Maximilian Brune, Lean Sheng Tan. Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74121 ) Change subject: [RFC] drivers/option: Add option list in cbtable ...................................................................... Patch Set 2: (1 comment) File src/drivers/option/cfr.h: https://review.coreboot.org/c/coreboot/+/74121/comment/67d6500d_5c850615 PS2, Line 10: SETUP_MENU_VAR_FLAG_READONLY = 1 << 0, : SETUP_MENU_VAR_FLAG_GRAYOUT = 1 << 1, : SETUP_MENU_VAR_FLAG_SUPPRESS = 1 << 2, This will make for some very long lines, maybe just RDONLY, GRAYED and SUPPRS? -- To view, visit https://review.coreboot.org/c/coreboot/+/74121 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I304de7d26d79245a2e31a6d01f6c5643b31cb772 Gerrit-Change-Number: 74121 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Daniel Maslowski <info(a)orangecms.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Wed, 26 Apr 2023 09:40:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: device/Kconfig: Reduce PCIe hotplug bus numbers and IO resources
by Nico Huber (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Jeremy Soller, Arthur Heymans. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74774 ) Change subject: device/Kconfig: Reduce PCIe hotplug bus numbers and IO resources ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/74774 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8371958037d479e7d2053f49814735e15461ca6e Gerrit-Change-Number: 74774 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 26 Apr 2023 09:39:27 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/siemens/mc_ehl: Remove subdir 'spd' from Makefile
by Mario Scheithauer (Code Review) 26 Apr '23

26 Apr '23

Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74780 ) Change subject: mb/siemens/mc_ehl: Remove subdir 'spd' from Makefile ...................................................................... mb/siemens/mc_ehl: Remove subdir 'spd' from Makefile Since commit 833bb448c521 ("mb/siemens/mc_ehl: Remove spd.bin from CBFS"), the subdir 'spd' is no longer necessary. Change-Id: Ibaf44e3181b2167aa83cffcc59835196e4cb5cdb Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/mainboard/siemens/mc_ehl/Makefile.inc 1 file changed, 13 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/74780/1 diff --git a/src/mainboard/siemens/mc_ehl/Makefile.inc b/src/mainboard/siemens/mc_ehl/Makefile.inc index e34eddb..574d595 100644 --- a/src/mainboard/siemens/mc_ehl/Makefile.inc +++ b/src/mainboard/siemens/mc_ehl/Makefile.inc @@ -1,7 +1,5 @@ ## SPDX-License-Identifier: GPL-2.0-only -subdirs-y += spd - bootblock-y += bootblock.c romstage-y += romstage_fsp_params.c -- To view, visit https://review.coreboot.org/c/coreboot/+/74780 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibaf44e3181b2167aa83cffcc59835196e4cb5cdb Gerrit-Change-Number: 74780 Gerrit-PatchSet: 1 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/amd/common/block/cpu: Add missing cbfs_unmap()
by Arthur Heymans (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Konrad Adamczyk, Jason Glenesk, Raul Rangel, Jakub Czapiga, Matt DeVillier, Paul Menzel, Grzegorz Bernacki, Tim Van Patten, Fred Reitberger, Karthik Ramasubramanian, Felix Held. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74777 ) Change subject: soc/amd/common/block/cpu: Add missing cbfs_unmap() ...................................................................... Patch Set 1: Code-Review-1 (1 comment) File src/soc/amd/common/block/cpu/update_microcode.c: https://review.coreboot.org/c/coreboot/+/74777/comment/109ea493_6db27134 PS1, Line 110: c Updating microcode happens in parallel if I recall correctly. You need to use an atomic operation (atomic_t). -- To view, visit https://review.coreboot.org/c/coreboot/+/74777 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I200d24df6157cc6d06bade34809faefea9f0090a Gerrit-Change-Number: 74777 Gerrit-PatchSet: 1 Gerrit-Owner: Grzegorz Bernacki Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Konrad Adamczyk <konrada(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Konrad Adamczyk <konrada(a)google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Grzegorz Bernacki Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 26 Apr 2023 09:32:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/intel/common: Make ramtop offset configurable
by Dinesh Gehlot (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Sean Rhodes, Subrata Banik, Lean Sheng Tan. Dinesh Gehlot has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74511 ) Change subject: soc/intel/common: Make ramtop offset configurable ...................................................................... Patch Set 5: (1 comment) File src/soc/intel/common/basecode/ramtop/ramtop.c: https://review.coreboot.org/c/coreboot/+/74511/comment/86adc49a_25d3f011 PS5, Line 19: RAMTOP_CMOS_OFFSET In the earlier code, the `RAMTOP_CMOS_OFFSET` macro was set to a fixed value of 100. The cmos_write() function used this value to write to the CMOS memory. In current changes cmos_write() uses newly created configurable option `CONFIG_RAMTOP_OFFSET` to write CMOS memory. However, RAMTOP_CMOS_OFFSET is still defined, even though it is not used anywhere in this file. I am curious about the uses of RAMTOP_CMOS_OFFSET. Could you please explain? -- To view, visit https://review.coreboot.org/c/coreboot/+/74511 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5327b5d4e78b715a85072e5d9a62cf8fd2ae92c0 Gerrit-Change-Number: 74511 Gerrit-PatchSet: 5 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Wed, 26 Apr 2023 09:20:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/nissa/var/craask: avoid camera LED blinking during boot
by Tyler Wang (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Tarun Tuli, Reka Norman, Jimmy Su, Eric Lai. Tyler Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74728 ) Change subject: mb/google/nissa/var/craask: avoid camera LED blinking during boot ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > Please describe the D15 in VCM, also if we enable D15 in VCM, can that remove from the sensor side? Hi Jimmy, Base on this CL, we remove D15 related settings and "ACPI_DEVICE_SLEEP_D3_COLD" in VCM, rear camera privacy LED won't blink during system boot to OS, and rear camera looks work normally. Could you help to review/test it at your side? Thanks. -- To view, visit https://review.coreboot.org/c/coreboot/+/74728 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I78ed5efe1e2c071d817c1e0455271886e89e63c7 Gerrit-Change-Number: 74728 Gerrit-PatchSet: 1 Gerrit-Owner: Jimmy Su <jimmy.su(a)intel.com> Gerrit-Reviewer: Jimmy Su <jimmy.su(a)intel.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andy Yeh <andy.yeh(a)intel.com> Gerrit-CC: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-CC: Tian Shu Qiu <tian.shu.qiu(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Jimmy Su <jimmy.su(a)intel.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Wed, 26 Apr 2023 09:06:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/nissa/var/yavilla: Add elan touchscreen support
by Eric Lai (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Tarun Tuli, Chen-Tsung Hsieh, Tony Huang. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74776 ) Change subject: mb/google/nissa/var/yavilla: Add elan touchscreen support ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/brya/variants/yavilla/overridetree.cb: https://review.coreboot.org/c/coreboot/+/74776/comment/4e81bbe2_40c1958b PS1, Line 168: register "stop_delay_ms" = "280" > It's for bring-up. Timing will be measured after device arrives. […] suggest ask vendor for the IC spec for the timing. fine to me though. -- To view, visit https://review.coreboot.org/c/coreboot/+/74776 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2779c2930d89ff42233f9b20bd8abdf6dc00c0e0 Gerrit-Change-Number: 74776 Gerrit-PatchSet: 1 Gerrit-Owner: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Chen-Tsung Hsieh <chentsung(a)chromium.org> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-CC: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Chen-Tsung Hsieh <chentsung(a)chromium.org> Gerrit-Attention: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Wed, 26 Apr 2023 09:00:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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[L] Change in coreboot[master]: [RFC] drivers/option: Add option list in cbtable
by Angel Pons (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Benjamin Doron, Maximilian Brune, Lean Sheng Tan. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74121 ) Change subject: [RFC] drivers/option: Add option list in cbtable ...................................................................... Patch Set 2: (2 comments) Patchset: PS1: > Looking at EDK2's UefiInternalFormRespresentation header, I had some ideas: > - Should we have per-option help text? We could, but we either need to make it required (so options without a help text would need to provide an empty string) or we need to add a way to know if the CFR string for the help text is present (which would complicate parsing; for enum options, you'd have an optional help text field followed by a variable-length list of enum values). > - Currently, I mark all options as RESET_REQUIRED. If it's likely some options won't require a reset to apply, can we add a flag? coreboot options always need a reset, because the flow is as follows: - coreboot starts executing - coreboot reads option values from backend - coreboot writes CFR structures - coreboot jumps to payload - payload starts - payload processes CFR structures - payload reads current option values from backend - payload displays setup menu to user - user changes some coreboot options and saves them - payload writes new option values to backend At this point, the backend contains the new option values, but coreboot doesn't know about them yet. Let's suppose someone (the user or the payload) requests a reset, this is what happens next: - payload issues system/full reset - system resets - coreboot starts executing - coreboot reads option values from backend - coreboot writes CFR structures ... and so on. However, payload-specific options (e.g. boot order) may not need a reset. If coreboot provides these options to the payload through CFR, then CFR indeed needs a field to know that these options don't need a reset. > - Please add an `OPTION_TEXT`, so we can notify the user. For instance, boards might display "EEPROM corrupted, contact manufacturer" `OPTION_TEXT` or `OPTION_STRING` would work to display a read-only message in the setup menu; will add structures for this. For out-of-menu warnings, we probably want something else. > - When we think about dependencies between options, we should consider logical relationships - `suppressif X AND NOT Y` - Since there is also OR, maybe tag these and we'll process them in order - if necessary, we can provide a field(s) for equality operators. Another thing to consider behaviour if the dependencies fail - suppress, grayout or allow the behaviour to be determined? The last one adds more complexity. > > There's a lot more that's possible, such as arithmetic, bitwise logic and shifts, 'casting' type operators (including string `TO_LOWER` and `TO_UPPER`), but these get harder to justify and I'd rather neither of us implement the entire IFR language Yeah... Right now, the suppress/grayout stuff is static, i.e. `suppressif TRUE/FALSE`. To express dynamic dependencies, the idea would be to add new records that map to options using option ID values. We could avoid several pitfalls by disallowing forward references to options, i.e. a dependency expression cannot use option IDs that haven't been defined yet. Not sure what we'll need to do in the future, but it should be possible to extend the structures. File src/drivers/option/cfr.c: https://review.coreboot.org/c/coreboot/+/74121/comment/e3382301_e9236dd6 PS1, Line 22: /* TODO: error handling? */ : die("%s: bad size (start = %" PRIxPTR ", end = %" PRIxPTR ")", : __func__, start, end); : > Should we remove this record from the list by returning 0? Then, `lb_new_record()` will find this sa […] This is a sanity check so that `end - start` can safely be casted to `uint32_t`. `start > end` (size would be negative) shouldn't happen unless there's a bug in the code. `end - start > UINT32_MAX` means that one of the CFR records is larger than 4 GiB, which shouldn't happen unless there's a bug in the code or someone tried to add an absurdly humongous amount of information in CFR. Given that cbtables are located below 4 GiB, one would run into some other problem (hitting already-used memory addresses, e.g. TSEG or MMIO) well before a record's size exceeds 4 GiB. TL;DR the TODO can be removed. Maybe replace the comment with a summary of this comment. -- To view, visit https://review.coreboot.org/c/coreboot/+/74121 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I304de7d26d79245a2e31a6d01f6c5643b31cb772 Gerrit-Change-Number: 74121 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Daniel Maslowski <info(a)orangecms.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Wed, 26 Apr 2023 08:55:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/nissa/var/yavilla: Add elan touchscreen support
by Derek Huang (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Tarun Tuli, Chen-Tsung Hsieh, Tony Huang. Derek Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74776 ) Change subject: mb/google/nissa/var/yavilla: Add elan touchscreen support ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74776 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2779c2930d89ff42233f9b20bd8abdf6dc00c0e0 Gerrit-Change-Number: 74776 Gerrit-PatchSet: 1 Gerrit-Owner: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Chen-Tsung Hsieh <chentsung(a)chromium.org> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-CC: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Chen-Tsung Hsieh <chentsung(a)chromium.org> Gerrit-Attention: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Wed, 26 Apr 2023 08:54:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit April 2023