coreboot-gerrit April 2023

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: mb/google/nissa/var/yavilla: Add elan touchscreen support
by Eric Lai (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Tarun Tuli, Chen-Tsung Hsieh, Tony Huang, Derek Huang. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74776 ) Change subject: mb/google/nissa/var/yavilla: Add elan touchscreen support ...................................................................... Patch Set 1: Code-Review+2 (1 comment) File src/mainboard/google/brya/variants/yavilla/overridetree.cb: https://review.coreboot.org/c/coreboot/+/74776/comment/365a2b9c_6804d940 PS1, Line 168: register "stop_delay_ms" = "280" wondering why stop need 280ms. -- To view, visit https://review.coreboot.org/c/coreboot/+/74776 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2779c2930d89ff42233f9b20bd8abdf6dc00c0e0 Gerrit-Change-Number: 74776 Gerrit-PatchSet: 1 Gerrit-Owner: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Chen-Tsung Hsieh <chentsung(a)chromium.org> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-CC: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Chen-Tsung Hsieh <chentsung(a)chromium.org> Gerrit-Attention: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Attention: Derek Huang <derekhuang(a)google.com> Gerrit-Comment-Date: Wed, 26 Apr 2023 08:38:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: device/Kconfig: Reduce PCIe hotplug bus numbers and IO resources
by Werner Zeh (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Jeremy Soller, Arthur Heymans. Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74774 ) Change subject: device/Kconfig: Reduce PCIe hotplug bus numbers and IO resources ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: Hey Jeremy. Since you added this feature back then you might have a better insight on why you chose 32 buses from start on. -- To view, visit https://review.coreboot.org/c/coreboot/+/74774 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8371958037d479e7d2053f49814735e15461ca6e Gerrit-Change-Number: 74774 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 26 Apr 2023 08:34:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/nissa/var/yavilla: Add elan touchscreen support
by Tony Huang (Code Review) 26 Apr '23

26 Apr '23

Tony Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74776 ) Change subject: mb/google/nissa/var/yavilla: Add elan touchscreen support ...................................................................... mb/google/nissa/var/yavilla: Add elan touchscreen support Update devicetree to support ELAN I2C generic touchscreen. BUG=b:273791621 BRANCH=firmware-nissa-15217.B TEST=emerge-nissa coreboot Change-Id: I2779c2930d89ff42233f9b20bd8abdf6dc00c0e0 Signed-off-by: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brya/variants/yavilla/overridetree.cb 1 file changed, 32 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/74776/1 diff --git a/src/mainboard/google/brya/variants/yavilla/overridetree.cb b/src/mainboard/google/brya/variants/yavilla/overridetree.cb index f7798e7..33e5571 100644 --- a/src/mainboard/google/brya/variants/yavilla/overridetree.cb +++ b/src/mainboard/google/brya/variants/yavilla/overridetree.cb @@ -156,6 +156,22 @@ end end device ref i2c1 on + chip drivers/i2c/generic + register "hid" = ""ELAN0001"" + register "desc" = ""ELAN Touchscreen"" + register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)" + register "probed" = "1" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)" + register "reset_delay_ms" = "20" + register "reset_off_delay_ms" = "2" + register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)" + register "stop_delay_ms" = "280" + register "stop_off_delay_ms" = "2" + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)" + register "enable_delay_ms" = "1" + register "has_power_resource" = "1" + device i2c 10 on end + end chip drivers/i2c/hid register "generic.hid" = ""ELAN2513"" register "generic.desc" = ""ELAN Touchscreen"" -- To view, visit https://review.coreboot.org/c/coreboot/+/74776 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2779c2930d89ff42233f9b20bd8abdf6dc00c0e0 Gerrit-Change-Number: 74776 Gerrit-PatchSet: 1 Gerrit-Owner: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: device/Kconfig: Reduce PCIe hotplug bus numbers and IO resources
by Werner Zeh (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Arthur Heymans. Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74774 ) Change subject: device/Kconfig: Reduce PCIe hotplug bus numbers and IO resources ...................................................................... Patch Set 2: Code-Review+1 (1 comment) Patchset: PS2: I support this approach since having 32 external, hot-pluggable buses is really a lot which might not be a common use case. Even if you think of a PCIe switch behind a thunderbolt port I guess common amount of port will be somewhere between 4 and 8. -- To view, visit https://review.coreboot.org/c/coreboot/+/74774 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8371958037d479e7d2053f49814735e15461ca6e Gerrit-Change-Number: 74774 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 26 Apr 2023 08:14:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: acpi: Add a runtime method to override exposed _Sx sleep states
by Lean Sheng Tan (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Lance Zhao, Nico Huber, Paul Menzel, Tim Wawrzynczak, Maximilian Brune, Arthur Heymans, Werner Zeh, Jan Samek. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74762 ) Change subject: acpi: Add a runtime method to override exposed _Sx sleep states ...................................................................... Patch Set 8: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74762 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic21830c1ef9c183b1e3005cc1f8b7daf7e9ea998 Gerrit-Change-Number: 74762 Gerrit-PatchSet: 8 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jan Samek <jan.samek(a)siemens.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Jan Samek <jan.samek(a)siemens.com> Gerrit-Comment-Date: Wed, 26 Apr 2023 08:09:39 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: util/cbmem: Add REG_NEWLINE flag to fix matching pattern
by Konrad Adamczyk (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Raul Rangel, Jakub Czapiga, Grzegorz Bernacki. Konrad Adamczyk has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74742 ) Change subject: util/cbmem: Add REG_NEWLINE flag to fix matching pattern ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/74742/comment/ac069d44_59a6ad4e PS1, Line 13: REG_NEWLINE > How was this working before? Did we change the banner? TL;DR: `How was this working before?` - Match occured not on the first line, but until `Starting kernel...` log (basically, whole boot log). `Did we change the banner?` - Change of BANNER_REGEX was introduced in https://review.coreboot.org/c/coreboot/+/62720. `-- Long version stars here --`: Before this CL, if `cbmem` buffer contained logs from two boots, match for regex occured three times: 1. Whole boot log (from `coreboot-` till `Starting kernel...` where three dots at the end matched BANNER_REGEX), 2. Second boot log (from `coreboot-` till `Starting kernel...`) (due to `.?`) 3. Second boot log again (from `coreboot-` till `Starting kernel...`) Because the `.*` and `.?` matched characters including newlines (keep in mind that at the end of `Starting kernel...` there're `\n` characters) It can be checked by looking at the `match.rm_so` and `match.rm_eo`. `cbmem -c` showed whole log since the matching pattern is applied only `if (type != CONSOLE_PRINT_FULL)`. For `cbmem -1`, the cursor position was set to the start of the second boot log (off by one `\n`), so we're fine (I believe no one noticed missing `\n` at the beginning of the boot log). However, for the `cbmem -2`, we've hit: ``` if (type == CONSOLE_PRINT_PREVIOUS) { console_c[cursor] = '\0'; cursor = previous; } ``` where before this if statement, `cursor` was equal to `previous + 1`, so the next character in `console_c` buffer was NULL - that's why the `cbmem -2` was not working properly (due to `.?` in regex matched newlines). Change from https://review.coreboot.org/c/coreboot/+/62720 introduced this issue (by switching to REG_EXTENDED syntax and using `.?`). Prior to this CL, `cbmem -2` worked fine since only two (instead of three) matches occured (no `.?` in BANNER_REGEX). `-- Long version ends here --` Nevertheless, please correct me if I'm wrong here - I believe that the intention was to not catch newlines with particular regex (since regex itself contains escaped `\n` characters to be matched explicitly). Moreover, I believe that this code shall match only the first line of boot log, not the whole boot log to `Starting kernel...`. Adding REG_NEWLINE to `rexcomp` does exactly that (while keeping the loglevel markers support in place). If you think there's a better way to solve it, I'd be grateful to hear your ideas. -- To view, visit https://review.coreboot.org/c/coreboot/+/74742 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9e924349ead0fa7eea8b9ad5161138a4c4946ade Gerrit-Change-Number: 74742 Gerrit-PatchSet: 1 Gerrit-Owner: Konrad Adamczyk <konrada(a)google.com> Gerrit-Reviewer: Grzegorz Bernacki Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Grzegorz Bernacki Gerrit-Comment-Date: Wed, 26 Apr 2023 08:06:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: acpi/acpi.c: Reduce scope of some functions
by Subrata Banik (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Lance Zhao, Martin L Roth, Arthur Heymans, Werner Zeh. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74756 ) Change subject: acpi/acpi.c: Reduce scope of some functions ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74756 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f8282f308506a68b14ce3101f11078cb13709f2 Gerrit-Change-Number: 74756 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Jan Samek <jan.samek(a)siemens.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Wed, 26 Apr 2023 07:58:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/rex: Add USB4 ANX7452 Rev 2 to USB_DB FW_CONFIG
by Subrata Banik (Code Review) 26 Apr '23

26 Apr '23

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74775 ) Change subject: mb/google/rex: Add USB4 ANX7452 Rev 2 to USB_DB FW_CONFIG ...................................................................... mb/google/rex: Add USB4 ANX7452 Rev 2 to USB_DB FW_CONFIG This patch adds new USB_DB FW_CONFIG to enable support for USB4 ANX7452 Rev 2. BUG=b:279647370 TEST=Able to build and boot google/rex with Proto 2 SKU Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I878b591e5919d05d3c5fc2eefdeb492e95d4f7b5 --- M src/mainboard/google/rex/variants/rex0/overridetree.cb 1 file changed, 17 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/74775/1 diff --git a/src/mainboard/google/rex/variants/rex0/overridetree.cb b/src/mainboard/google/rex/variants/rex0/overridetree.cb index ebe1428..ef517df 100644 --- a/src/mainboard/google/rex/variants/rex0/overridetree.cb +++ b/src/mainboard/google/rex/variants/rex0/overridetree.cb @@ -27,6 +27,7 @@ option USB4_KB8010 2 option USB4_ANX7452 3 option USB4_HAYDEN_BRIDGE 4 + option USB4_ANX7452_V2 5 end field FP 15 option FP_PRESENT 0 -- To view, visit https://review.coreboot.org/c/coreboot/+/74775 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I878b591e5919d05d3c5fc2eefdeb492e95d4f7b5 Gerrit-Change-Number: 74775 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: device/Kconfig: Reduce PCIe hotplug bus numbers and IO resources
by Arthur Heymans (Code Review) 26 Apr '23

26 Apr '23

Arthur Heymans has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/74774 ) Change subject: device/Kconfig: Reduce PCIe hotplug bus numbers and IO resources ...................................................................... device/Kconfig: Reduce PCIe hotplug bus numbers and IO resources The rationale behind this change is that multiple nested bridges using a lot of bus numbers and IO resources is not likely to be a common hotplug setup. When there is a large amount of hotplug ports using 32 subordinate busses results in boot failures (e.g. make qemu). 8K IO busses for hotplug devices is also excessive in most use cases when only 64K is available in total (again make qemu results in failure to allocate resources but does boot to payload). Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Change-Id: I8371958037d479e7d2053f49814735e15461ca6e --- M src/device/Kconfig 1 file changed, 22 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/74774/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74774 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8371958037d479e7d2053f49814735e15461ca6e Gerrit-Change-Number: 74774 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: device/Kconfig: Reduce PCIe hotplug bus numbers and IO resources
by Arthur Heymans (Code Review) 26 Apr '23

26 Apr '23

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74774 ) Change subject: device/Kconfig: Reduce PCIe hotplug bus numbers and IO resources ...................................................................... device/Kconfig: Reduce PCIe hotplug bus numbers and IO resources The rationale behind this change is that multiple nested bridges using a lot of bus numbers and IO resources is not likely to be a common setup. When there is a large amount of hotplug ports using 32 subordinate busses results in boot failures (e.g. make qemu). 8K IO busses for hotplug devices is also excessive in most use cases when only 64K is available in total (again make qemu results in failure to allocate resources but does boot to payload). Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Change-Id: I8371958037d479e7d2053f49814735e15461ca6e --- M src/device/Kconfig 1 file changed, 22 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/74774/1 diff --git a/src/device/Kconfig b/src/device/Kconfig index ef73c40..27d2419 100644 --- a/src/device/Kconfig +++ b/src/device/Kconfig @@ -703,12 +703,10 @@ config PCIEXP_HOTPLUG_BUSES int "PCI Express Hotplug Buses" - default 8 if ECAM_MMCONF_SUPPORT && ECAM_MMCONF_BUS_NUMBER <= 64 - default 16 if ECAM_MMCONF_SUPPORT && ECAM_MMCONF_BUS_NUMBER <= 128 - default 32 + default 8 help This is the number of buses allocated for hotplug PCI express - bridges, for use by hotplugged child devices. The default is 32 + bridges, for use by hotplugged child devices. The default is 8 buses. config PCIEXP_HOTPLUG_MEM @@ -745,11 +743,11 @@ config PCIEXP_HOTPLUG_IO hex "PCI Express Hotplug I/O Space" - default 0x2000 + default 0x800 help This is the amount of I/O space to allocate to hot-plug PCI express bridges, for use by hotplugged child devices. The default - is 8 KiB. + is 2 KiB. endif # PCIEXP_HOTPLUG -- To view, visit https://review.coreboot.org/c/coreboot/+/74774 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8371958037d479e7d2053f49814735e15461ca6e Gerrit-Change-Number: 74774 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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coreboot-gerrit April 2023