coreboot-gerrit April 2023

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: soc/intel/alderlake: Add option to disable C1E
by Subrata Banik (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Tarun Tuli, YH Lin, Joey Peng, Nick Vaccaro, Eric Lai. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74727 ) Change subject: soc/intel/alderlake: Add option to disable C1E ...................................................................... Patch Set 7: (1 comment) Patchset: PS7: is this really a chromeos specific change? IMO, this should be applied to SoC code directly as in C1E is not available for RPL certain stepping if (cpu_id == CPUID_RAPTORLAKE_P_J0 || cpu_id == CPUID_RAPTORLAKE_P_Q0) s_cfg->C1e = 0; else s_cfg->C1e = 1; -- To view, visit https://review.coreboot.org/c/coreboot/+/74727 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic2d2d5d6075de25141c1d08ec18838731c63a342 Gerrit-Change-Number: 74727 Gerrit-PatchSet: 7 Gerrit-Owner: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Kevin3 Yang <kevin3.yang(a)lcfc.corp-partner.google.com> Gerrit-CC: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Wed, 26 Apr 2023 11:48:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/brya/var/taeko: Disable C1E for RPL CPU
by build bot (Jenkins) (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Tarun Tuli. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74786 ) Change subject: mb/google/brya/var/taeko: Disable C1E for RPL CPU ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/brya/variants/taeko/variant.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-175027): https://review.coreboot.org/c/coreboot/+/74786/comment/ee15549c_252ba3b3 PS1, Line 24: else if (cpu_id == CPUID_ALDERLAKE_R0) { else should follow close brace '}' -- To view, visit https://review.coreboot.org/c/coreboot/+/74786 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5e4c74aa288f1c824c5e7ce83090cf61d7653183 Gerrit-Change-Number: 74786 Gerrit-PatchSet: 1 Gerrit-Owner: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Comment-Date: Wed, 26 Apr 2023 11:45:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/brya/var/taeko: Disable C1E for RPL CPU
by Joey Peng (Code Review) 26 Apr '23

26 Apr '23

Joey Peng has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74786 ) Change subject: mb/google/brya/var/taeko: Disable C1E for RPL CPU ...................................................................... mb/google/brya/var/taeko: Disable C1E for RPL CPU Disable C1E on RPL CPU for improving acoustic noise tests BUG=b:278654939 TEST:emerge-brya coreboot and check that C1E can be disabled on RPL CPU Signed-off-by: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Change-Id: I5e4c74aa288f1c824c5e7ce83090cf61d7653183 --- M src/mainboard/google/brya/variants/taeko/variant.c 1 file changed, 34 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/74786/1 diff --git a/src/mainboard/google/brya/variants/taeko/variant.c b/src/mainboard/google/brya/variants/taeko/variant.c index b44e9e3..4defc98 100644 --- a/src/mainboard/google/brya/variants/taeko/variant.c +++ b/src/mainboard/google/brya/variants/taeko/variant.c @@ -1,9 +1,28 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <fw_config.h> +#include <baseboard/variants.h> +#include <console/console.h> +#include <cpu/cpu.h> +#include <cpu/intel/cpu_ids.h> #include <sar.h> const char *get_wifi_sar_cbfs_filename(void) { return get_wifi_sar_fw_config_filename(FW_CONFIG_FIELD(WIFI_SAR_ID)); } + +void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config) +{ + //Disable C1E for RPL CPU + + uint32_t cpu_id = cpu_get_cpuid(); + if (cpu_id == CPUID_RAPTORLAKE_P_J0 || cpu_id == CPUID_RAPTORLAKE_P_Q0) { + config->c1e = 0; + printk(BIOS_INFO, "Disable C1E for RPL CPU\n"); + } + else if (cpu_id == CPUID_ALDERLAKE_R0) { + config->c1e = 1; + printk(BIOS_INFO, "Keep C1E enabled for ADL CPU\n"); + } +} -- To view, visit https://review.coreboot.org/c/coreboot/+/74786 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5e4c74aa288f1c824c5e7ce83090cf61d7653183 Gerrit-Change-Number: 74786 Gerrit-PatchSet: 1 Gerrit-Owner: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: [WIP] mb/prodrive/atlas: Put options in CFR cbtable
by Lean Sheng Tan (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Sean Rhodes, Christian Walter, Angel Pons, Maximilian Brune. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74122 ) Change subject: [WIP] mb/prodrive/atlas: Put options in CFR cbtable ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > Would it be an idea to generate a much of these in common code? Presumably everyone using it will ha […] don’t Sean… that is another round of work 😆 -- To view, visit https://review.coreboot.org/c/coreboot/+/74122 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I47585a9a6f94ab5005f2ab63a0df267c0caef231 Gerrit-Change-Number: 74122 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Comment-Date: Wed, 26 Apr 2023 11:42:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sean Rhodes <sean(a)starlabs.systems> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/alderlake: Add option to disable C1E
by Joey Peng (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Tarun Tuli, YH Lin, Joey Peng, Nick Vaccaro, Eric Lai. Hello build bot (Jenkins), YH Lin, Tarun Tuli, Subrata Banik, Nick Vaccaro, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74727 to look at the new patch set (#7). Change subject: soc/intel/alderlake: Add option to disable C1E ...................................................................... soc/intel/alderlake: Add option to disable C1E Add option to disable C1E BUG=b:278654939 TEST:emerge-brya coreboot Signed-off-by: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Change-Id: Ic2d2d5d6075de25141c1d08ec18838731c63a342 --- M src/soc/intel/alderlake/chip.h M src/soc/intel/alderlake/fsp_params.c 2 files changed, 24 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/74727/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/74727 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic2d2d5d6075de25141c1d08ec18838731c63a342 Gerrit-Change-Number: 74727 Gerrit-PatchSet: 7 Gerrit-Owner: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Kevin3 Yang <kevin3.yang(a)lcfc.corp-partner.google.com> Gerrit-CC: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: [WIP] mb/prodrive/atlas: Put options in CFR cbtable
by Sean Rhodes (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Christian Walter, Angel Pons, Maximilian Brune, Lean Sheng Tan. Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74122 ) Change subject: [WIP] mb/prodrive/atlas: Put options in CFR cbtable ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Would it be an idea to generate a much of these in common code? Presumably everyone using it will have HyperThreading, VTd etc. -- To view, visit https://review.coreboot.org/c/coreboot/+/74122 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I47585a9a6f94ab5005f2ab63a0df267c0caef231 Gerrit-Change-Number: 74122 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Wed, 26 Apr 2023 11:41:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[master]: [RFC] drivers/option: Add option list in cbtable
by Angel Pons (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Sean Rhodes, Benjamin Doron, Angel Pons, Maximilian Brune. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74121 ) Change subject: [RFC] drivers/option: Add option list in cbtable ...................................................................... Patch Set 2: (1 comment) Patchset: PS1: > > Looking at EDK2's UefiInternalFormRespresentation header, I had some ideas: […] Also, for everything UI-related, there's something we haven't cared about so far: localisation (i.e. support for multiple languages). Which is a *huge* can of worms. -- To view, visit https://review.coreboot.org/c/coreboot/+/74121 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I304de7d26d79245a2e31a6d01f6c5643b31cb772 Gerrit-Change-Number: 74121 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Daniel Maslowski <info(a)orangecms.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Comment-Date: Wed, 26 Apr 2023 11:34:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Benjamin Doron <benjamin.doron00(a)gmail.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/common: Make ramtop offset configurable
by Sean Rhodes (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Subrata Banik, Dinesh Gehlot, Lean Sheng Tan. Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74511 ) Change subject: soc/intel/common: Make ramtop offset configurable ...................................................................... Patch Set 7: (1 comment) Patchset: PS7: > I will test this CL on Rex (MTL) and get back Thank you -- To view, visit https://review.coreboot.org/c/coreboot/+/74511 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5327b5d4e78b715a85072e5d9a62cf8fd2ae92c0 Gerrit-Change-Number: 74511 Gerrit-PatchSet: 7 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Wed, 26 Apr 2023 11:27:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/alderlake: Select FSP MULTIPHASE SI INIT RETURN BROKEN config
by build bot (Jenkins) (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Tarun Tuli. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74785 ) Change subject: soc/intel/alderlake: Select FSP_MULTIPHASE_SI_INIT_RETURN_BROKEN config ...................................................................... Patch Set 1: (1 comment) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-175025): https://review.coreboot.org/c/coreboot/+/74785/comment/13d31ff8_7130e0ad PS1, Line 6: Possible long commit subject (prefer a maximum 65 characters) -- To view, visit https://review.coreboot.org/c/coreboot/+/74785 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I18a918cca7e19e03ed6020c55c86c64a94212963 Gerrit-Change-Number: 74785 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Comment-Date: Wed, 26 Apr 2023 11:20:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/alderlake: Select FSP MULTIPHASE SI INIT RETURN BROKEN config
by Subrata Banik (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Tarun Tuli. Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74785 ) Change subject: soc/intel/alderlake: Select FSP_MULTIPHASE_SI_INIT_RETURN_BROKEN config ...................................................................... soc/intel/alderlake: Select FSP_MULTIPHASE_SI_INIT_RETURN_BROKEN config At present the problem has only been reported with Alder Lake and Raptor Lake FSP where MultiPhaseSiInit API is unable to return any ERROR status. Hence, this patch ensures to select applicable W/A config to read FSP return status from the FSP Reset HOB. BUG=b:278665768 TEST=Able to select FSP_MULTIPHASE_SI_INIT_RETURN_BROKEN for ADL/RPL SoC code and call into this API to know the return status from MultiPhaseSiInit FSP API. Without this patch: IshInit() Start IshDisable() Start IshPerformGlobalReset() .... .... FSP returning control to Bootloader with reset required return status 40000003 FspMultiPhaseSiInit Index-1 returned 0 <-- after control returns into coreboot, the `status` from the FSP API is reset to `0` instead 0x40000003. Hence, coreboot avoid hitting the reset. With this patch: IshInit() Start IshDisable() Start IshPerformGlobalReset() .... .... FSP returning control to Bootloader with reset required return status 40000003 FSP: handling reset type 40000003 <-- coreboot is able to understand the reset request in proper. GLOBAL RESET! global_reset() called! HECI: Global Reset(Type:1) Command Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I18a918cca7e19e03ed6020c55c86c64a94212963 --- M src/soc/intel/alderlake/Kconfig 1 file changed, 49 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/74785/1 diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index cce2052..0e5a671 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -61,6 +61,7 @@ select FSP_COMPRESS_FSP_S_LZ4 select FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW select FSP_M_XIP + select FSP_MULTIPHASE_SI_INIT_RETURN_BROKEN select FSP_STATUS_GLOBAL_RESET_REQUIRED_3 select FSP_USES_CB_DEBUG_EVENT_HANDLER select FSPS_HAS_ARCH_UPD -- To view, visit https://review.coreboot.org/c/coreboot/+/74785 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I18a918cca7e19e03ed6020c55c86c64a94212963 Gerrit-Change-Number: 74785 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-MessageType: newchange

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coreboot-gerrit April 2023