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Change subject: soc/intel/common: Introduce API to get the FSP Reset Status
......................................................................
Patch Set 1:
(1 comment)
File src/soc/intel/common/fsp_reset.c:
https://review.coreboot.org/c/coreboot/+/74783/comment/71037126_d692651a
PS1, Line 54: if (!CONFIG(FSP_MULTIPHASE_SI_INIT_RETURN_BROKEN))
: return 0;
> In the next patch the caller also checks this.
yeah, i just wanted to make sure, no one directly calls into it outside the silicon_init.c file.
WDYT?
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Change subject: util/ifdtool/ifdtool.c: Fix default FMAP generation
......................................................................
Patch Set 5:
(1 comment)
File util/ifdtool/ifdtool.c:
https://review.coreboot.org/c/coreboot/+/74735/comment/a3c2fe78_33df04d5
PS4, Line 461: eegion
> region
Done
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Hello build bot (Jenkins), Matt DeVillier, Stefan Reinauer,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/74735
to look at the new patch set (#5).
Change subject: util/ifdtool/ifdtool.c: Fix default FMAP generation
......................................................................
util/ifdtool/ifdtool.c: Fix default FMAP generation
According to SPI programming guide, a region limit of 0 as well as
region base of 7FFFh indicates an unused/reserved region.
Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com>
Change-Id: I790d7f5631ecef3043b2c17c41430dc4fd854f72
---
M util/ifdtool/ifdtool.c
1 file changed, 23 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/74735/5
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Change subject: mb/siemens/mc_ehl: Remove subdir 'spd' from Makefile
......................................................................
Patch Set 1: Code-Review+1
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Change subject: mb/google/skyrim/var/winterhold: adjust the eDP panel power sequence
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-175033):
https://review.coreboot.org/c/coreboot/+/74790/comment/b39ab51f_a486b027
PS1, Line 9: set Set edp_panel_t9_ms to 8ms which means it will delay 8ms
Possible repeated word: 'set'
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