coreboot-gerrit February 2023

coreboot-gerrit@coreboot.org

1 participants
5082 discussions

[S] Change in coreboot[master]: soc/mediatek/common: Implement VM18 enable interface to supply power ...
by Rex-BC Chen (Code Review) 03 Feb '23

03 Feb '23

Attention is currently required from: Hung-Te Lin, Liju-Clr Chen, Rex-BC Chen, Yu-Ping Wu, Yidi Lin. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72747 ) Change subject: soc/mediatek/common: Implement VM18 enable interface to supply power for BOE_TV110C9M_LL0 ...................................................................... Patch Set 1: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/72747/comment/53ff1305_01e66cf3 PS1, Line 7: Implement VM18 enable interface to supply power for BOE_TV110C9M_LL0 soc/mediatek: Add support for regulator VM18 https://review.coreboot.org/c/coreboot/+/72747/comment/42875b53_e46d2892 PS1, Line 9: Implement VM18 enable interface to supply power for BOE_TV110C9M_LL0. To provide power to mipi panel BOE_TV110C9M_LL0, add support for regulator VM18. https://review.coreboot.org/c/coreboot/+/72747/comment/391222cd_588f4346 PS1, Line 12: test firmware display pass for BOE_TV110C9M_LL0 on Geralt proto : board test firmware display pass for BOE_TV110C9M_LL0 on Geralt. -- To view, visit https://review.coreboot.org/c/coreboot/+/72747 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib8c3b2df1157b23b37492b1e9b1716903ea67799 Gerrit-Change-Number: 72747 Gerrit-PatchSet: 1 Gerrit-Owner: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Fri, 03 Feb 2023 09:13:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: mb/google/geralt: Add power on sequence for BOE_TV110C9M_LL0
by build bot (Jenkins) (Code Review) 03 Feb '23

03 Feb '23

Attention is currently required from: Hung-Te Lin, Rex-BC Chen. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72749 ) Change subject: mb/google/geralt: Add power on sequence for BOE_TV110C9M_LL0 ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/geralt/panel_geralt.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169806): https://review.coreboot.org/c/coreboot/+/72749/comment/48bed2c0_39c2c58e PS1, Line 22: static int mipi_panel_reg_mask (u8 addr, u8 val, u8 mask) space prohibited between function name and open parenthesis '(' -- To view, visit https://review.coreboot.org/c/coreboot/+/72749 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3ef0b2e26d8cc0dc35c2985363ee4c3557dac8a9 Gerrit-Change-Number: 72749 Gerrit-PatchSet: 1 Gerrit-Owner: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Comment-Date: Fri, 03 Feb 2023 09:06:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: soc/mediatek/common: Implement VM18 enable interface to supply power ...
by build bot (Jenkins) (Code Review) 03 Feb '23

03 Feb '23

Attention is currently required from: Hung-Te Lin. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72747 ) Change subject: soc/mediatek/common: Implement VM18 enable interface to supply power for BOE_TV110C9M_LL0 ...................................................................... Patch Set 1: (1 comment) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169804): https://review.coreboot.org/c/coreboot/+/72747/comment/5f916b8a_910bae70 PS1, Line 6: Possible long commit subject (prefer a maximum 65 characters) -- To view, visit https://review.coreboot.org/c/coreboot/+/72747 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib8c3b2df1157b23b37492b1e9b1716903ea67799 Gerrit-Change-Number: 72747 Gerrit-PatchSet: 1 Gerrit-Owner: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Comment-Date: Fri, 03 Feb 2023 09:06:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: mb/google/geralt: Add power on sequence for BOE_TV110C9M_LL0
by Liju-Clr Chen (Code Review) 03 Feb '23

03 Feb '23

Attention is currently required from: Hung-Te Lin, Rex-BC Chen. Hello Rex-BC Chen, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/72749 to review the following change. Change subject: mb/google/geralt: Add power on sequence for BOE_TV110C9M_LL0 ...................................................................... mb/google/geralt: Add power on sequence for BOE_TV110C9M_LL0 Add power sequence to power on BOE_TV110C9M_LL0 on Geralt proto board. BUG=b:244208960 TEST=test firmware display pass for BOE_TV110C9M_LL0 on Geralt proto board Change-Id: I3ef0b2e26d8cc0dc35c2985363ee4c3557dac8a9 Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Signed-off-by: Liju-Clr Chen <liju-clr.chen(a)mediatek.com> --- M src/mainboard/google/geralt/panel_geralt.c M src/soc/mediatek/mt8188/Makefile.inc 2 files changed, 73 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/72749/1 diff --git a/src/mainboard/google/geralt/panel_geralt.c b/src/mainboard/google/geralt/panel_geralt.c index bbb1060..78dd8f9 100644 --- a/src/mainboard/google/geralt/panel_geralt.c +++ b/src/mainboard/google/geralt/panel_geralt.c @@ -2,13 +2,36 @@ #include <boardid.h> #include <boot/coreboot_tables.h> +#include <console/console.h> +#include <device/i2c_simple.h> +#include <delay.h> #include <gpio.h> #include <soc/gpio_common.h> +#include <soc/i2c.h> +#include <soc/regulator.h> +#include <soc/mt6359p.h> +#include <soc/pmif.h> #include <string.h> #include "gpio.h" #include "panel.h" +#define MIPI_PANEL_I2C I2C3 +#define MIPI_PANEL_SLAVE 0x3E + +static int mipi_panel_reg_mask (u8 addr, u8 val, u8 mask) +{ + u8 msg = 0; + + if (i2c_read_field(MIPI_PANEL_I2C, MIPI_PANEL_SLAVE, addr, &msg, 0xFF, 0)) + printk(BIOS_ERR, "Rex: failed to read i2c: %d\n", addr); + + msg &= ~mask; + msg |= val; + + return i2c_write_field(MIPI_PANEL_I2C, MIPI_PANEL_SLAVE, addr, msg, 0xFF, 0); +} + static void configure_mipi_pwm_backlight(void) { gpio_output(GPIO_AP_DISP_BKLTEN, 0); @@ -22,7 +45,38 @@ static void power_on_mipi_boe_tv110c9m_ll0(void) { - /* TODO: Add the poweron for BOE_TV110C9M_LL0 when we get BOE_TV110C9M_LL0 */ + int ret = 0; + + /* Enable VM18V */ + mt6359p_init(); + mainboard_enable_regulator(MTK_REGULATOR_VDD18, true); + + /* Initialize I2C3 */ + mtk_i2c_bus_init(MIPI_PANEL_I2C, I2C_SPEED_FAST); + mdelay(10); + + gpio_output(GPIO(DSI0_LCM_RST), 0); + mdelay(1); + + gpio_output(GPIO(GPIO03), 1); + gpio_output(GPIO(GPIO04), 1); + mdelay(10); + + /* Set AVDD = 5.7V */ + ret = mipi_panel_reg_mask(0x00, 0x11, 0x1F); + + /* Set AVEE = -5.7V */ + ret = mipi_panel_reg_mask(0x01, 0x11, 0x1F); + + /* Disable AVDD & AVEE discharge when power on*/ + ret = mipi_panel_reg_mask(0x03, 0x30, 0xFF); + + gpio_output(GPIO(DSI0_LCM_RST), 1); + mdelay(1); + gpio_output(GPIO(DSI0_LCM_RST), 0); + mdelay(1); + gpio_output(GPIO(DSI0_LCM_RST), 1); + mdelay(6); } static void power_on_edp_mutto_b152731e1(void) diff --git a/src/soc/mediatek/mt8188/Makefile.inc b/src/soc/mediatek/mt8188/Makefile.inc index 7ac988b..95df6dc 100644 --- a/src/soc/mediatek/mt8188/Makefile.inc +++ b/src/soc/mediatek/mt8188/Makefile.inc @@ -49,6 +49,7 @@ ramstage-y += ../common/mtcmos.c mtcmos.c ramstage-y += ../common/pmif.c ../common/pmif_clk.c pmif_clk.c ramstage-y += ../common/pmif_spi.c pmif_spi.c +ramstage-y += ../common/pmif_spmi.c pmif_spmi.c ramstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c ramstage-y += soc.c ramstage-y += ../common/spm.c spm.c -- To view, visit https://review.coreboot.org/c/coreboot/+/72749 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3ef0b2e26d8cc0dc35c2985363ee4c3557dac8a9 Gerrit-Change-Number: 72749 Gerrit-PatchSet: 1 Gerrit-Owner: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-MessageType: newchange

1 0

[S] Change in coreboot[master]: mb/google/geralt: Add regulator VM18 support to supply power for BOE_...
by Liju-Clr Chen (Code Review) 03 Feb '23

03 Feb '23

Liju-Clr Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/72748 ) Change subject: mb/google/geralt: Add regulator VM18 support to supply power for BOE_TV110C9M_LL0 ...................................................................... mb/google/geralt: Add regulator VM18 support to supply power for BOE_TV110C9M_LL0 Add regulator VM18 support to supply power for BOE_TV110C9M_LL0. BUG=b:244208960 TEST=test firmware display pass for BOE_TV110C9M_LL0 on Geralt proto board Change-Id: I13bafbe10a18a18e253575fd107c9b415f28ef01 Signed-off-by: Sen Chu <sen.chu(a)mediatek.corp-partner.google.com> Signed-off-by: Liju-Clr Chen <liju-clr.chen(a)mediatek.com> --- M src/mainboard/google/geralt/regulator.c 1 file changed, 21 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/72748/1 diff --git a/src/mainboard/google/geralt/regulator.c b/src/mainboard/google/geralt/regulator.c index 6089af9..f3b4407 100644 --- a/src/mainboard/google/geralt/regulator.c +++ b/src/mainboard/google/geralt/regulator.c @@ -19,6 +19,8 @@ return MT6359P_PA; case MTK_REGULATOR_VMC: return MT6359P_SIM1; + case MTK_REGULATOR_VDD18: + return MT6359P_VM18; default: return MTK_REGULATOR_INVALID; } @@ -70,6 +72,8 @@ mt6359p_enable_vsim1(enable); else if (id == MT6359P_PA) mt6359p_enable_vpa(enable); + else if (id == MT6359P_VM18) + mt6359p_enable_vm18(enable); else printk(BIOS_INFO, "No need to enable regulator ID: %d\n", regulator); -- To view, visit https://review.coreboot.org/c/coreboot/+/72748 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I13bafbe10a18a18e253575fd107c9b415f28ef01 Gerrit-Change-Number: 72748 Gerrit-PatchSet: 1 Gerrit-Owner: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-MessageType: newchange

1 0

[S] Change in coreboot[master]: soc/mediatek/common: Implement VM18 enable interface to supply power ...
by Liju-Clr Chen (Code Review) 03 Feb '23

03 Feb '23

Liju-Clr Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/72747 ) Change subject: soc/mediatek/common: Implement VM18 enable interface to supply power for BOE_TV110C9M_LL0 ...................................................................... soc/mediatek/common: Implement VM18 enable interface to supply power for BOE_TV110C9M_LL0 Implement VM18 enable interface to supply power for BOE_TV110C9M_LL0. BUG=b:244208960 TEST=test firmware display pass for BOE_TV110C9M_LL0 on Geralt proto board Change-Id: Ib8c3b2df1157b23b37492b1e9b1716903ea67799 Signed-off-by: Sen Chu <sen.chu(a)mediatek.corp-partner.google.com> --- M src/soc/mediatek/common/include/soc/mt6359p.h M src/soc/mediatek/common/include/soc/regulator.h M src/soc/mediatek/common/mt6359p.c 3 files changed, 25 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/72747/1 diff --git a/src/soc/mediatek/common/include/soc/mt6359p.h b/src/soc/mediatek/common/include/soc/mt6359p.h index a53be63..4bb6249 100644 --- a/src/soc/mediatek/common/include/soc/mt6359p.h +++ b/src/soc/mediatek/common/include/soc/mt6359p.h @@ -33,6 +33,7 @@ PMIC_VSIM1_CON0 = 0x1cd0, PMIC_VSRAM_PROC1_ELR = 0x1b44, PMIC_VSRAM_PROC2_ELR = 0x1b46, + PMIC_VM18_CON0 = 0x1d88, PMIC_VSRAM_PROC1_VOSEL1 = 0x1e90, PMIC_VSRAM_PROC2_VOSEL1 = 0x1eb0, PMIC_VSIM1_ANA_CON0 = 0x1fa2, @@ -60,6 +61,7 @@ MT6359P_CORE, MT6359P_PA, MT6359P_SIM1, + MT6359P_VM18, MT6359P_MAX, }; @@ -84,6 +86,7 @@ u32 mt6359p_get_vsim1_voltage(void); void mt6359p_enable_vpa(bool enable); void mt6359p_enable_vsim1(bool enable); +void mt6359p_enable_vm18(bool enable); void mt6359p_write_field(u32 reg, u32 val, u32 mask, u32 shift); void pmic_init_setting(void); void pmic_lp_setting(void); diff --git a/src/soc/mediatek/common/include/soc/regulator.h b/src/soc/mediatek/common/include/soc/regulator.h index 7f3bd49..e2b9251 100644 --- a/src/soc/mediatek/common/include/soc/regulator.h +++ b/src/soc/mediatek/common/include/soc/regulator.h @@ -22,6 +22,7 @@ MTK_REGULATOR_VSRAM_PROC12, MTK_REGULATOR_VRF12, MTK_REGULATOR_VCN33, + MTK_REGULATOR_VDD18, MTK_REGULATOR_NUM, }; diff --git a/src/soc/mediatek/common/mt6359p.c b/src/soc/mediatek/common/mt6359p.c index de22b3e..fc98efc 100644 --- a/src/soc/mediatek/common/mt6359p.c +++ b/src/soc/mediatek/common/mt6359p.c @@ -324,6 +324,11 @@ mt6359p_write_field(PMIC_VSIM1_CON0, !!enable, 0x1, 0); } +void mt6359p_enable_vm18(bool enable) +{ + mt6359p_write_field(PMIC_VM18_CON0, !!enable, 0x1, 0); +} + static void init_pmif_arb(void) { if (!pmif_arb) { -- To view, visit https://review.coreboot.org/c/coreboot/+/72747 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib8c3b2df1157b23b37492b1e9b1716903ea67799 Gerrit-Change-Number: 72747 Gerrit-PatchSet: 1 Gerrit-Owner: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-MessageType: newchange

1 0

[S] Change in coreboot[master]: raptorlake: Add c-state latencies and residencies in coreboot
by Subrata Banik (Code Review) 03 Feb '23

03 Feb '23

Attention is currently required from: Tarun Tuli, Shaik Sameeruddin. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72746 ) Change subject: raptorlake: Add c-state latencies and residencies in coreboot ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/72746/comment/1f601578_18e82a59 PS2, Line 8: need better way to write commit msg plus please highlight the source of this change (i.e. which doc to refer to know the meaning of those hard-code value) -- To view, visit https://review.coreboot.org/c/coreboot/+/72746 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I49f37af2c8193f2dfb73c0fbe24528a53c5884ef Gerrit-Change-Number: 72746 Gerrit-PatchSet: 2 Gerrit-Owner: Shaik Sameeruddin <shaik.sameeruddin(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Shaik Sameeruddin <shaik.sameeruddin(a)intel.com> Gerrit-Comment-Date: Fri, 03 Feb 2023 08:58:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: raptorlake: Add c-state latencies and residencies in coreboot
by Shaik Sameeruddin (Code Review) 03 Feb '23

03 Feb '23

Attention is currently required from: Tarun Tuli, Subrata Banik. Hello Tarun Tuli, Subrata Banik, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/72746 to look at the new patch set (#2). Change subject: raptorlake: Add c-state latencies and residencies in coreboot ...................................................................... raptorlake: Add c-state latencies and residencies in coreboot Signed-off-by: Sameeruddin shaik <shaik.sameeruddin(a)intel.com> Change-Id: I49f37af2c8193f2dfb73c0fbe24528a53c5884ef --- M src/soc/intel/alderlake/acpi.c M src/soc/intel/alderlake/include/soc/cpu.h 2 files changed, 16 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/72746/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/72746 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I49f37af2c8193f2dfb73c0fbe24528a53c5884ef Gerrit-Change-Number: 72746 Gerrit-PatchSet: 2 Gerrit-Owner: Shaik Sameeruddin <shaik.sameeruddin(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: newpatchset

1 0

[L] Change in coreboot[master]: soc/amd/mendocino: Separate STAPM and STT for DPTC
by Chris Wang (Code Review) 03 Feb '23

03 Feb '23

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Tim Van Patten, Fred Reitberger, Felix Held. Chris Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71909 ) Change subject: soc/amd/mendocino: Separate STAPM and STT for DPTC ...................................................................... Patch Set 11: (1 comment) File src/soc/amd/mendocino/dptc_acpi.c: https://review.coreboot.org/c/coreboot/+/71909/comment/a111456d_686b7ab4 PS10, Line 63: /* Profile B */ > These all need extra whitespace to align them within the conditional block correctly. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/71909 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia7999753dcbb5716a3b07ef22a096b55579b80b5 Gerrit-Change-Number: 71909 Gerrit-PatchSet: 11 Gerrit-Owner: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 03 Feb 2023 08:52:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Van Patten <timvp(a)google.com> Gerrit-MessageType: comment

1 0

[L] Change in coreboot[master]: soc/amd/mendocino: Separate STAPM and STT for DPTC
by Chris Wang (Code Review) 03 Feb '23

03 Feb '23

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Tim Van Patten, Fred Reitberger, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Matt DeVillier, Fred Reitberger, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/71909 to look at the new patch set (#11). Change subject: soc/amd/mendocino: Separate STAPM and STT for DPTC ...................................................................... soc/amd/mendocino: Separate STAPM and STT for DPTC Separate the STAPM and STT for the DPTC parameter. To avoid unnecessary parameters being applied to DPTC when STT is enabled, especially SPL. BUG=b:265267957,b:265114627 BRANCH=none TEST=run Webgl aquarium with 1000 fish and no power peak observed, Signed-off-by: Chris.Wang <chris.wang(a)amd.corp-partner.google.com> Change-Id: Ia7999753dcbb5716a3b07ef22a096b55579b80b5 --- M src/soc/amd/mendocino/Makefile.inc A src/soc/amd/mendocino/dptc_acpi.c A src/soc/amd/mendocino/include/soc/dptc.h M src/soc/amd/mendocino/root_complex.c 4 files changed, 393 insertions(+), 220 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/71909/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/71909 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia7999753dcbb5716a3b07ef22a096b55579b80b5 Gerrit-Change-Number: 71909 Gerrit-PatchSet: 11 Gerrit-Owner: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit February 2023