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Change subject: libpayload: Add VBOOT_SHA_ARMV8_CE config
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/72710/comment/91be1d13_002df4f2
PS2, Line 22:
> Cq-Depend: chromium:4170144
Done
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Hello Shelley Chen, build bot (Jenkins), Douglas Anderson, Julius Werner, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
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Change subject: vboot: Add VBOOT_ARMV8_CE_SHA256_ACCELERATION config
......................................................................
vboot: Add VBOOT_ARMV8_CE_SHA256_ACCELERATION config
Add Kconfig option for VBOOT_ARMV8_CE_SHA256_ACCELERATION, which will
use ARMv8 Crypto Extension for SHA256[1] instead of software
implementation.
This will speed up firmware verification in verstage.
[1] https://crrev.com/c/4170144
BUG=b:263514393
BRANCH=corsola
TEST='calculating body hash (SHA2)' get 13 msecs improvement on
Tentacruel.
Before:
509:finished calculating body hash (SHA2) 161,548 (14,490)
After:
509:finished calculating body hash (SHA2) 155,101 (1,187)
Change-Id: I02671338fd9e0deb5294dbb7c03528061edc18c4
Signed-off-by: Yidi Lin <yidilin(a)chromium.org>
---
M src/security/vboot/Kconfig
M src/security/vboot/Makefile.inc
2 files changed, 37 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/72711/3
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Hello Shelley Chen, build bot (Jenkins), Douglas Anderson, Julius Werner, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/72710
to look at the new patch set (#3).
Change subject: libpayload: Add VBOOT_SHA_ARMV8_CE config
......................................................................
libpayload: Add VBOOT_SHA_ARMV8_CE config
Add Kconfig option for VBOOT_SHA_ARMV8_CE, which will use ARMv8 Crypto
Extension for SHA256[1] instead of software implementation.
[1] https://crrev.com/c/4170144
BUG=b:263514393
BRANCH=corsola
TEST='vboot kernel verification' gets 111 msecs improvement on
Tentacruel.
Before:
1100:finished vboot kernel verification 905,150 (123,518)
After:
1100:finished vboot kernel verification 787,277 (12,254)
Cq-Depend: chromium:4170144
Change-Id: If92830830a0658dfad2a066e9efa624783865cf2
Signed-off-by: Yidi Lin <yidilin(a)chromium.org>
---
M payloads/libpayload/vboot/Kconfig
M payloads/libpayload/vboot/Makefile.inc
2 files changed, 35 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/72710/3
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Change subject: mb/intel/mtlrvp: Enable GSPI interface
......................................................................
Patch Set 5: Code-Review+2
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Patch Set 6: Code-Review+2
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Change subject: mb/intel/mtlrvp: Enable ACPI support for Type-C ports
......................................................................
Patch Set 2: Code-Review+2
(1 comment)
File src/mainboard/intel/mtlrvp/variants/mtlrvp_p_ext_ec/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/72789/comment/6ff3c756_62562ed2
PS2, Line 7: use conn1 as mux_conn[1]
how about conn2/3?
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