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Change subject: superio/ite: Add support for ITE IT8987e
......................................................................
superio/ite: Add support for ITE IT8987e
Datasheet IT8987E/VG Preliminary Specification V0.3.1, revision B.
This is specifically to support the Acer Swift 3 mainboard addition.
See changeset 70623.
Signed-off-by: hack-char <char(a)dmail.site>
Change-Id: Ide92e41ccadcea665544a07895614fa9514619e2
---
M src/superio/ite/Makefile.inc
A src/superio/ite/it8987e/Kconfig
A src/superio/ite/it8987e/Makefile.inc
A src/superio/ite/it8987e/chip.h
A src/superio/ite/it8987e/it8987e.h
A src/superio/ite/it8987e/superio.c
6 files changed, 144 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/72827/5
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Change subject: superio/ite: Add support for ITE IT8987e
......................................................................
Patch Set 4:
(4 comments)
File src/superio/ite/it8987e/superio.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169934):
https://review.coreboot.org/c/coreboot/+/72827/comment/56bbf56e_53d3f1bc
PS4, Line 18: if (!dev->enabled)
suspect code indent for conditional statements (16, 32)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169934):
https://review.coreboot.org/c/coreboot/+/72827/comment/82624ec0_4c2eb48e
PS4, Line 70: if (!conf)
that open brace { should be on the previous line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169934):
https://review.coreboot.org/c/coreboot/+/72827/comment/9d698370_9c574869
PS4, Line 70: if (!conf)
suspect code indent for conditional statements (16, 16)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169934):
https://review.coreboot.org/c/coreboot/+/72827/comment/5a9c6771_ab8157a7
PS4, Line 73: } else {
suspect code indent for conditional statements (8, 24)
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Hello build bot (Jenkins), Felix Held,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#4).
Change subject: superio/ite: Add support for ITE IT8987e
......................................................................
superio/ite: Add support for ITE IT8987e
Datasheet IT8987E/VG Preliminary Specification V0.3.1, revision B.
This is specifically to support the Acer Swift 3 mainboard addition.
See changeset 70623.
Signed-off-by: hack-char <char(a)dmail.site>
Change-Id: Ide92e41ccadcea665544a07895614fa9514619e2
---
M src/superio/ite/Makefile.inc
A src/superio/ite/it8987e/Kconfig
A src/superio/ite/it8987e/Makefile.inc
A src/superio/ite/it8987e/chip.h
A src/superio/ite/it8987e/it8987e.h
A src/superio/ite/it8987e/superio.c
6 files changed, 146 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/72827/4
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Hello build bot (Jenkins), Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/72827
to look at the new patch set (#3).
Change subject: superio/ite: Add support for ITE IT8987e
......................................................................
superio/ite: Add support for ITE IT8987e
Datasheet IT8987E/VG Preliminary Specification V0.3.1, revision B.
This is specifically to support the Acer Swift 3 mainboard addition.
See changeset 70623.
Signed-off-by: hack-char <char(a)dmail.site>
Change-Id: Ide92e41ccadcea665544a07895614fa9514619e2
---
M src/superio/ite/Makefile.inc
A src/superio/ite/it8987e/Kconfig
A src/superio/ite/it8987e/Makefile.inc
A src/superio/ite/it8987e/chip.h
A src/superio/ite/it8987e/it8987e.h
A src/superio/ite/it8987e/superio.c
6 files changed, 146 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/72827/3
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Change subject: Adding new ITE IT8987e
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/72827/comment/87e240bc_d47c23ea
PS1, Line 11:
Please add the datasheet name and version.
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Change subject: Adding new ITE IT8987e
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/72827/comment/96af62a9_c31be8f3
PS1, Line 7: Adding new ITE IT8987e
Please use imperative mood:
> superio/ite: Add support for ITE IT8987e
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Change subject: mb/google/skyrim: Add support for and select CONFIG_VBIOS_CACHE_IN_FMAP
......................................................................
Patch Set 8:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/70900/comment/3753035e_a418f071
PS1, Line 15:
> We should add a depends_on here for a chromeos change to disable the saved psp_verstage. […]
The signed verstage has been removed from chromeos for now, so we can merge this when everything else is ready.
File src/mainboard/google/skyrim/Kconfig:
https://review.coreboot.org/c/coreboot/+/70900/comment/a6a79452_16df211e
PS8, Line 108: VBIOS_CACHE_IN_FMAP
Is there any reason we shouldn't just select this, since the cache region actually *is* in the FMAP after this change? if this isn't just saying that the FMAP has the VBIOS_CACHE region, maybe change this to USE_VBIOS_CACHE_IN_FMAP?
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Change subject: soc/amd/mendocino: Add support for VBIOS FMAP cache
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Patch Set 8: Code-Review+2
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Change subject: soc/amd/common/block/gfx: Use TPM-stored hash for vbios cache validation
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Patch Set 6: Code-Review+2
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