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Change subject: src/soc/intel/common/block/pcie/rtd3: Fix root port _ON logic
......................................................................
Patch Set 2:
(1 comment)
File src/soc/intel/common/block/pcie/rtd3/rtd3.c:
https://review.coreboot.org/c/coreboot/+/72826/comment/c278dd39_f3595649
PS2, Line 195: acpigen_emit_byte(DECREMENT_OP);
will this CL cause DECREMENT twice?
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Change subject: soc/intel/common/block/fast_spi: Add SPI BIOS decode lock
......................................................................
Patch Set 8: -Code-Review
(1 comment)
File src/soc/intel/common/block/fast_spi/fast_spi.c:
https://review.coreboot.org/c/coreboot/+/71953/comment/952d64f1_82131435
PS6, Line 467: pci_write_config32(dev, SPI_BIOS_DECODE_EN, bde);
> Done
Sorry, looking back at this I think what Paul meant is:
`pci_or_config32(dev, SPI_BIOS_DECODE_EN, SPI_BIOS_DECODE_LOCK);`
Then we can get rid of the `bde` variable and reduce the size of this function by 3 lines.
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Change subject: soc/intel/common/block/fast_spi: Add SPI BIOS decode lock
......................................................................
Patch Set 8:
(1 comment)
File src/soc/intel/common/block/fast_spi/fast_spi.c:
https://review.coreboot.org/c/coreboot/+/71953/comment/4fd4e2e3_146d71ab
PS6, Line 467: pci_write_config32(dev, SPI_BIOS_DECODE_EN, bde);
> I checked the implementation of pci_or_config32(), both pci_read_config32() and pci_write_config32() […]
Done
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Change subject: tree: drop repeated words
......................................................................
Patch Set 1: Code-Review+2
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Hello build bot (Jenkins), Felix Held,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#7).
Change subject: superio/ite: Add support for ITE IT8987e
......................................................................
superio/ite: Add support for ITE IT8987e
Datasheet IT8987E/VG Preliminary Specification V0.3.1, revision B.
This is specifically to support the Acer Swift 3 mainboard addition.
See changeset 70623.
Signed-off-by: hack-char <char(a)dmail.site>
Change-Id: Ide92e41ccadcea665544a07895614fa9514619e2
---
M src/superio/ite/Makefile.inc
A src/superio/ite/it8987e/Kconfig
A src/superio/ite/it8987e/Makefile.inc
A src/superio/ite/it8987e/chip.h
A src/superio/ite/it8987e/it8987e.h
A src/superio/ite/it8987e/superio.c
6 files changed, 144 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/72827/7
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Change subject: tree: drop repeated words
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/72795/comment/7d909ab1_4c42bfac
PS1, Line 7: drop
Nit: capitalize
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Change subject: superio/ite: Add support for ITE IT8987e
......................................................................
Patch Set 6:
(2 comments)
File src/superio/ite/it8987e/superio.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169936):
https://review.coreboot.org/c/coreboot/+/72827/comment/698a74de_6eaef0a9
PS6, Line 18: if (!dev->enabled) {
braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169936):
https://review.coreboot.org/c/coreboot/+/72827/comment/aa3fc0c8_22ebd76b
PS6, Line 72: } else {
suspect code indent for conditional statements (8, 24)
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Hello build bot (Jenkins), Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/72827
to look at the new patch set (#6).
Change subject: superio/ite: Add support for ITE IT8987e
......................................................................
superio/ite: Add support for ITE IT8987e
Datasheet IT8987E/VG Preliminary Specification V0.3.1, revision B.
This is specifically to support the Acer Swift 3 mainboard addition.
See changeset 70623.
Signed-off-by: hack-char <char(a)dmail.site>
Change-Id: Ide92e41ccadcea665544a07895614fa9514619e2
---
M src/superio/ite/Makefile.inc
A src/superio/ite/it8987e/Kconfig
A src/superio/ite/it8987e/Makefile.inc
A src/superio/ite/it8987e/chip.h
A src/superio/ite/it8987e/it8987e.h
A src/superio/ite/it8987e/superio.c
6 files changed, 145 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/72827/6
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Change subject: superio/ite: Add support for ITE IT8987e
......................................................................
Patch Set 5:
(5 comments)
File src/superio/ite/it8987e/superio.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169935):
https://review.coreboot.org/c/coreboot/+/72827/comment/8d48a568_5dede266
PS5, Line 18: if (!dev->enabled)
suspect code indent for conditional statements (8, 24)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169935):
https://review.coreboot.org/c/coreboot/+/72827/comment/62ddfd97_e5146349
PS5, Line 21: switch (dev->path.pnp.device) {
switch and case should be at the same indent
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169935):
https://review.coreboot.org/c/coreboot/+/72827/comment/5fb3fab2_19c8b7d2
PS5, Line 49: PNP_MSC0 | PNP_MSC1 | PNP_MSC2, 0xfffe, 0xfffe, 0xfffe, 0xfffe},
code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169935):
https://review.coreboot.org/c/coreboot/+/72827/comment/2a03f8a9_09c9e348
PS5, Line 49: PNP_MSC0 | PNP_MSC1 | PNP_MSC2, 0xfffe, 0xfffe, 0xfffe, 0xfffe},
please, no space before tabs
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169935):
https://review.coreboot.org/c/coreboot/+/72827/comment/ebc1aeeb_b635a4cc
PS5, Line 71: } else {
suspect code indent for conditional statements (8, 24)
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