coreboot-gerrit November 2023

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[main]: acpi.c: Fix generating pointer to cb_tables located >4G
by Angel Pons (Code Review) 21 Nov '23

21 Nov '23

Attention is currently required from: Arthur Heymans, Benjamin Doron, Eric Lai, Felix Held, Lance Zhao, Maximilian Brune, Tim Wawrzynczak. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76181?usp=email ) Change subject: acpi.c: Fix generating pointer to cb_tables located >4G ...................................................................... Patch Set 4: (1 comment) File src/acpi/acpi.c: https://review.coreboot.org/c/coreboot/+/76181/comment/30f68a6e_f0bf24e8 : PS4, Line 301: if (base < UINT32_MAX) It actually specifies both (that the values themselves need to be 32-bit, and that this resource descriptor describes a resource within a 32-bit address space), but the latter isn't immediately obvious. Reading the spec: https://uefi.org/htmlspecs/ACPI_Spec_6_4_html/19_ASL_Reference/ACPI_Source_… > The Memory32Fixed macro evaluates to a buffer that contains a 32-bit memory descriptor, which describes a fixed range of memory addresses. The format of this memory descriptor can be found in Section 6.4.3.4. This macro is designed to be used inside of a ResourceTemplate (Resource To Buffer Conversion Macro). Following the link to Section 6.4.3.4: https://uefi.org/htmlspecs/ACPI_Spec_6_4_html/06_Device_Configuration/Devic… > This memory range descriptor describes a device’s memory resources within a 32-bit address space. So, if I understand the above correctly, a memory resource with base = `0xfffffff0` and size = `0x00001000` is not *within* a 32-bit address space. -- To view, visit https://review.coreboot.org/c/coreboot/+/76181?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1bc553b18d08cee502b765166227810f8e619631 Gerrit-Change-Number: 76181 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 21 Nov 2023 12:46:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <inforichland(a)gmail.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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[L] Change in coreboot[main]: [RFC] drivers/option: Add forms in cbtables
by Angel Pons (Code Review) 21 Nov '23

21 Nov '23

Attention is currently required from: Benjamin Doron, Lean Sheng Tan, Martin L Roth, Maximilian Brune, Nico Huber, Patrick Rudolph, Sean Rhodes. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74121?usp=email ) Change subject: [RFC] drivers/option: Add forms in cbtables ...................................................................... Patch Set 21: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/74121/comment/1b6f4958_c76c9cd4 : PS18, Line 15: The system currently lacks a way : to describe where to find option values. > Right - I think that's a critical piece that needs to be added before we implement this. […] Agreed. Regarding support for multiple storage "backends" at the same time, how much granularity do we want? Should every option specify where it's stored, or is it enough to specify the backend to use for each top-level form (group of options)? -- To view, visit https://review.coreboot.org/c/coreboot/+/74121?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I304de7d26d79245a2e31a6d01f6c5643b31cb772 Gerrit-Change-Number: 74121 Gerrit-PatchSet: 21 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Daniel Maslowski <info(a)orangecms.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Tue, 21 Nov 2023 12:38:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Martin L Roth <gaumless(a)gmail.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/rex/var/karis: Set pen detect pin to NC for non-stylus sku
by Subrata Banik (Code Review) 21 Nov '23

21 Nov '23

Attention is currently required from: David Wu, Dinesh Gehlot, Eran Mitrani, Kapil Porwal, Tarun, Tyler Wang. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79213?usp=email ) Change subject: mb/google/rex/var/karis: Set pen detect pin to NC for non-stylus sku ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79213?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icf9171fca49cfed1a05a67ae7fc8d62b7e9630c9 Gerrit-Change-Number: 79213 Gerrit-PatchSet: 1 Gerrit-Owner: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Tue, 21 Nov 2023 12:37:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/rex/var/karis: Set pen detect pin to NC for non-stylus sku
by Tyler Wang (Code Review) 21 Nov '23

21 Nov '23

Tyler Wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79213?usp=email ) Change subject: mb/google/rex/var/karis: Set pen detect pin to NC for non-stylus sku ...................................................................... mb/google/rex/var/karis: Set pen detect pin to NC for non-stylus sku Set pen detect pin to NC base on fw_config. BUG=b:304680060 TEST=emerge-rex coreboot pass Change-Id: Icf9171fca49cfed1a05a67ae7fc8d62b7e9630c9 Signed-off-by: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> --- M src/mainboard/google/rex/variants/karis/fw_config.c 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/79213/1 diff --git a/src/mainboard/google/rex/variants/karis/fw_config.c b/src/mainboard/google/rex/variants/karis/fw_config.c index 7211d8a..ea9f9eb 100644 --- a/src/mainboard/google/rex/variants/karis/fw_config.c +++ b/src/mainboard/google/rex/variants/karis/fw_config.c @@ -30,6 +30,8 @@ static const struct pad_config stylus_disable_pads[] = { /* GPP_E04 : SOC_PEN_DETECT */ PAD_NC(GPP_E04, NONE), + /* GPP_E09 : SOC_PEN_DETECT */ + PAD_NC(GPP_E09, NONE), }; void fw_config_gpio_padbased_override(struct pad_config *padbased_table) -- To view, visit https://review.coreboot.org/c/coreboot/+/79213?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icf9171fca49cfed1a05a67ae7fc8d62b7e9630c9 Gerrit-Change-Number: 79213 Gerrit-PatchSet: 1 Gerrit-Owner: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[main]: acpi: Add IO Remapping Table structures
by Angel Pons (Code Review) 21 Nov '23

21 Nov '23

Attention is currently required from: Arthur Heymans, Cliff Huang, Lance Zhao, Martin L Roth, Naresh Solanki, Patrick Rudolph, Paul Menzel, Tim Wawrzynczak. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77884?usp=email ) Change subject: acpi: Add IO Remapping Table structures ...................................................................... Patch Set 7: Code-Review+1 (3 comments) Commit Message: PS6: > As of now, I have used specific revision as mentioned in commit message. […] Ah, so you've implemented specific revisions for the various subtables. Is there any reason not to implement the latest revision, though? Patrick was also confused about it. File src/include/acpi/acpi.h: https://review.coreboot.org/c/coreboot/+/77884/comment/954cd259_c201a9c3 : PS6, Line 92: IORT, /* Input Output Remapping Table */ > Acknowledged Might be a good idea to clarify what "proprietary ACPI tables" means. Maybe "vendor-specific" would be more accurate? But that's for another patch. File src/include/acpi/acpi.h: https://review.coreboot.org/c/coreboot/+/77884/comment/bfdd343a_bd293889 : PS4, Line 81: IORT, > We get a lot of conflicts here. […] For the record, CB:79099 took care of it. -- To view, visit https://review.coreboot.org/c/coreboot/+/77884?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4e8e3323caa714a56882939914cac510bf95d30b Gerrit-Change-Number: 77884 Gerrit-PatchSet: 7 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Comment-Date: Tue, 21 Nov 2023 12:25:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Martin L Roth <gaumless(a)gmail.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Comment-In-Reply-To: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: Disable separate romstage for emulation builds
by Angel Pons (Code Review) 21 Nov '23

21 Nov '23

Attention is currently required from: Arthur Heymans, Simon Glass. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79079?usp=email ) Change subject: Disable separate romstage for emulation builds ...................................................................... Patch Set 3: (1 comment) File src/Kconfig: https://review.coreboot.org/c/coreboot/+/79079/comment/1546aa4d_cda443a5 : PS3, Line 248: default y if !VENDOR_EMULATION Can you override the default value for `SEPARATE_ROMSTAGE` from `src/mainboard/emulation/` instead? If so, I'd prefer that. -- To view, visit https://review.coreboot.org/c/coreboot/+/79079?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic4fa8322dba9b5a46c5a73489cb396199621e068 Gerrit-Change-Number: 79079 Gerrit-PatchSet: 3 Gerrit-Owner: Simon Glass <sjg(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Simon Glass <sjg(a)chromium.org> Gerrit-Comment-Date: Tue, 21 Nov 2023 12:19:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[main]: Post-build control of serial
by Angel Pons (Code Review) 21 Nov '23

21 Nov '23

Attention is currently required from: Jérémy Compostella, Karthik Ramasubramanian, Paul Menzel, Simon Glass, Stefan Reinauer. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77712?usp=email ) Change subject: Post-build control of serial ...................................................................... Patch Set 5: (22 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/77712/comment/74609987_cdaf8d77 : PS2, Line 7: Post-build control of serial > Can you please give me an example? This change adds the CCB subsystem, *and* it also uses the CCB subsystem to allow post-build control of logging. The "and" in the previous sentence tells me that this could've been split into two commits. I imagine Paul wants a more descriptive commit summary. The problem is that summarizing what this change does (add CCB + post-build logging control), without exceeding the length limit for the commit summary, is not easy. File Documentation/technotes/ccb.md: https://review.coreboot.org/c/coreboot/+/77712/comment/6f81a540_16e937cc : PS5, Line 37: New flags can be added to `enum ccb_flags` as needed. Note that the default : value of the flag should be zero, i.e. the normal state of coreboot is to have : all flags be zero. Flags should be used to change that normal state. Be careful : not to introduce flags which requires a non-zero value for normal operation. It would be nice if you could reword this section. I'd also mention that **not-yet-defined** flag bits default to 0, and that the default value should maximize compatibility (as we do for Kconfig/runtime options; e.g. console enabled, overclocking disabled...). I would've proposed a paragraph myself, but I'm feeling somewhat unimaginative at the moment... https://review.coreboot.org/c/coreboot/+/77712/comment/48d5e678_fb759dad : PS5, Line 42: extended nit: extend*ing* https://review.coreboot.org/c/coreboot/+/77712/comment/073a479b_60b235d0 : PS5, Line 43: , nit: Either continue the sentence after the comma, or replace it with a period. https://review.coreboot.org/c/coreboot/+/77712/comment/3d24fab2_35b913f6 : PS5, Line 54: build nit: buil*t* https://review.coreboot.org/c/coreboot/+/77712/comment/08b8a341_ac708ff7 : PS5, Line 68: CMOS option feature That's the "option API", which has historically been coupled with CMOS options. https://review.coreboot.org/c/coreboot/+/77712/comment/524d489b_0541a2d1 : PS5, Line 68: could be expanded to provide an : API for CCB. I agree that CCB could benefit from some "read the value for a given option" API, but I think the option API isn't appropriate for CCB. Only one implementation of the option API can be compiled in. If support for runtime configurable options is undesired, the "null" backend (reading options always returns the fallback value, writing options always fails) can be used. However, one can implement a similar API for CCB which is separate from the option API. File src/arch/x86/postcar.c: https://review.coreboot.org/c/coreboot/+/77712/comment/9113910f_a38fb957 : PS5, Line 30: cbmem_initialize(); Looks like CBMEM init logs from postcar are no longer available. I'm not sure, but I think most platforms init CBMEM in late romstage. File src/commonlib/include/commonlib/ccb.h: https://review.coreboot.org/c/coreboot/+/77712/comment/e4a0e37b_a3f77f5b : PS5, Line 26: #define CCB_MAGIC 0xc043b001 How does one guarantee that this magic appears exactly once? The docs don't describe it. File src/console/Kconfig: https://review.coreboot.org/c/coreboot/+/77712/comment/f4de09e9_293635da : PS5, Line 440: (e.g. CBMEM) File src/console/init.c: https://review.coreboot.org/c/coreboot/+/77712/comment/e814788c_99c169b3 : PS5, Line 45: return CONSOLE_LOG_FAST; I wonder if this "silent" CCB flag could be hooked up to the "fast" console stuff File src/lib/Kconfig: https://review.coreboot.org/c/coreboot/+/77712/comment/1cee0b62_873cd794 : PS5, Line 100: # nit: Stray `#`, please remove File src/lib/ccb.c: https://review.coreboot.org/c/coreboot/+/77712/comment/be4ccd68_7fe57b98 : PS3, Line 8: struct ccb ccb_static __attribute__((section(".init"))) = { > Actually that one doesn't seem to work. […] I think it's some compiler.h thing, but I thought it was automatically included? File src/lib/ccb.c: https://review.coreboot.org/c/coreboot/+/77712/comment/2b3dcc89_0459d77a : PS5, Line 16: struct ccb *ccb_get(void) Is the CCB meant to be modifiable at runtime? https://review.coreboot.org/c/coreboot/+/77712/comment/4fb24c1a_ddd43898 : PS5, Line 23: return ccb->flags; When `!ENV_HOLDS_CCB`, this can result in a NULL dereference even when assuming that `ccb_init()` has been called: CBMEM operations may fail. https://review.coreboot.org/c/coreboot/+/77712/comment/7a1a2b2e_3b2e3d22 : PS5, Line 32: sizeof(struct ccb) nit: I'd prefer `sizeof(*ccb)` or `sizeof(*ptr)`. File src/lib/hardwaremain.c: https://review.coreboot.org/c/coreboot/+/77712/comment/a0527dad_cfaf6656 : PS5, Line 452: /* console_init() MUST PRECEDE ALL printk()! Additionally, ensure This is no longer the case, there's prints in the CCB code. File src/lib/prog_loaders.c: https://review.coreboot.org/c/coreboot/+/77712/comment/62a46740_f70523f1 : PS5, Line 5: #include <commonlib/ccb_api.h> Why? File util/cbfstool/cbfstool.c: https://review.coreboot.org/c/coreboot/+/77712/comment/692fe0c3_cd1df7ba : PS5, Line 745: table A table used as a name-to-bit-location map would be very useful. The same table could be used to both get and set values, as well as to list all known CCB flags/options. https://review.coreboot.org/c/coreboot/+/77712/comment/f760441e_dc0e6ac6 : PS5, Line 747: serial "serial" can be confused with "serial number". How about using "console" as name? https://review.coreboot.org/c/coreboot/+/77712/comment/e54fa98d_78d9e0f1 : PS5, Line 752: val = CCB_CONSOLE_SILENT; This will clobber all the other flags. Hopefully someone changes this when adding other flags. https://review.coreboot.org/c/coreboot/+/77712/comment/fd5c1ef0_0b998b0a : PS5, Line 753: "normal" I wouldn't use "normal" here, as logging is typically only needed when things don't work. And we shouldn't imply (rather tangentially, admittedly) that it's normal for coreboot to not work, right? 😜 TL;DR Let's use another term for "enable non-CBMEM logging" -- To view, visit https://review.coreboot.org/c/coreboot/+/77712?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I04e946b33035a493e833500351a0483761252613 Gerrit-Change-Number: 77712 Gerrit-PatchSet: 5 Gerrit-Owner: Simon Glass <sjg(a)chromium.org> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Simon Glass <sjg(a)chromium.org> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Simon Glass <sjg(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 21 Nov 2023 12:18:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Simon Glass <sjg(a)chromium.org> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: Update fsp submodule to upstream master
by Lean Sheng Tan (Code Review) 21 Nov '23

21 Nov '23

Attention is currently required from: Martin L Roth. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79004?usp=email ) Change subject: Update fsp submodule to upstream master ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79004?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9fe65d830061c93ceac549dc7f41e7a98646a0a3 Gerrit-Change-Number: 79004 Gerrit-PatchSet: 3 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Comment-Date: Tue, 21 Nov 2023 12:12:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/brya/var/taeko: Generate SPD ID for new supported memory part
by Paul Menzel (Code Review) 21 Nov '23

21 Nov '23

Attention is currently required from: Eric Lai, Felix Held, Leo Chou, Nick Vaccaro, Subrata Banik, YH Lin. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79184?usp=email ) Change subject: mb/google/brya/var/taeko: Generate SPD ID for new supported memory part ...................................................................... Patch Set 1: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/79184/comment/19f54902_f38b59ed : PS1, Line 7: Generate SPD ID for new supported memory part Generate SPD IDs for 2 new memory parts https://review.coreboot.org/c/coreboot/+/79184/comment/01b0818b_aea9a352 : PS1, Line 10: this part these parts https://review.coreboot.org/c/coreboot/+/79184/comment/58d9a13e_c17a53a7 : PS1, Line 9: Add taeko new supported memory parts in mem_parts_used.txt, generate : SPD id for this part. Please mention that `spd-3.hex` has to be used for those. https://review.coreboot.org/c/coreboot/+/79184/comment/c6816ca0_02ef408a : PS1, Line 12: No tab needed. -- To view, visit https://review.coreboot.org/c/coreboot/+/79184?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I221ad3f490f24b43fe1ccd211014787eab5d1038 Gerrit-Change-Number: 79184 Gerrit-PatchSet: 1 Gerrit-Owner: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 21 Nov 2023 11:21:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/nissa/var/craask: Enable PIXA touchpad for craaskvin
by Tyler Wang (Code Review) 21 Nov '23

21 Nov '23

Tyler Wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79212?usp=email ) Change subject: mb/google/nissa/var/craask: Enable PIXA touchpad for craaskvin ...................................................................... mb/google/nissa/var/craask: Enable PIXA touchpad for craaskvin BUG=None TEST=none Change-Id: I7e68a44eb3d639eaadb5b7b9cb5a6955fd059eeb Signed-off-by: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brya/variants/craask/overridetree.cb 1 file changed, 8 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/79212/1 diff --git a/src/mainboard/google/brya/variants/craask/overridetree.cb b/src/mainboard/google/brya/variants/craask/overridetree.cb index eb16142..8b04e8f 100644 --- a/src/mainboard/google/brya/variants/craask/overridetree.cb +++ b/src/mainboard/google/brya/variants/craask/overridetree.cb @@ -598,6 +598,14 @@ register "hid_desc_reg_offset" = "0x20" device i2c 0x2c on end end + chip drivers/i2c/hid + register "generic.hid" = ""PIXA2303"" + register "generic.desc" = ""PIXA Touchpad"" + register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)" + register "generic.wake" = "GPE0_DW2_14" + register "hid_desc_reg_offset" = "0x20" + device i2c 0x68 on end + end end device ref hda on chip drivers/generic/max98357a -- To view, visit https://review.coreboot.org/c/coreboot/+/79212?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7e68a44eb3d639eaadb5b7b9cb5a6955fd059eeb Gerrit-Change-Number: 79212 Gerrit-PatchSet: 1 Gerrit-Owner: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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coreboot-gerrit November 2023