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Change subject: soc/amd/common/block/noncar: Merge romstage into bootblock
......................................................................
Patch Set 27:
(1 comment)
File src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld:
https://review.coreboot.org/c/coreboot/+/64950/comment/e975e5c3_e6611dd1 :
PS27, Line 102: BOOTBLOCK(CONFIG_ROMSTAGE_ADDR, CONFIG_ROMSTAGE_SIZE)
> hmm, this ends up doing the right thing, but i found it confusing when looking at it at first. maybe a comment would help? would also be good if that was somehow integrated into the diagram above to have that cover both cases. might also be good to add a comment to the ROMSTAGE_SIZE Kconfig that this will be used as bootblock size in the combined bootblock and romstage case.
>
> a probably better option might be to have different C_ENV_BOOTBLOCK_SIZE sizes dependent on whether SEPARATE_ROMSTAGE is selected in the Kconfig and make ROMSTAGE_SIZE 0 in the !SEPARATE_ROMSTAGE case. not sure if we'd need to put the ROMSATGE macro in here in a #if CONFIG(SEPARATE_ROMSTAGE) block. the calculation of BOOTBLOCK_END and BOOTBLOCK_ADDR would also need to be reworked for that
Currently the base of bootblock gets computed from ROMSTAGE_BASE. If one just increase C_ENV_BOOTBLOCK_SIZE it might overextend downwards overlapping the PSP_SHAREDMEM_SIZE. It does reduce the amount of the amount of DRAM used as ROMSTAGE has an arbitrarily large value which you could tune if using C_ENV_BOOTBLOCK_SIZE. A better way would be to set BOOTBLOCK_BASE in Kconfig and compute romstage base based on that.
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Change subject: Don't build a separate romstage by default on most x86 targets
......................................................................
Patch Set 51:
(1 comment)
File src/security/vboot/Kconfig:
https://review.coreboot.org/c/coreboot/+/63419/comment/e8c68c07_b8fbebe1 :
PS51, Line 93: select SEPARATE_ROMSTAGE
> Why should this change here?
Board select VBOOT_STARTS_IN_BOOTBLOCK. However if that's not available because SEPARATE_ROMSTAGE is unset that will not work: "WARNING: unmet direct dependencies detected for VBOOT_STARTS_IN_BOOTBLOCK"
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Change subject: Don't build a separate romstage by default on most x86 targets
......................................................................
Patch Set 51:
(1 comment)
File src/Kconfig:
https://review.coreboot.org/c/coreboot/+/63419/comment/98629a44_6dc2e85b :
PS11, Line 1389: default n if ARCH_X86
> Should this really be a test for NO_XIP_EARLY_STAGES instead?
No I don't think so. For AMD the bootblock gets loaded into DRAM so still no XIP but that works fine as the limit is really large. It's only on Intel APL where the bootblock is limited to 32K that has NO_XIP_EARLY_STAGES that this is not going to work.
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Change subject: Post-build control of serial
......................................................................
Patch Set 5:
(1 comment)
File src/lib/ccb.c:
https://review.coreboot.org/c/coreboot/+/77712/comment/ccc523f1_41a4b3f9 :
PS5, Line 26: static void add_ccb_to_cbmem(int is_recovery)
: {
: struct ccb *ptr;
:
: ccb = ccb_get();
: if (ccb) {
: ptr = cbmem_add(CBMEM_ID_CCB, sizeof(struct ccb));
: if (ptr) {
: printk(BIOS_DEBUG, "CCB: Adding to CBMEM\n");
: *ptr = *ccb;
: }
: }
: }
This will never works as romstage does not get the setting from bootblock.
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Change subject: libpayload: Add dma_allocator_range()
......................................................................
libpayload: Add dma_allocator_range()
Some sensitive data may remain DMA buffer, we will want to zero out
everything on the DMA buffer before we jump into the kernel to
prevent leaking sensitive data into the kernel.
To accomplish that, we will need this function to get the range of
memory that can be allocated by the dma allocator.
BUG=b:248610274
TEST=emerge-cherry libpayload
BRANCH=none
Signed-off-by: Yi Chou <yich(a)google.com>
Change-Id: I8f3058dfd861ed44f716623967201b8cabe8d166
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78407
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso(a)google.com>
---
M payloads/libpayload/include/stdlib.h
M payloads/libpayload/libc/malloc.c
2 files changed, 13 insertions(+), 0 deletions(-)
Approvals:
Yu-Ping Wu: Looks good to me, approved
build bot (Jenkins): Verified
diff --git a/payloads/libpayload/include/stdlib.h b/payloads/libpayload/include/stdlib.h
index e129cd1..cb9addf 100644
--- a/payloads/libpayload/include/stdlib.h
+++ b/payloads/libpayload/include/stdlib.h
@@ -137,6 +137,7 @@
void init_dma_memory(void *start, u32 size);
int dma_initialized(void);
int dma_coherent(const void *ptr);
+void dma_allocator_range(void **start_out, size_t *size_out);
static inline void *xmalloc_work(size_t size, const char *file,
const char *func, int line)
diff --git a/payloads/libpayload/libc/malloc.c b/payloads/libpayload/libc/malloc.c
index 1fc2ef1..f8a9ddf 100644
--- a/payloads/libpayload/libc/malloc.c
+++ b/payloads/libpayload/libc/malloc.c
@@ -123,6 +123,18 @@
return !dma_initialized() || (dma->start <= ptr && dma->end > ptr);
}
+/* Get the range of memory that can be allocated by the dma allocator. */
+void dma_allocator_range(void **start_out, size_t *size_out)
+{
+ if (dma_initialized()) {
+ *start_out = dma->start;
+ *size_out = dma->end - dma->start;
+ } else {
+ *start_out = NULL;
+ *size_out = 0;
+ }
+}
+
/* Find free block of size >= len */
static hdrtype_t volatile *find_free_block(int len, struct memory_type *type)
{
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Hello Benjamin Doron, Felix Held, Lance Zhao, Lean Sheng Tan, Maximilian Brune, Nico Huber, Tim Wawrzynczak, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/76181?usp=email
to look at the new patch set (#5).
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Code-Review+2 by Lean Sheng Tan, Code-Review+2 by Tim Wawrzynczak, Verified+1 by build bot (Jenkins)
The change is no longer submittable: Code-Review and Verified are unsatisfied now.
Change subject: acpi.c: Fix generating pointer to cb_tables located >4G
......................................................................
acpi.c: Fix generating pointer to cb_tables located >4G
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
Change-Id: I1bc553b18d08cee502b765166227810f8e619631
---
M src/acpi/acpi.c
1 file changed, 6 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/76181/5
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Change subject: acpi.c: Fix generating pointer to cb_tables located >4G
......................................................................
Patch Set 4:
(1 comment)
File src/acpi/acpi.c:
https://review.coreboot.org/c/coreboot/+/76181/comment/d0b59c9e_ecb9f793 :
PS4, Line 301: if (base < UINT32_MAX)
> It actually specifies both (that the values themselves need to be 32-bit, and that this resource des […]
Done
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