coreboot-gerrit November 2023

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[main]: mb/google/geralt: Create variant Ciri
by Yidi Lin (Code Review) 15 Nov '23

15 Nov '23

Attention is currently required from: Hung-Te Lin, Paul Menzel, Ruihai Zhou. Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78954?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: mb/google/geralt: Create variant Ciri ...................................................................... Patch Set 3: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/78954/comment/3f3c0587_eb33682a : PS3, Line 10: add added -- To view, visit https://review.coreboot.org/c/coreboot/+/78954?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7bbe9ed5e722a70bab1c799a61ce38d2ad58ab25 Gerrit-Change-Number: 78954 Gerrit-PatchSet: 3 Gerrit-Owner: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Wed, 15 Nov 2023 09:23:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[main]: mb/google/corsola/var/chinchou: Configure I2C and I2S interface for A...
by Yang Wu (Code Review) 15 Nov '23

15 Nov '23

Attention is currently required from: Hung-Te Lin, Jiaxin Yu, Yang Wu, Yu-Ping Wu. Hello Hung-Te Lin, Jiaxin Yu, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79064?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/google/corsola/var/chinchou: Configure I2C and I2S interface for ALC5650 ...................................................................... mb/google/corsola/var/chinchou: Configure I2C and I2S interface for ALC5650 Configure I2S1 and I2C5 for ALC5650 to support beep sound in depthcharge. BRANCH=corsola BUG=b:305828247 TEST=Verify devbeep in depthcharge console Change-Id: Ibd098adb8d5568ad338bbfece0edfd0c38cbf854 Signed-off-by: wuyang <wuyang5(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/corsola/mainboard.c M src/soc/mediatek/mt8186/include/soc/pll.h M src/soc/mediatek/mt8186/pll.c 3 files changed, 62 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/79064/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/79064?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibd098adb8d5568ad338bbfece0edfd0c38cbf854 Gerrit-Change-Number: 79064 Gerrit-PatchSet: 4 Gerrit-Owner: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jiaxin Yu <jiaxin.yu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-CC: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jiaxin Yu <jiaxin.yu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: mb/google/geralt: Create variant Ciri
by Ruihai Zhou (Code Review) 15 Nov '23

15 Nov '23

Attention is currently required from: Hung-Te Lin, Paul Menzel. Ruihai Zhou has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78954?usp=email ) Change subject: mb/google/geralt: Create variant Ciri ...................................................................... Patch Set 3: (5 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/78954/comment/26fe4428_0f552d13 : PS2, Line 9: and enable MAX98390 AMP for it. > Maybe state, that it’s an exact copy of *Geralt*. I think it should be enough to say this is a variant of geralt https://review.coreboot.org/c/coreboot/+/78954/comment/2d102310_58e7d823 : PS2, Line 9: a > the Done https://review.coreboot.org/c/coreboot/+/78954/comment/11ae1b52_485f1e3a : PS2, Line 10: > Please state if future changes are to be expected. Done https://review.coreboot.org/c/coreboot/+/78954/comment/9deed3c1_0832495c : PS2, Line 12: TEST=emerge-geralt coreboot > I do not know the Chromium OS tooling, but does this build all the variants? No, not all variants. But I think the build bot will do it. File src/mainboard/google/geralt/Kconfig: https://review.coreboot.org/c/coreboot/+/78954/comment/90894d32_0e447afd : PS2, Line 73: choice : prompt "Speaker AMP for Geralt" : default USE_MAX98390 if BOARD_GOOGLE_GERALT || BOARD_GOOGLE_CIRI : : config USE_MAX98390 : bool "MAX98390" : : config USE_NAU8318 : bool "NAU8318" > Does this make sense to allow the user to select the speaker AMP? I guess yes, because for the reference board geralt, MAX98390 and NAU8318 are two choices. -- To view, visit https://review.coreboot.org/c/coreboot/+/78954?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7bbe9ed5e722a70bab1c799a61ce38d2ad58ab25 Gerrit-Change-Number: 78954 Gerrit-PatchSet: 3 Gerrit-Owner: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Wed, 15 Nov 2023 09:18:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/geralt: Create variant Ciri
by Ruihai Zhou (Code Review) 15 Nov '23

15 Nov '23

Attention is currently required from: Hung-Te Lin, Ruihai Zhou. Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), cong yang, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78954?usp=email to look at the new patch set (#3). Change subject: mb/google/geralt: Create variant Ciri ...................................................................... mb/google/geralt: Create variant Ciri Create the variant Ciri and enable MAX98390 AMP for it. The panel related support will be add in the follow up CLs. BUG=b:308968270 TEST=emerge-geralt coreboot BRANCH=None Change-Id: I7bbe9ed5e722a70bab1c799a61ce38d2ad58ab25 Signed-off-by: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/geralt/Kconfig M src/mainboard/google/geralt/Kconfig.name 2 files changed, 8 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/78954/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/78954?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7bbe9ed5e722a70bab1c799a61ce38d2ad58ab25 Gerrit-Change-Number: 78954 Gerrit-PatchSet: 3 Gerrit-Owner: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: mb/google/corsola: Add audio codec ALC5650 for Chinchou Devbeep
by Yidi Lin (Code Review) 15 Nov '23

15 Nov '23

Attention is currently required from: Hung-Te Lin, Jiaxin Yu, Yang Wu, Yu-Ping Wu. Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79064?usp=email ) Change subject: mb/google/corsola: Add audio codec ALC5650 for Chinchou Devbeep ...................................................................... Patch Set 3: (10 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/79064/comment/f866d9dc_064678be : PS3, Line 7: mb/google/corsola: Add audio codec ALC5650 for Chinchou Devbeep mb/google/corsola/var/chinchou: Configure I2C and I2S interface for ALC5650 https://review.coreboot.org/c/coreboot/+/79064/comment/4d9ef29f_434fa353 : PS3, Line 9: Chinchou uses I2S1 and I2C5 to do the Devbeep in Depthcharge. Configure I2S1 and I2C5 for ALC5650 to support beep sound in depthcharge. https://review.coreboot.org/c/coreboot/+/79064/comment/61228522_f51db5af : PS3, Line 10: BRANCH=corsola https://review.coreboot.org/c/coreboot/+/79064/comment/e62484d2_bdad3643 : PS3, Line 12: Verify Devbeep at Depthcharge console Verify `devbeep` in depthcharge console File src/mainboard/google/corsola/mainboard.c: https://review.coreboot.org/c/coreboot/+/79064/comment/7fe00914_7380f4ef : PS3, Line 29: configure_audio_ALC5645 what about configure_alc5645() ? https://review.coreboot.org/c/coreboot/+/79064/comment/6b78bdde_fcac07c5 : PS3, Line 39: Timing timing https://review.coreboot.org/c/coreboot/+/79064/comment/714f257a_e6df926b : PS3, Line 39: i2c I2C https://review.coreboot.org/c/coreboot/+/79064/comment/b1d6234a_cccd1d39 : PS3, Line 42: set Set File src/soc/mediatek/mt8186/include/soc/pll.h: https://review.coreboot.org/c/coreboot/+/79064/comment/1cb83cd8_c5ed3e4c : PS3, Line 11: #include <assert.h> move it to pll.c File src/soc/mediatek/mt8186/pll.c: https://review.coreboot.org/c/coreboot/+/79064/comment/b80a369c_43607324 : PS3, Line 591: void mt_pll_set_aud_div(u32 rate) : { : u32 mclk_div; : u32 apll_clock = APLL2_CK_HZ; : int apll1 = 0; : : if (rate % 11025 == 0) { : /* use APLL1 instead */ : apll1 = 1; : apll_clock = APLL1_CK_HZ; : } : /* I2S1 clock */ : mclk_div = (apll_clock / 256 / rate) - 1; : assert(apll_clock == rate * 256 * (mclk_div + 1)); : : if (apll1) { : /* mclk */ : clrbits32(&mtk_topckgen->clk_auddiv_0, 1 << 5); : clrsetbits32(&mtk_topckgen->clk_auddiv_1, 0xff << 8, : mclk_div << 8); : /* bclk */ : clrsetbits32(&mtk_topckgen->clk_auddiv_0, 0xf << 24, : 7 << 24); : } else { : /* mclk */ : setbits32(&mtk_topckgen->clk_auddiv_0, 1 << 5); : clrsetbits32(&mtk_topckgen->clk_auddiv_2, 0xff << 8, : mclk_div << 8); : /* bclk */ : clrsetbits32(&mtk_topckgen->clk_auddiv_0, 0xf << 28, : 7 << 28); : } : } Leave this part for Jiaxin to review. -- To view, visit https://review.coreboot.org/c/coreboot/+/79064?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibd098adb8d5568ad338bbfece0edfd0c38cbf854 Gerrit-Change-Number: 79064 Gerrit-PatchSet: 3 Gerrit-Owner: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jiaxin Yu <jiaxin.yu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-CC: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jiaxin Yu <jiaxin.yu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 15 Nov 2023 08:51:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[main]: mb/google/corsola: Add audio codec ALC5650 for Chinchou Devbeep
by Yang Wu (Code Review) 15 Nov '23

15 Nov '23

Attention is currently required from: Hung-Te Lin, Jiaxin Yu, Yang Wu, Yidi Lin, Yu-Ping Wu. Hello Hung-Te Lin, Jiaxin Yu, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79064?usp=email to look at the new patch set (#3). Change subject: mb/google/corsola: Add audio codec ALC5650 for Chinchou Devbeep ...................................................................... mb/google/corsola: Add audio codec ALC5650 for Chinchou Devbeep Chinchou uses I2S1 and I2C5 to do the Devbeep in Depthcharge. BUG=b:305828247 TEST=Verify Devbeep at Depthcharge console Change-Id: Ibd098adb8d5568ad338bbfece0edfd0c38cbf854 Signed-off-by: wuyang <wuyang5(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/corsola/mainboard.c M src/soc/mediatek/mt8186/include/soc/pll.h M src/soc/mediatek/mt8186/pll.c 3 files changed, 62 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/79064/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/79064?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibd098adb8d5568ad338bbfece0edfd0c38cbf854 Gerrit-Change-Number: 79064 Gerrit-PatchSet: 3 Gerrit-Owner: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jiaxin Yu <jiaxin.yu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-CC: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jiaxin Yu <jiaxin.yu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: mb/supermicro/x11: Make use of chipset devicetree
by Felix Singer (Code Review) 15 Nov '23

15 Nov '23

Attention is currently required from: Michael Niewöhner. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78594?usp=email ) Change subject: mb/supermicro/x11: Make use of chipset devicetree ...................................................................... Patch Set 10: (1 comment) File src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb: https://review.coreboot.org/c/coreboot/+/78594/comment/de6ad97d_ca3b98cc : PS10, Line 39: (JPCIE6) > I'm unsure about possible problems on OS level when changing that SMBios string (does udev any match […] No problem with the comment. I just thought with the SMBIOS way the OS user also would benefit from it. However, I will add the comment again. -- To view, visit https://review.coreboot.org/c/coreboot/+/78594?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5176aa56ecaa52d0f42455bc7176b0415a6199ec Gerrit-Change-Number: 78594 Gerrit-PatchSet: 10 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Comment-Date: Wed, 15 Nov 2023 08:12:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: mb/google/corsola: Add audio codec ALC5650 for Chinchou Devbeep
by Yang Wu (Code Review) 15 Nov '23

15 Nov '23

Attention is currently required from: Hung-Te Lin, Jiaxin Yu, Yang Wu, Yidi Lin, Yu-Ping Wu. Hello Hung-Te Lin, Jiaxin Yu, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79064?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: mb/google/corsola: Add audio codec ALC5650 for Chinchou Devbeep ...................................................................... mb/google/corsola: Add audio codec ALC5650 for Chinchou Devbeep BUG=b:305828247 TEST=Verify Devbeep at Depthcharge console Change-Id: Ibd098adb8d5568ad338bbfece0edfd0c38cbf854 Signed-off-by: wuyang5 <wuyang5(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/corsola/mainboard.c M src/soc/mediatek/mt8186/include/soc/pll.h M src/soc/mediatek/mt8186/pll.c 3 files changed, 62 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/79064/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79064?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibd098adb8d5568ad338bbfece0edfd0c38cbf854 Gerrit-Change-Number: 79064 Gerrit-PatchSet: 2 Gerrit-Owner: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jiaxin Yu <jiaxin.yu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-CC: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jiaxin Yu <jiaxin.yu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: soc/qualcomm/{sc7180,sc7280}: Use correct return types for functions
by Felix Singer (Code Review) 15 Nov '23

15 Nov '23

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79015?usp=email ) Change subject: soc/qualcomm/{sc7180,sc7280}: Use correct return types for functions ...................................................................... soc/qualcomm/{sc7180,sc7280}: Use correct return types for functions Some functions in the headers for sc7180 and sc7280 specified the int as their return type when they should have used enum cb_err. Found while testing GCC 13.2.0 Change-Id: I41331fe708a396f7f2f40359e8ba03c8a46a4d4b Signed-off-by: Zebreus <lennarteichhorn(a)googlemail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79015 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Reviewed-by: Julius Werner <jwerner(a)chromium.org> --- M src/soc/qualcomm/sc7180/include/soc/clock.h M src/soc/qualcomm/sc7280/include/soc/clock.h 2 files changed, 6 insertions(+), 6 deletions(-) Approvals: Julius Werner: Looks good to me, approved build bot (Jenkins): Verified Felix Singer: Looks good to me, approved diff --git a/src/soc/qualcomm/sc7180/include/soc/clock.h b/src/soc/qualcomm/sc7180/include/soc/clock.h index 4e80fe8..4541ecb 100644 --- a/src/soc/qualcomm/sc7180/include/soc/clock.h +++ b/src/soc/qualcomm/sc7180/include/soc/clock.h @@ -195,7 +195,7 @@ void clock_configure_qup(int qup, uint32_t hz); void clock_enable_qup(int qup); void clock_configure_dfsr(int qup); -int mdss_clock_configure(enum mdss_clock clk_type, uint32_t source, +enum cb_err mdss_clock_configure(enum mdss_clock clk_type, uint32_t source, uint32_t divider, uint32_t m, uint32_t n, uint32_t d); int mdss_clock_enable(enum mdss_clock clk_type); diff --git a/src/soc/qualcomm/sc7280/include/soc/clock.h b/src/soc/qualcomm/sc7280/include/soc/clock.h index d22ba37..402c898 100644 --- a/src/soc/qualcomm/sc7280/include/soc/clock.h +++ b/src/soc/qualcomm/sc7280/include/soc/clock.h @@ -383,14 +383,14 @@ void clock_configure_sdcc1(uint32_t hz); void clock_configure_sdcc2(uint32_t hz); void clock_configure_dfsr(int qup); -int clock_enable_gdsc(enum clk_gdsc gdsc_type); +enum cb_err clock_enable_gdsc(enum clk_gdsc gdsc_type); -int mdss_clock_configure(enum clk_mdss clk_type, uint32_t hz, +enum cb_err mdss_clock_configure(enum clk_mdss clk_type, uint32_t hz, uint32_t source, uint32_t divider, uint32_t m, uint32_t n, uint32_t d); -int mdss_clock_enable(enum clk_mdss clk_type); -int clock_enable_pcie(enum clk_pcie clk_type); -int clock_configure_mux(enum clk_pcie clk_type, u32 src_type); +enum cb_err mdss_clock_enable(enum clk_mdss clk_type); +enum cb_err clock_enable_pcie(enum clk_pcie clk_type); +enum cb_err clock_configure_mux(enum clk_pcie clk_type, u32 src_type); /* Subsystem Reset */ static struct aoss *const aoss = (void *)AOSS_CC_BASE; -- To view, visit https://review.coreboot.org/c/coreboot/+/79015?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I41331fe708a396f7f2f40359e8ba03c8a46a4d4b Gerrit-Change-Number: 79015 Gerrit-PatchSet: 2 Gerrit-Owner: Lennart Eichhorn <lennarteichhorn(a)googlemail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[XS] Change in coreboot[main]: arch/arm64: Avoid GCC warning about out of bounds array access
by Felix Singer (Code Review) 15 Nov '23

15 Nov '23

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79014?usp=email ) Change subject: arch/arm64: Avoid GCC warning about out of bounds array access ...................................................................... arch/arm64: Avoid GCC warning about out of bounds array access With the update to GCC 13 a new warning about subtracting numbers from arrays appears. src/arch/arm64/armv8/mmu.c:296:9: error: array subscript -1 is outside array bounds of 'u8[]' {aka 'unsigned char[]'} [-Werror=array-bounds=] Change-Id: I4757ca2e7ad3f969d7416041ea40c3e9866cdf49 Signed-off-by: Zebreus <lennarteichhorn(a)googlemail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79014 Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/arch/arm64/armv8/mmu.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: Felix Singer: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/arch/arm64/armv8/mmu.c b/src/arch/arm64/armv8/mmu.c index 61ca49f..3cedbcf 100644 --- a/src/arch/arm64/armv8/mmu.c +++ b/src/arch/arm64/armv8/mmu.c @@ -293,7 +293,7 @@ void mmu_enable(void) { assert_correct_ttb_mapping(_ttb); - assert_correct_ttb_mapping(_ettb - 1); + assert_correct_ttb_mapping((void *)((uintptr_t)_ettb - 1)); uint32_t sctlr = raw_read_sctlr_el3(); sctlr |= SCTLR_C | SCTLR_M | SCTLR_I; -- To view, visit https://review.coreboot.org/c/coreboot/+/79014?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4757ca2e7ad3f969d7416041ea40c3e9866cdf49 Gerrit-Change-Number: 79014 Gerrit-PatchSet: 3 Gerrit-Owner: Lennart Eichhorn <lennarteichhorn(a)googlemail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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coreboot-gerrit November 2023