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Change subject: mb/google/corsola/var/chinchou: Configure I2C and I2S interface for ALC5650
......................................................................
mb/google/corsola/var/chinchou: Configure I2C and I2S interface for ALC5650
Configure I2S1 and I2C5 for ALC5650 to support beep sound in
depthcharge.
BRANCH=corsola
BUG=b:305828247
TEST=Verify devbeep in depthcharge console
Change-Id: Ibd098adb8d5568ad338bbfece0edfd0c38cbf854
Signed-off-by: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com>
---
M src/mainboard/google/corsola/mainboard.c
M src/soc/mediatek/mt8186/include/soc/pll.h
M src/soc/mediatek/mt8186/pll.c
3 files changed, 62 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/79064/7
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Lean Sheng Tan has uploaded a new patch set (#20) to the change originally created by Angel Pons. ( https://review.coreboot.org/c/coreboot/+/74121?usp=email )
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Change subject: [RFC] drivers/option: Add forms in cbtables
......................................................................
[RFC] drivers/option: Add forms in cbtables
Introduce a mechanism so that coreboot can provide a list of options to
post-coreboot code. The options are grouped together into forms and
have a meaning name and optional help text. This can be used to let
payloads know which options should be displayed in a setup menu,
for instance. Although this system was written to be used with edk2,
it has been designed with flexibility in mind so that other payloads
can also make use of this mechanism. The system currently lacks a way
to describe where to find option values.
This information is stored in a set of data structures specifically
created for this purpose. This format is known as CFR, which means
"coreboot forms representation" or "cursed forms representation".
Although the "forms representation" is borrowed from UEFI, CFR can
be used in non-UEFI scenarios as well.
The data structures are implemented as an extension of cbtables records
to support nesting. It should not break backwards compatibility because
the CFR root record (LB_TAG_CFR_ROOT) size includes all of its children
records. The concept of record nesting is borrowed from the records for
CMOS options. It is not possible to reuse the CMOS records because they
are too closely coupled with CMOS options; using these structures would
needlessly restrict more capable backends to what can be done with CMOS
options, which is undesired.
Because CFR supports variable-length components, directly transforming
options into CFR structures is not a trivial process. Furthermore, CFR
structures need to be written in one go. Because of this, abstractions
exist to generate CFR structures from a set of "setup menu" structures
that are coreboot-specific and could be integrated with the devicetree
at some point. Note that `struct sm_object` is a tagged union. This is
used to have lists of options in an array, as building linked lists of
options at runtime is extremely impractical because options would have
to be added at the end of the linked list to maintain option order. To
avoid mistakes defining `struct sm_object` values, helper macros exist
for supported option types. The macros also provide some type checking
as they initialise specific union members.
It should be possible to extend CFR support for more sophisticated
options like fan curve points. Feedback about this is highly
appreciated.
Change-Id: I304de7d26d79245a2e31a6d01f6c5643b31cb772
Signed-off-by: Angel Pons <th3fanbus(a)gmail.com>
---
A Documentation/drivers/cfr_internal.md
M Documentation/drivers/index.md
A src/drivers/option/Kconfig
A src/drivers/option/Makefile.inc
A src/drivers/option/cfr.c
A src/drivers/option/cfr.h
M src/include/boot/coreboot_tables.h
M src/lib/coreboot_table.c
M src/lib/program.ld
9 files changed, 604 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/74121/20
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I'd like you to reexamine a change. Please visit
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Change subject: mb/google/corsola/var/chinchou: Configure I2C and I2S interface for ALC5650
......................................................................
mb/google/corsola/var/chinchou: Configure I2C and I2S interface for ALC5650
Configure I2S1 and I2C5 for ALC5650 to support beep sound in
depthcharge.
BRANCH=corsola
BUG=b:305828247
TEST=Verify devbeep in depthcharge console
Change-Id: Ibd098adb8d5568ad338bbfece0edfd0c38cbf854
Signed-off-by: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com>
---
M src/mainboard/google/corsola/mainboard.c
M src/soc/mediatek/mt8186/include/soc/pll.h
M src/soc/mediatek/mt8186/pll.c
3 files changed, 62 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/79064/5
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Change subject: mb/google/dedede/var/pirika: Add support for new memory CXMT CXDB4CBAM-ML-A
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
Kindly ping to submit if no concern.
Thanks.
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Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), cong yang,
I'd like you to reexamine a change. Please visit
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Change subject: mb/google/geralt: Create variant Ciri
......................................................................
mb/google/geralt: Create variant Ciri
Create the variant Ciri and enable MAX98390 AMP for it. The panel
related support will be added in the follow up CLs.
BUG=b:308968270
TEST=emerge-geralt coreboot
BRANCH=None
Change-Id: I7bbe9ed5e722a70bab1c799a61ce38d2ad58ab25
Signed-off-by: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com>
---
M src/mainboard/google/geralt/Kconfig
M src/mainboard/google/geralt/Kconfig.name
2 files changed, 8 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/78954/4
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78071?usp=email )
Change subject: acpi: Add PPTT support
......................................................................
Patch Set 17:
(6 comments)
File src/acpi/acpi.c:
https://review.coreboot.org/c/coreboot/+/78071/comment/28a4e69d_7ce92372 :
PS17, Line 1204: /* --- header generation --- */
:
Useless comments?
File src/acpi/acpi_pptt.c:
https://review.coreboot.org/c/coreboot/+/78071/comment/b01f584e_7849976f :
PS17, Line 12: typedef
typedefs are against the style guide.
https://review.coreboot.org/c/coreboot/+/78071/comment/621eac02_06ec0928 :
PS17, Line 23: = 0x0
static variables are always initialised at 0.
https://review.coreboot.org/c/coreboot/+/78071/comment/1cd4e6cb_f9b1b807 :
PS17, Line 74: u32 *n_caches
Do you need this? you memset cache_refs to 0. Just search for the first non 0 entry and make the function simpler? This works work well with the ideas below.
https://review.coreboot.org/c/coreboot/+/78071/comment/d861aa8c_1871fb59 :
PS17, Line 131: cache_reference_t cache_refs[CONFIG_ACPI_PPTT_MAX_CACHES];
Is this not more appropriate to declare this in setup_topology so that all siblings can reuse it? Now you create these references for each call of new_pptt_cpu. return reference_for_cache in pptt_cache if !0?
https://review.coreboot.org/c/coreboot/+/78071/comment/a9d0202d_31475423 :
PS17, Line 132: memset(cache_refs, 0x0, sizeof(cache_reference_t) * CONFIG_ACPI_PPTT_MAX_CACHES);
:
The ideomatic way in C is "= {}" in the declaration of the variable.
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