coreboot-gerrit November 2023

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: nb/intel/sandybridge: Use SA devid to identify PC type
by Patrick Rudolph (Code Review) 18 Nov '23

18 Nov '23

Attention is currently required from: Arthur Heymans, Keith Hui, Matt DeVillier. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78826?usp=email ) Change subject: nb/intel/sandybridge: Use SA devid to identify PC type ...................................................................... Patch Set 6: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/78826/comment/290ed9cf_f3367b15 : PS5, Line 9: or > of Done -- To view, visit https://review.coreboot.org/c/coreboot/+/78826?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibddf6c75d15ca7a99758c377ed956d483abe7ec1 Gerrit-Change-Number: 78826 Gerrit-PatchSet: 6 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Keith Hui <buurin(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Sat, 18 Nov 2023 05:56:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: sb/intel/bd82x6x/early_usb: Print error for invalid USB setting
by Patrick Rudolph (Code Review) 18 Nov '23

18 Nov '23

Attention is currently required from: Angel Pons, Paul Menzel. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78827?usp=email ) Change subject: sb/intel/bd82x6x/early_usb: Print error for invalid USB setting ...................................................................... Patch Set 7: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/78827/comment/9df54597_45e65aa3 : PS3, Line 11: have a such > have such a Done Commit Message: https://review.coreboot.org/c/coreboot/+/78827/comment/8b706742_a32f1c98 : PS6, Line 9: According to BWG the USB current setting 0 should not be used for desktop > > `Possible unwrapped commit description (prefer a maximum 72 chars per line)` […] Done File src/southbridge/intel/bd82x6x/early_usb.c: https://review.coreboot.org/c/coreboot/+/78827/comment/1734f50d_038af0a2 : PS3, Line 29: not a valid > an invalid Done File src/southbridge/intel/bd82x6x/early_usb.c: https://review.coreboot.org/c/coreboot/+/78827/comment/dad81f1d_fad47366 : PS6, Line 31: printk(BIOS_ERR, "%s: USB%02d: current setting of 0 is not a valid setting for desktop!\n", > Most people will see these errors and not know what to do with them. […] That's obvious from the error message. Everything besides 0 is a better choice. Added a comment what to do. -- To view, visit https://review.coreboot.org/c/coreboot/+/78827?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If76e9126b4aba8e16c1c91dece725aac12e1a7e9 Gerrit-Change-Number: 78827 Gerrit-PatchSet: 7 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sat, 18 Nov 2023 05:55:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: util/autoport: Improve USB code
by Patrick Rudolph (Code Review) 18 Nov '23

18 Nov '23

Attention is currently required from: Angel Pons, Paul Menzel. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78828?usp=email ) Change subject: util/autoport: Improve USB code ...................................................................... Patch Set 7: (1 comment) File util/autoport/bd82x6x.go: https://review.coreboot.org/c/coreboot/+/78828/comment/23bca20b_d351e32b : PS6, Line 337: comment = "// FIXME: Unknown current" > Agreed. This should use (predefined) raw register values. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/78828?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I48f4d636ce3401ba188f5519b5ff45fccf13f080 Gerrit-Change-Number: 78828 Gerrit-PatchSet: 7 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sat, 18 Nov 2023 05:55:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: sb/intel/bd82x6x/pch: Add method to identify PCH
by Patrick Rudolph (Code Review) 18 Nov '23

18 Nov '23

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79145?usp=email ) Change subject: sb/intel/bd82x6x/pch: Add method to identify PCH ...................................................................... sb/intel/bd82x6x/pch: Add method to identify PCH Identify PCH type by LPC device ID. This allows to identify the PCH without including northbridge headers. Change-Id: Ic3e15c1d8d4b1d1012d6204cc65de92d91431fbe Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/southbridge/intel/bd82x6x/Makefile.inc M src/southbridge/intel/bd82x6x/pch.c M src/southbridge/intel/bd82x6x/pch.h 3 files changed, 15 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/79145/1 diff --git a/src/southbridge/intel/bd82x6x/Makefile.inc b/src/southbridge/intel/bd82x6x/Makefile.inc index 0a4cc83..eac05ab 100644 --- a/src/southbridge/intel/bd82x6x/Makefile.inc +++ b/src/southbridge/intel/bd82x6x/Makefile.inc @@ -29,6 +29,7 @@ romstage-y += me_status.c romstage-y += early_rcba.c romstage-y += early_pch.c +romstage-y += pch.c ifeq ($(CONFIG_USE_NATIVE_RAMINIT),y) romstage-y += early_thermal.c early_me.c early_usb.c diff --git a/src/southbridge/intel/bd82x6x/pch.c b/src/southbridge/intel/bd82x6x/pch.c index a7ab83a..da7e585 100644 --- a/src/southbridge/intel/bd82x6x/pch.c +++ b/src/southbridge/intel/bd82x6x/pch.c @@ -4,10 +4,10 @@ #include <delay.h> #include <device/device.h> #include <device/pci.h> +#include <device/pci_def.h> #include <device/pci_ops.h> #include <string.h> #include <timer.h> - #include "chip.h" #include "pch.h" @@ -41,6 +41,18 @@ return pch_type; } +bool pch_is_mobile(void) +{ + const u16 devid = pci_s_read_config16(PCH_LPC_DEV, PCI_DEVICE_ID); + const u16 devids[] = {0x1C43, 0x1C47, 0x1C49, 0x1C4B, 0x1C4F, 0x1C41, + 0x1C4D, 0x1E42, 0x1E55, 0x1E5D, 0x1E57, 0x1E58, + 0x1E59, 0x1E43, 0x1E56}; + for (size_t i = 0; i < ARRAY_SIZE(devids); i++) + if (devid == devids[i]) + return 1; + return 0; +} + static int pch_silicon_supported(int type, int rev) { int cur_type = pch_silicon_type(); diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h index 6d164ea..bfd0d73 100644 --- a/src/southbridge/intel/bd82x6x/pch.h +++ b/src/southbridge/intel/bd82x6x/pch.h @@ -34,6 +34,7 @@ int pch_silicon_revision(void); int pch_silicon_type(void); +bool pch_is_mobile(void); void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue); void enable_usb_bar(void); -- To view, visit https://review.coreboot.org/c/coreboot/+/79145?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic3e15c1d8d4b1d1012d6204cc65de92d91431fbe Gerrit-Change-Number: 79145 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[main]: sb/intel/bd82x6x/early_usb: Add USB TX/RX gains
by Patrick Rudolph (Code Review) 18 Nov '23

18 Nov '23

Attention is currently required from: Keith Hui, Patrick Rudolph, Paul Menzel. Hello Keith Hui, Paul Menzel, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78829?usp=email to look at the new patch set (#7). The following approvals got outdated and were removed: Code-Review+1 by Paul Menzel, Verified+1 by build bot (Jenkins) Change subject: sb/intel/bd82x6x/early_usb: Add USB TX/RX gains ...................................................................... sb/intel/bd82x6x/early_usb: Add USB TX/RX gains Describe the USB 'current' settings based on MRC.bin that converts the USB trace length to a predefined register value. MRC.bin decides which setting to use based on the PC type, mobile or desktop, and the trace length. Change-Id: I79d35ca16818daec03ee7f464349a4c8ee0f78e4 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/southbridge/intel/bd82x6x/early_usb.c M src/southbridge/intel/bd82x6x/pch.h 2 files changed, 18 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/78829/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/78829?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I79d35ca16818daec03ee7f464349a4c8ee0f78e4 Gerrit-Change-Number: 78829 Gerrit-PatchSet: 7 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Keith Hui <buurin(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: util/autoport: Improve USB code
by Patrick Rudolph (Code Review) 18 Nov '23

18 Nov '23

Attention is currently required from: Angel Pons, Paul Menzel. Hello Paul Menzel, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78828?usp=email to look at the new patch set (#7). The following approvals got outdated and were removed: Code-Review+1 by Paul Menzel, Verified+1 by build bot (Jenkins) Change subject: util/autoport: Improve USB code ...................................................................... util/autoport: Improve USB code Currently autoport fills in USB current '0' if the detected settings isn't one of the known settings. This works as 0 is a valid setting from C point of view, but it's not supported on desktop PCs and on mobile platform results in the lowest possible USB PHY gain. Thus this might cause instabilities as the original firmware had stronger USB drive currents and gain settings. Add more known USB current fields to the map and generate a FIXME as comment when the detected current isn't one of the known entries instead of defaulting to 0. Change-Id: I48f4d636ce3401ba188f5519b5ff45fccf13f080 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M util/autoport/bd82x6x.go 1 file changed, 13 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/78828/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/78828?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I48f4d636ce3401ba188f5519b5ff45fccf13f080 Gerrit-Change-Number: 78828 Gerrit-PatchSet: 7 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: sb/intel/bd82x6x/early_usb: Print error for invalid USB setting
by Patrick Rudolph (Code Review) 18 Nov '23

18 Nov '23

Attention is currently required from: Patrick Rudolph, Paul Menzel. Hello Paul Menzel, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78827?usp=email to look at the new patch set (#7). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: sb/intel/bd82x6x/early_usb: Print error for invalid USB setting ...................................................................... sb/intel/bd82x6x/early_usb: Print error for invalid USB setting According to BWG the USB current setting 0 should not be used for desktop boards. As autoport defaults to 0 if the USB current doesn't match one of the lookup table entries most of the desktop boards in tree have such a setting. Print an error to alert users of such boards to update the USB current settings. Change-Id: If76e9126b4aba8e16c1c91dece725aac12e1a7e9 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/southbridge/intel/bd82x6x/early_usb.c 1 file changed, 9 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/78827/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/78827?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If76e9126b4aba8e16c1c91dece725aac12e1a7e9 Gerrit-Change-Number: 78827 Gerrit-PatchSet: 7 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: nb/intel/sandybridge: Use SA devid to identify PC type
by Patrick Rudolph (Code Review) 18 Nov '23

18 Nov '23

Attention is currently required from: Arthur Heymans, Keith Hui, Patrick Rudolph. Hello Angel Pons, Arthur Heymans, Keith Hui, Matt DeVillier, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78826?usp=email to look at the new patch set (#6). Change subject: nb/intel/sandybridge: Use SA devid to identify PC type ...................................................................... nb/intel/sandybridge: Use SA devid to identify PC type Instead of using MSR IA32_PLATFORM_ID read the SystemAgent device id to figure out the PC type. This follows the BWG which suggest to not use MSR IA32_PLATFORM_ID for system identification. Change-Id: Ibddf6c75d15ca7a99758c377ed956d483abe7ec1 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/cpu/intel/model_206ax/Makefile.inc D src/cpu/intel/model_206ax/common.c M src/cpu/intel/model_206ax/model_206ax.h M src/cpu/intel/model_206ax/model_206ax_init.c M src/northbridge/intel/sandybridge/common.c M src/northbridge/intel/sandybridge/early_init.c 6 files changed, 15 insertions(+), 29 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/78826/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/78826?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibddf6c75d15ca7a99758c377ed956d483abe7ec1 Gerrit-Change-Number: 78826 Gerrit-PatchSet: 6 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Keith Hui <buurin(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: util/autoport: Improve USB code
by Patrick Rudolph (Code Review) 18 Nov '23

18 Nov '23

Attention is currently required from: Angel Pons. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78828?usp=email ) Change subject: util/autoport: Improve USB code ...................................................................... Patch Set 6: (1 comment) File util/autoport/bd82x6x.go: https://review.coreboot.org/c/coreboot/+/78828/comment/ded251a8_c8c695a0 : PS6, Line 337: comment = "// FIXME: Unknown current" > Can you put the register value in the comment? […] Agreed. This should use (predefined) raw register values. -- To view, visit https://review.coreboot.org/c/coreboot/+/78828?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I48f4d636ce3401ba188f5519b5ff45fccf13f080 Gerrit-Change-Number: 78828 Gerrit-PatchSet: 6 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sat, 18 Nov 2023 05:50:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: nb/intel/sandybridge: Fix unitialized variable issue
by Patrick Rudolph (Code Review) 18 Nov '23

18 Nov '23

Attention is currently required from: Angel Pons, Jérémy Compostella, Keith Hui, Martin L Roth, Martin Roth, Paul Menzel. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79093?usp=email ) Change subject: nb/intel/sandybridge: Fix unitialized variable issue ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79093?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I41b081dc4c961acc04423067e29e0eabe5f17539 Gerrit-Change-Number: 79093 Gerrit-PatchSet: 2 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Keith Hui <buurin(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Comment-Date: Sat, 18 Nov 2023 05:31:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit November 2023