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Change subject: sb/intel/bd82x6x/early_usb: Add USB TX/RX gains
......................................................................
sb/intel/bd82x6x/early_usb: Add USB TX/RX gains
Describe the USB 'current' settings based on MRC.bin that converts
the USB trace length to a predefined register value.
MRC.bin decides which setting to use based on the PC type, mobile
or desktop, and the trace length.
Tested: Lenovo X220 still boots.
Change-Id: I79d35ca16818daec03ee7f464349a4c8ee0f78e4
Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com>
---
M src/southbridge/intel/bd82x6x/early_usb.c
M src/southbridge/intel/bd82x6x/pch.h
2 files changed, 18 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/78829/8
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Hello Paul Menzel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Change subject: util/autoport: Improve USB code
......................................................................
util/autoport: Improve USB code
Currently autoport fills in USB current '0' if the detected setting
isn't one of the known settings. This works as 0 is a valid setting
from C point of view, but it's not supported on desktop PCs and on
mobile platform results in the lowest possible USB PHY gain. Thus
this might cause instabilities as the original firmware had stronger
USB drive currents and gain settings.
Add more known USB current fields to the map and generate a FIXME
as comment when the detected current isn't one of the known entries
instead of defaulting to 0.
Change-Id: I48f4d636ce3401ba188f5519b5ff45fccf13f080
Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com>
---
M util/autoport/bd82x6x.go
1 file changed, 13 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/78828/8
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Hello Paul Menzel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Change subject: sb/intel/bd82x6x/early_usb: Print error for invalid USB setting
......................................................................
sb/intel/bd82x6x/early_usb: Print error for invalid USB setting
According to BWG the USB current setting 0 should not be used for
desktop boards. As autoport defaults to 0 if the USB current doesn't
match one of the lookup table entries most of the desktop boards in
tree have such a setting. Print an error to alert users of such boards
to update the USB current settings.
Tested: Lenovo X220 still boots.
Change-Id: If76e9126b4aba8e16c1c91dece725aac12e1a7e9
Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com>
---
M src/southbridge/intel/bd82x6x/early_usb.c
1 file changed, 9 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/78827/8
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Hello Angel Pons, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Change subject: sb/intel/bd82x6x/pch: Add method to identify PCH
......................................................................
sb/intel/bd82x6x/pch: Add method to identify PCH
Identify PCH type by LPC device ID. This allows to identify
the PCH without including northbridge headers.
Tested: Lenovo X220 still boots.
Change-Id: Ic3e15c1d8d4b1d1012d6204cc65de92d91431fbe
Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com>
---
M src/southbridge/intel/bd82x6x/Makefile.inc
M src/southbridge/intel/bd82x6x/pch.c
M src/southbridge/intel/bd82x6x/pch.h
3 files changed, 15 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/79145/2
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Hello Angel Pons, Arthur Heymans, Keith Hui, Matt DeVillier, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Change subject: nb/intel/sandybridge: Use SA devid to identify PC type
......................................................................
nb/intel/sandybridge: Use SA devid to identify PC type
Instead of using MSR IA32_PLATFORM_ID read the SystemAgent device id
to figure out the PC type. This follows the BWG which suggest to not
use MSR IA32_PLATFORM_ID for system identification.
Tested: Lenovo X220 still boots.
Change-Id: Ibddf6c75d15ca7a99758c377ed956d483abe7ec1
Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com>
---
M src/cpu/intel/model_206ax/Makefile.inc
D src/cpu/intel/model_206ax/common.c
M src/cpu/intel/model_206ax/model_206ax.h
M src/cpu/intel/model_206ax/model_206ax_init.c
M src/northbridge/intel/sandybridge/common.c
M src/northbridge/intel/sandybridge/early_init.c
6 files changed, 15 insertions(+), 29 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/78826/7
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Change subject: nb/intel/sandybridge: assign PCIe root port ops in chipset devicetree
......................................................................
Patch Set 1: Code-Review+2
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Change subject: nb/intel/sandybridge: assign gma ops in chipset devicetree
......................................................................
Patch Set 1: Code-Review+2
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Change subject: nb/intel/sandybridge: assign host bridge ops in chipset devicetree
......................................................................
Patch Set 1: Code-Review+2
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Change subject: cpu/intel/model_206ax: Program Ivy Bridge defaults for MSR_PKGC_IRTL
......................................................................
Patch Set 5: Code-Review+2
(1 comment)
File src/cpu/intel/model_206ax/model_206ax_init.c:
https://review.coreboot.org/c/coreboot/+/78609/comment/0f6c37de_d6ac7141 :
PS5, Line 192: cpuid_eax(1) >= 0x30600
use a variable "const bool is_ivybridge = cpuid_eax(1) >= 0x30600;" ?
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Change subject: cpu/intel/model_206ax: Lock MSR_PP_CURRENT_CONFIG
......................................................................
Patch Set 5: Code-Review+2
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