coreboot-gerrit November 2023

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[S] Change in coreboot[main]: sb/intel/bd82x6x: assign PCH HDA controller ops in chipset devicetree
by Felix Held (Code Review) 18 Nov '23

18 Nov '23

Attention is currently required from: Angel Pons. Hello Angel Pons, Patrick Rudolph, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79118?usp=email to look at the new patch set (#2). Change subject: sb/intel/bd82x6x: assign PCH HDA controller ops in chipset devicetree ...................................................................... sb/intel/bd82x6x: assign PCH HDA controller ops in chipset devicetree Since the HD audio controller in the PCH are always on the same device functions, the device operations can be statically assigned in the devicetree and there's no need to bind the host bridge device operations to the PCI device during runtime via a list of PCI IDs. TEST=Lenovo X220 still boots to Linux and audio still works Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Tested-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> Change-Id: I9bbbe9f4490dc6fb21174d63d1c8906d69ea3ee0 --- M src/northbridge/intel/sandybridge/chipset.cb M src/southbridge/intel/bd82x6x/azalia.c 2 files changed, 2 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/79118/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79118?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9bbbe9f4490dc6fb21174d63d1c8906d69ea3ee0 Gerrit-Change-Number: 79118 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: sb/intel/bd82x6x: assign PCIe root port ops in chipset devicetree
by Felix Held (Code Review) 18 Nov '23

18 Nov '23

Attention is currently required from: Angel Pons. Hello Angel Pons, Patrick Rudolph, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79117?usp=email to look at the new patch set (#2). Change subject: sb/intel/bd82x6x: assign PCIe root port ops in chipset devicetree ...................................................................... sb/intel/bd82x6x: assign PCIe root port ops in chipset devicetree Since the PCIe root ports in the PCH are always on the same device functions, the device operations can be statically assigned in the devicetree and there's no need to bind the host bridge device operations to the PCI device during runtime via a list of PCI IDs. TEST=Lenovo X220 still boots to Linux and all PCIe devices on PCH are visible and working. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Tested-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> Change-Id: I05bfe8db88fd54415f320f32ea147636ca4e0df8 --- M src/northbridge/intel/sandybridge/chipset.cb M src/southbridge/intel/bd82x6x/pcie.c 2 files changed, 9 insertions(+), 21 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/79117/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79117?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I05bfe8db88fd54415f320f32ea147636ca4e0df8 Gerrit-Change-Number: 79117 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: nb/intel/sandybridge: assign gma ops in chipset devicetree
by Felix Held (Code Review) 18 Nov '23

18 Nov '23

Attention is currently required from: Angel Pons. Hello Angel Pons, Arthur Heymans, Patrick Rudolph, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79114?usp=email to look at the new patch set (#2). Change subject: nb/intel/sandybridge: assign gma ops in chipset devicetree ...................................................................... nb/intel/sandybridge: assign gma ops in chipset devicetree Since the integrated GPU is always function 0 of device 2 on bus 0, the device operations can be statically assigned in the devicetree and there's no need to bind the host bridge device operations to the PCI device during runtime via a list of PCI IDs. TEST=Lenovo X220 still boots to Linux and graphics works in UEFI Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Tested-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> Change-Id: I20e387e626e19dc441aceda18451186d1e86cd5f --- M src/northbridge/intel/sandybridge/chipset.cb M src/northbridge/intel/sandybridge/gma.c 2 files changed, 2 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/79114/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79114?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I20e387e626e19dc441aceda18451186d1e86cd5f Gerrit-Change-Number: 79114 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: nb/intel/sandybridge: assign host bridge ops in chipset devicetree
by Felix Held (Code Review) 18 Nov '23

18 Nov '23

Attention is currently required from: Angel Pons. Hello Angel Pons, Arthur Heymans, Patrick Rudolph, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79113?usp=email to look at the new patch set (#2). Change subject: nb/intel/sandybridge: assign host bridge ops in chipset devicetree ...................................................................... nb/intel/sandybridge: assign host bridge ops in chipset devicetree Since the host bridge is always function 0 of device 0 on bus 0, the device operations can be statically assigned in the devicetree and there's no need to bind the host bridge device operations to the PCI device during runtime via a list of PCI IDs. TEST=Lenovo X220 still boots to Linux Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Tested-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> Change-Id: Icf3d9f8cd2be2f8ef71fd9fdb5f005f3b683332e --- M src/northbridge/intel/sandybridge/chipset.cb M src/northbridge/intel/sandybridge/northbridge.c 2 files changed, 2 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/79113/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79113?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icf3d9f8cd2be2f8ef71fd9fdb5f005f3b683332e Gerrit-Change-Number: 79113 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: sb/intel/bd82x6x: assign PCH HDA controller ops in chipset devicetree
by Felix Held (Code Review) 18 Nov '23

18 Nov '23

Attention is currently required from: Angel Pons. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79118?usp=email ) Change subject: sb/intel/bd82x6x: assign PCH HDA controller ops in chipset devicetree ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > not tested on hardware yet Done -- To view, visit https://review.coreboot.org/c/coreboot/+/79118?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9bbbe9f4490dc6fb21174d63d1c8906d69ea3ee0 Gerrit-Change-Number: 79118 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sat, 18 Nov 2023 14:19:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: sb/intel/bd82x6x: assign PCIe root port ops in chipset devicetree
by Felix Held (Code Review) 18 Nov '23

18 Nov '23

Attention is currently required from: Angel Pons. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79117?usp=email ) Change subject: sb/intel/bd82x6x: assign PCIe root port ops in chipset devicetree ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > not tested on hardware yet Done -- To view, visit https://review.coreboot.org/c/coreboot/+/79117?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I05bfe8db88fd54415f320f32ea147636ca4e0df8 Gerrit-Change-Number: 79117 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sat, 18 Nov 2023 14:19:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: nb/intel/sandybridge/pcie: drop unneeded HAVE_ACPI_TABLES guards
by Felix Held (Code Review) 18 Nov '23

18 Nov '23

Attention is currently required from: Angel Pons. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79116?usp=email ) Change subject: nb/intel/sandybridge/pcie: drop unneeded HAVE_ACPI_TABLES guards ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > not tested on hardware yet this doesn't need to be tested on hardware; missed that when adding the comments -- To view, visit https://review.coreboot.org/c/coreboot/+/79116?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1e8c8b3e3672d1589a5910753986e4033d2ce766 Gerrit-Change-Number: 79116 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sat, 18 Nov 2023 14:19:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: nb/intel/sandybridge: assign gma ops in chipset devicetree
by Felix Held (Code Review) 18 Nov '23

18 Nov '23

Attention is currently required from: Angel Pons. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79114?usp=email ) Change subject: nb/intel/sandybridge: assign gma ops in chipset devicetree ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > not tested on hardware yet Done -- To view, visit https://review.coreboot.org/c/coreboot/+/79114?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I20e387e626e19dc441aceda18451186d1e86cd5f Gerrit-Change-Number: 79114 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sat, 18 Nov 2023 14:18:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: nb/intel/sandybridge: assign host bridge ops in chipset devicetree
by Felix Held (Code Review) 18 Nov '23

18 Nov '23

Attention is currently required from: Angel Pons. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79113?usp=email ) Change subject: nb/intel/sandybridge: assign host bridge ops in chipset devicetree ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > not tested on hardware yet Done -- To view, visit https://review.coreboot.org/c/coreboot/+/79113?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icf3d9f8cd2be2f8ef71fd9fdb5f005f3b683332e Gerrit-Change-Number: 79113 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sat, 18 Nov 2023 14:17:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: util/autoport: Improve USB code
by Patrick Rudolph (Code Review) 18 Nov '23

18 Nov '23

Attention is currently required from: Angel Pons, Paul Menzel. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78828?usp=email ) Change subject: util/autoport: Improve USB code ...................................................................... Patch Set 8: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/78828/comment/5ce24952_e972b026 : PS3, Line 10: isn't > aren’t Done -- To view, visit https://review.coreboot.org/c/coreboot/+/78828?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I48f4d636ce3401ba188f5519b5ff45fccf13f080 Gerrit-Change-Number: 78828 Gerrit-PatchSet: 8 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sat, 18 Nov 2023 13:48:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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coreboot-gerrit November 2023