coreboot-gerrit January 2023

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[S] Change in coreboot[master]: soc/intel/meteorlake: Set max Pkg C-states to Auto
by Kapil Porwal (Code Review) 04 Jan '23

04 Jan '23

Kapil Porwal has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/71653 ) Change subject: soc/intel/meteorlake: Set max Pkg C-states to Auto ...................................................................... soc/intel/meteorlake: Set max Pkg C-states to Auto This patch configures max Pkg C-state to Auto which limits the max C-state to deep C-state. Port of commit af42906efa72 ("soc/intel/alderlake: Set max Pkg C-states to Auto") BUG=none TEST=Boot to the OS on Google/Rex. Snippet from FSP log: [SPEW ] PkgCStateLimit : 0xFF Signed-off-by: Kapil Porwal <kapilporwal(a)google.com> Change-Id: Ic403ab83a594b04920d5cf600432939687a2598b --- M src/soc/intel/meteorlake/chip.h M src/soc/intel/meteorlake/fsp_params.c 2 files changed, 42 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/71653/1 diff --git a/src/soc/intel/meteorlake/chip.h b/src/soc/intel/meteorlake/chip.h index 19b34a2..ad382e3 100644 --- a/src/soc/intel/meteorlake/chip.h +++ b/src/soc/intel/meteorlake/chip.h @@ -43,6 +43,25 @@ DDI_ENABLE_HPD = 1 << 1, }; +/* + * The Max Pkg Cstate + * Values 0 - C0/C1, 1 - C2, 2 - C3, 3 - C6, 4 - C7, 5 - C7S, 6 - C8, 7 - C9, 8 - C10, + * 254 - CPU Default , 255 - Auto. + */ +enum pkgcstate_limit { + LIMIT_C0_C1 = 0, + LIMIT_C2 = 1, + LIMIT_C3 = 2, + LIMIT_C6 = 3, + LIMIT_C7 = 4, + LIMIT_C7S = 5, + LIMIT_C8 = 6, + LIMIT_C9 = 7, + LIMIT_C10 = 8, + LIMIT_CPUDEFAULT = 254, + LIMIT_AUTO = 255, +}; + /* Bit values for use in LpmStateEnableMask. */ enum lpm_state_mask { LPM_S0i2_0 = BIT(0), diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c index d40779a..50b4a76 100644 --- a/src/soc/intel/meteorlake/fsp_params.c +++ b/src/soc/intel/meteorlake/fsp_params.c @@ -423,6 +423,7 @@ s_cfg->Hwp = 1; s_cfg->Cx = 1; s_cfg->PsOnEnable = 1; + s_cfg->PkgCStateLimit = LIMIT_AUTO; /* Enable the energy efficient turbo mode */ s_cfg->EnergyEfficientTurbo = 1; s_cfg->PmcLpmS0ixSubStateEnableMask = get_supported_lpm_mask(); -- To view, visit https://review.coreboot.org/c/coreboot/+/71653 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic403ab83a594b04920d5cf600432939687a2598b Gerrit-Change-Number: 71653 Gerrit-PatchSet: 1 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: Revert "mb/google/brya: Add romstage early graphics for brya"
by Jakub Czapiga (Code Review) 04 Jan '23

04 Jan '23

Attention is currently required from: Bora Guvendik, Anil Kumar K, Cliff Huang, Jakub Czapiga, Jérémy Compostella, Paul Menzel, Angel Pons, Arthur Heymans, Zhixing Ma, Nico Huber, Tarun Tuli, Michał Żygowski, Nick Vaccaro. Hello Bora Guvendik, build bot (Jenkins), Anil Kumar K, Cliff Huang, Jérémy Compostella, Paul Menzel, Angel Pons, Arthur Heymans, Zhixing Ma, Tarun Tuli, Nico Huber, Michał Żygowski, Nick Vaccaro, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/71280 to look at the new patch set (#2). Change subject: Revert "mb/google/brya: Add romstage early graphics for brya" ...................................................................... Revert "mb/google/brya: Add romstage early graphics for brya" This reverts commit 96d9b756690839c17b307a93b8a1898bd1c02ff5. Reason for revert: Merged out of order, broke tree Signed-off-by: Jakub Czapiga <jacz(a)semihalf.com> Change-Id: Iac2d78f2d6c687f52dc720e8d8dcb5cf7a171c9d --- M src/mainboard/google/brya/Makefile.inc D src/mainboard/google/brya/gma-mainboard.ads M src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb 3 files changed, 15 insertions(+), 45 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/71280/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/71280 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iac2d78f2d6c687f52dc720e8d8dcb5cf7a171c9d Gerrit-Change-Number: 71280 Gerrit-PatchSet: 2 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: Revert "mb/google/brya: Define a more suitable MRC training text mess...
by Jakub Czapiga (Code Review) 04 Jan '23

04 Jan '23

Attention is currently required from: Anil Kumar K, Tarun Tuli, Jakub Czapiga, Jérémy Compostella, Angel Pons, Nick Vaccaro. Hello build bot (Jenkins), Anil Kumar K, Tarun Tuli, Jérémy Compostella, Angel Pons, Nick Vaccaro, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/71279 to look at the new patch set (#2). Change subject: Revert "mb/google/brya: Define a more suitable MRC training text message" ...................................................................... Revert "mb/google/brya: Define a more suitable MRC training text message" This reverts commit e45f70423e5da8509bae83aba84b08f8fc0f624e. Reason for revert: Merged out of order, broke tree Signed-off-by: Jakub Czapiga <jacz(a)semihalf.com> Change-Id: I38a7be6b94199d3a23e78114fb6708c535f241cc --- M src/mainboard/google/brya/Kconfig 1 file changed, 14 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/71279/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/71279 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I38a7be6b94199d3a23e78114fb6708c535f241cc Gerrit-Change-Number: 71279 Gerrit-PatchSet: 2 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: mb/google/brya: Add romstage early graphics for brya
by Jakub Czapiga (Code Review) 04 Jan '23

04 Jan '23

Jakub Czapiga has created a revert of this change. ( https://review.coreboot.org/c/coreboot/+/70304 ) Change subject: mb/google/brya: Add romstage early graphics for brya ...................................................................... -- To view, visit https://review.coreboot.org/c/coreboot/+/70304 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I41c9cccb09dea52e2318f8f9ebeeda3697a7b513 Gerrit-Change-Number: 70304 Gerrit-PatchSet: 43 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-MessageType: revert

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[M] Change in coreboot[master]: Revert "mb/google/brya: Add romstage early graphics for brya"
by Jakub Czapiga (Code Review) 04 Jan '23

04 Jan '23

Attention is currently required from: Bora Guvendik, Zhixing Ma, Anil Kumar K, Cliff Huang, Nico Huber, Tarun Tuli, Michał Żygowski, Jérémy Compostella, Paul Menzel, Angel Pons, Arthur Heymans, Nick Vaccaro. Hello Bora Guvendik, build bot (Jenkins), Anil Kumar K, Cliff Huang, Jérémy Compostella, Paul Menzel, Angel Pons, Arthur Heymans, Zhixing Ma, Tarun Tuli, Nico Huber, Michał Żygowski, Nick Vaccaro, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/71280 to review the following change. Change subject: Revert "mb/google/brya: Add romstage early graphics for brya" ...................................................................... Revert "mb/google/brya: Add romstage early graphics for brya" This reverts commit 96d9b756690839c17b307a93b8a1898bd1c02ff5. Reason for revert: Merged out of order, broke tree Change-Id: Iac2d78f2d6c687f52dc720e8d8dcb5cf7a171c9d --- M src/mainboard/google/brya/Makefile.inc D src/mainboard/google/brya/gma-mainboard.ads M src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb 3 files changed, 14 insertions(+), 45 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/71280/1 diff --git a/src/mainboard/google/brya/Makefile.inc b/src/mainboard/google/brya/Makefile.inc index ab80e32..c40f21c 100644 --- a/src/mainboard/google/brya/Makefile.inc +++ b/src/mainboard/google/brya/Makefile.inc @@ -4,7 +4,6 @@ romstage-$(CONFIG_CHROMEOS) += chromeos.c romstage-y += romstage.c -romstage-$(CONFIG_MAINBOARD_USE_EARLY_LIBGFXINIT) += gma-mainboard.ads ramstage-$(CONFIG_CHROMEOS) += chromeos.c ramstage-y += mainboard.c diff --git a/src/mainboard/google/brya/gma-mainboard.ads b/src/mainboard/google/brya/gma-mainboard.ads deleted file mode 100644 index 3b02f14..0000000 --- a/src/mainboard/google/brya/gma-mainboard.ads +++ /dev/null @@ -1,13 +0,0 @@ --- SPDX-License-Identifier: GPL-2.0-or-later - -with HW.GFX.GMA; -with HW.GFX.GMA.Display_Probing; - -use HW.GFX.GMA; -use HW.GFX.GMA.Display_Probing; - -private package GMA.Mainboard is - ports : constant Port_List := - (eDP, - others => Disabled); -end GMA.Mainboard; diff --git a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb index efc2fcb..70e7779 100644 --- a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb @@ -123,37 +123,7 @@ }" device domain 0 on - # The timing values can be derived from datasheet of display panel - # You can use EDID string to identify the type of display on the board - # use below command to get display info from EDID - # strings /sys/devices/pci0000:00/0000:00:02.0/drm/card0/card0-eDP-1/edid - - # refer to display PRM document (Volume 2b: Command Reference: Registers) - # for more info on display control registers - # https://01.org/linuxgraphics/documentation/hardware-specification-prms - #+-----------------------------+---------------------------------------+-----+ - #| Intel docs | devicetree.cb | eDP | - #+-----------------------------+---------------------------------------+-----+ - #| Power up delay | `gpu_panel_power_up_delay` | T3 | - #+-----------------------------+---------------------------------------+-----+ - #| Power on to backlight on | `gpu_panel_power_backlight_on_delay` | T7 | - #+-----------------------------+---------------------------------------+-----+ - #| Power Down delay | `gpu_panel_power_down_delay` | T10 | - #+-----------------------------+---------------------------------------+-----+ - #| Backlight off to power down | `gpu_panel_power_backlight_off_delay` | T9 | - #+-----------------------------+---------------------------------------+-----+ - #| Power Cycle Delay | `gpu_panel_power_cycle_delay` | T12 | - #+-----------------------------+---------------------------------------+-----+ - device ref igpu on - register "panel_cfg" = "{ - .up_delay_ms = 200, - .down_delay_ms = 50, - .cycle_delay_ms = 500, - .backlight_on_delay_ms = 1, - .backlight_off_delay_ms = 200, - .backlight_pwm_hz = 200, - }" - end + device ref igpu on end device ref dtt on end device ref tbt_pcie_rp0 on end device ref tbt_pcie_rp1 on end -- To view, visit https://review.coreboot.org/c/coreboot/+/71280 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iac2d78f2d6c687f52dc720e8d8dcb5cf7a171c9d Gerrit-Change-Number: 71280 Gerrit-PatchSet: 1 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: mb/google/brya: Define a more suitable MRC training text message
by Jakub Czapiga (Code Review) 04 Jan '23

04 Jan '23

Jakub Czapiga has created a revert of this change. ( https://review.coreboot.org/c/coreboot/+/70796 ) Change subject: mb/google/brya: Define a more suitable MRC training text message ...................................................................... -- To view, visit https://review.coreboot.org/c/coreboot/+/70796 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie71cd86746427789b3694d41224bf2c170af0f91 Gerrit-Change-Number: 70796 Gerrit-PatchSet: 28 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: revert

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[S] Change in coreboot[master]: Revert "mb/google/brya: Define a more suitable MRC training text mess...
by Jakub Czapiga (Code Review) 04 Jan '23

04 Jan '23

Attention is currently required from: Anil Kumar K, Tarun Tuli, Jérémy Compostella, Angel Pons, Nick Vaccaro. Hello build bot (Jenkins), Anil Kumar K, Tarun Tuli, Jérémy Compostella, Angel Pons, Nick Vaccaro, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/71279 to review the following change. Change subject: Revert "mb/google/brya: Define a more suitable MRC training text message" ...................................................................... Revert "mb/google/brya: Define a more suitable MRC training text message" This reverts commit e45f70423e5da8509bae83aba84b08f8fc0f624e. Reason for revert: Merged out of order, broke tree Change-Id: I38a7be6b94199d3a23e78114fb6708c535f241cc --- M src/mainboard/google/brya/Kconfig 1 file changed, 13 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/71279/1 diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index a267946..bc754be 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -332,7 +332,4 @@ int default 32 -config MEMORY_TRAINING_TEXT - default "Your device is finishing an update. This may take 1-2 minutes.\\Please do not turn off your device." - endif # BOARD_GOOGLE_BRYA_COMMON -- To view, visit https://review.coreboot.org/c/coreboot/+/71279 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I38a7be6b94199d3a23e78114fb6708c535f241cc Gerrit-Change-Number: 71279 Gerrit-PatchSet: 1 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: mb/google/brya/var/kano: Set the ov2740 to 0 and the hi556 to 1 for SSFC
by David Wu (Code Review) 04 Jan '23

04 Jan '23

Attention is currently required from: Tarun Tuli, Ren Kuo, Nick Vaccaro. David Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71628 ) Change subject: mb/google/brya/var/kano: Set the ov2740 to 0 and the hi556 to 1 for SSFC ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/brya/variants/kano/overridetree.cb: https://review.coreboot.org/c/coreboot/+/71628/comment/9b56f792_531aae25 PS1, Line 20: option UFC_MIPI_OVTI2740 0 > How does the firmware know whether to use ZYDRON_UFC to determine UFC type or use UFC to determine U […] You can refer to CB:70881. UFC is for kano (MP device) and doesn't use SSFC (only one mipi camera ov2740). ZYDRON_UFC is for zydron (new device) and needs to use SSFC (there are two mipi cameras hi556 and ov2740). -- To view, visit https://review.coreboot.org/c/coreboot/+/71628 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I46fac6c820d6006956680a07198db82225630905 Gerrit-Change-Number: 71628 Gerrit-PatchSet: 1 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Wed, 04 Jan 2023 17:20:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: comment

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[L] Change in coreboot[master]: mb/system76/adl-p: Add Lemur Pro 11 as a variant
by Tim Crawford (Code Review) 04 Jan '23

04 Jan '23

Attention is currently required from: Tim Crawford, Jeremy Soller, Angel Pons. Hello build bot (Jenkins), Jeremy Soller, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/65384 to look at the new patch set (#23). Change subject: mb/system76/adl-p: Add Lemur Pro 11 as a variant ...................................................................... mb/system76/adl-p: Add Lemur Pro 11 as a variant The Lemur Pro 11 (lemp11) is an Alder Lake-U board. Tested with a custom TianoCore UefiPayloadPkg. Working: - PS/2 keyboard, touchpad - DIMM slot (with NMSO480E82-3200EA00) - M.2 NVMe SSD (with MZVL2500HCJQ) - M.2 SATA SSD (with WDS100T2B0B) - All USB ports - SD card reader - Webcam - WiFi/Bluetooth - Integrated graphics using Intel GOP driver - HDMI output - DisplayPort output over USB-C - Internal microphone - Internal speakers - Combined headset + mic 3.5mm audio - Booting Pop!_OS Linux 22.04 with kernel 5.18.5 - Internal flashing with flashrom v1.2-703-g76118a7c10ed Not working: - On-board RAM: Requires CB:65567 - Detection of devices in TBT slot on boot - S0ix suspend/resume Change-Id: Ic930df1ebacc8c7ef14dbb6c67a97eddb918b365 Signed-off-by: Tim Crawford <tcrawford(a)system76.com> --- M Documentation/mainboard/index.md A Documentation/mainboard/system76/lemp11.md M src/mainboard/system76/adl-p/Kconfig M src/mainboard/system76/adl-p/Kconfig.name M src/mainboard/system76/adl-p/Makefile.inc A src/mainboard/system76/adl-p/spd/samsung-P4AAF165WA-BCWDE.spd.hex A src/mainboard/system76/adl-p/variants/lemp11/board_info.txt A src/mainboard/system76/adl-p/variants/lemp11/data.vbt A src/mainboard/system76/adl-p/variants/lemp11/gpio.c A src/mainboard/system76/adl-p/variants/lemp11/gpio_early.c A src/mainboard/system76/adl-p/variants/lemp11/hda_verb.c A src/mainboard/system76/adl-p/variants/lemp11/overridetree.cb A src/mainboard/system76/adl-p/variants/lemp11/romstage.c 13 files changed, 598 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/65384/23 -- To view, visit https://review.coreboot.org/c/coreboot/+/65384 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic930df1ebacc8c7ef14dbb6c67a97eddb918b365 Gerrit-Change-Number: 65384 Gerrit-PatchSet: 23 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/system76/adl-p: Enable AER on CPU PCIe RP
by Tim Crawford (Code Review) 04 Jan '23

04 Jan '23

Tim Crawford has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/71662 ) Change subject: mb/system76/adl-p: Enable AER on CPU PCIe RP ...................................................................... mb/system76/adl-p: Enable AER on CPU PCIe RP Tested with the following drives: - Crucial P5 Plus (CT500P5PSSD8) - Kingston KC3000 (SKC3000S/512G) - Sabrent Rocket NVMe 4.0 (SB-ROCKET-NVMEe4-500) - Samsung 970 EVO (MZ-V7E250) - Samsung 970 EVO Plus (MZ-V7S250) - Samsung 980 PRO (MZ-V8P2T0) - WD Black SN850X (WDS100T2XD0E) - WD Blue SN580 (WDS500G2B0C) - WD Green SN350 (WDS240G2G0C) Test: - Drive is functional and has no unrecoverable errors on boot - Drive is functional and has no unrecoverable errors after S0ix Change-Id: I51492c97c48f760d4aa9e4a2b2e57b0f1a06d090 Signed-off-by: Tim Crawford <tcrawford(a)system76.com> --- M src/mainboard/system76/adl-p/variants/darp8/overridetree.cb M src/mainboard/system76/adl-p/variants/galp6/overridetree.cb 2 files changed, 29 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/71662/1 diff --git a/src/mainboard/system76/adl-p/variants/darp8/overridetree.cb b/src/mainboard/system76/adl-p/variants/darp8/overridetree.cb index 4caed3a..5f82c44 100644 --- a/src/mainboard/system76/adl-p/variants/darp8/overridetree.cb +++ b/src/mainboard/system76/adl-p/variants/darp8/overridetree.cb @@ -20,7 +20,7 @@ register "cpu_pcie_rp[CPU_RP(1)]" = "{ .clk_src = 0, .clk_req = 0, - .flags = PCIE_RP_LTR, + .flags = PCIE_RP_LTR | PCIE_RP_AER, }" chip soc/intel/common/block/pcie/rtd3 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D14)" # SSD2_PWR_EN diff --git a/src/mainboard/system76/adl-p/variants/galp6/overridetree.cb b/src/mainboard/system76/adl-p/variants/galp6/overridetree.cb index e63e185..c10e17a 100644 --- a/src/mainboard/system76/adl-p/variants/galp6/overridetree.cb +++ b/src/mainboard/system76/adl-p/variants/galp6/overridetree.cb @@ -18,7 +18,7 @@ register "cpu_pcie_rp[CPU_RP(1)]" = "{ .clk_src = 0, .clk_req = 0, - .flags = PCIE_RP_LTR, + .flags = PCIE_RP_LTR | PCIE_RP_AER, }" chip soc/intel/common/block/pcie/rtd3 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D14)" # SSD1_PWR_EN -- To view, visit https://review.coreboot.org/c/coreboot/+/71662 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I51492c97c48f760d4aa9e4a2b2e57b0f1a06d090 Gerrit-Change-Number: 71662 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-MessageType: newchange

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coreboot-gerrit January 2023