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Hello Bora Guvendik, build bot (Jenkins), Anil Kumar K, Cliff Huang, Paul Menzel, Angel Pons, Arthur Heymans, Andrey Petrov, Zhixing Ma, Tarun Tuli, Nico Huber, Michał Żygowski, Nick Vaccaro, Boris Mittelberg,
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Change subject: soc/intel/alderlake: Inform user of memory training
......................................................................
soc/intel/alderlake: Inform user of memory training
If memory training is going to happen and early graphics is supported
by the mainboard, an on-screen text message is displayed to inform the
end user.
Memory training can take a while and an impatient end user facing a
black screen for a while may reset the device unnecessarily.
BUG=b:252792591
BRANCH=firmware-brya-14505.B
TEST=On screen text message during MRC training observed on skolas
Change-Id: I4ea15123eed1a4355c5ff7d815925032d4151de0
Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com>
---
M src/soc/intel/alderlake/romstage/fsp_params.c
M src/soc/intel/alderlake/romstage/romstage.c
2 files changed, 50 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/70300/38
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Change subject: soc/intel/alderlake: Add romstage early graphics support
......................................................................
soc/intel/alderlake: Add romstage early graphics support
BUG=b:252792591
BRANCH=firmware-brya-14505.B
TEST=Verify that VGA text mode is functional in romstage
Change-Id: I727b28bbe180edc2574e09bf03f1534d6282bdb2
Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com>
---
M src/soc/intel/alderlake/Kconfig
M src/soc/intel/alderlake/chip.h
M src/soc/intel/alderlake/romstage/Makefile.inc
M src/soc/intel/alderlake/romstage/fsp_params.c
A src/soc/intel/alderlake/romstage/graphics.c
5 files changed, 106 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/70303/43
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Change subject: mb/system76/tgl-u: Add FSP-S configs per variant
......................................................................
Patch Set 1: Code-Review+2
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Change subject: soc/intel/common/block: Add Intel VGA early graphics support
......................................................................
soc/intel/common/block: Add Intel VGA early graphics support
This patch introduces an early graphics driver which can be used in
romstage in cache-as-ram mode. The implementation relies on
`libgfxinit' and provide VGA text mode support.
SoCs wanting to take advantage of this driver must implement the
following functions:
- `void early_graphics_soc_device_init(void)' to set the
graphic device MMIO to the `CONFIG_GFX_GMA_DEFAULT_MMIO'
value (typically PCI graphic device Base Address Register 0).
- `void early_graphics_soc_panel_init(void)' to set the panel power
sequence timing parameters.
BUG=b:252792591
BRANCH=firmware-brya-14505.B
TEST=Graphics bring up observed on skolas with extra patches
Change-Id: Ie4ad1215e5fadd0adc1271b6bd6ddb0ea258cb5b
Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com>
---
M src/drivers/intel/gma/gma-gfx_init.ads
M src/drivers/intel/gma/hires_fb/gma-gfx_init.adb
M src/drivers/intel/gma/libgfxinit.h
M src/drivers/intel/gma/text_fb/gma-gfx_init.adb
M src/soc/intel/common/block/graphics/Kconfig
M src/soc/intel/common/block/graphics/Makefile.inc
A src/soc/intel/common/block/graphics/early_graphics.c
A src/soc/intel/common/block/include/intelblocks/early_graphics.h
8 files changed, 125 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/70299/25
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Change subject: drivers/intel/gma: Hook up libgfxinit in romstage
......................................................................
drivers/intel/gma: Hook up libgfxinit in romstage
A mainboard port needs to:
- select `CONFIG_MAINBOARD_HAS_EARLY_LIBGFXINIT'
- implement the Ada package `GMA.Mainboard' with a single function
`ports' that returns a list of ports to be probed for displays.
- set the desired `GFX_GMA_DEFAULT_MMIO' IO memory address to use
in romstage for the graphic device.
BUG=b:252792591
BRANCH=firmware-brya-14505.B
TEST=libgfxinit compiles in romstage.
libgfxinit successfully executes in romstage and ramstage using
the requested MMIO setting on skolas.
Change-Id: I3c2101de10dc5df54fe873e43bbe0f1c4dccff44
Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com>
---
M src/arch/x86/car.ld
M src/device/Kconfig
M src/drivers/intel/gma/Kconfig
M src/drivers/intel/gma/Makefile.inc
M src/soc/intel/common/block/graphics/graphics.c
5 files changed, 124 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/70276/20
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Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71280 )
Change subject: Revert "mb/google/brya: Add romstage early graphics for brya"
......................................................................
Patch Set 2: Code-Review+2
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Change subject: Revert "mb/google/brya: Define a more suitable MRC training text message"
......................................................................
Patch Set 2: Code-Review+2
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Kapil Porwal has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/71654 )
Change subject: soc/intel/meteorlake: Add support to configure package c-state demotion
......................................................................
soc/intel/meteorlake: Add support to configure package c-state demotion
This patch adds the support to enable/disable package c-state demotion
feature from the devicetree based on mainboard requirement.
Port of commit 4be8d9e80deb ("soc/intel/adl: Add support to configure
package c-state demotion")
BUG=none
TEST=Boot to the OS on Google/Rex.
Snippet from FSP log:
[SPEW ] PkgCState Demotion : 0x1
Signed-off-by: Kapil Porwal <kapilporwal(a)google.com>
Change-Id: I0a4b0b181349ce41035524482add4336cf83a68b
---
M src/soc/intel/meteorlake/chip.h
M src/soc/intel/meteorlake/fsp_params.c
2 files changed, 30 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/71654/1
diff --git a/src/soc/intel/meteorlake/chip.h b/src/soc/intel/meteorlake/chip.h
index ad382e3..dfd5c36 100644
--- a/src/soc/intel/meteorlake/chip.h
+++ b/src/soc/intel/meteorlake/chip.h
@@ -347,6 +347,13 @@
uint8_t lan_clk;
/*
+ * Enable or Disable Package C-state Demotion.
+ * Default is set to 0.
+ * Set this to 1 in order to disable Package C-state demotion.
+ */
+ bool disable_package_c_state_demotion;
+
+ /*
* Enable or Disable Skipping MBP HOB.
* Default is set to 0 and set to 1 to skip the MBP HOB.
*/
diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c
index 50b4a76..baba5f9 100644
--- a/src/soc/intel/meteorlake/fsp_params.c
+++ b/src/soc/intel/meteorlake/fsp_params.c
@@ -427,6 +427,7 @@
/* Enable the energy efficient turbo mode */
s_cfg->EnergyEfficientTurbo = 1;
s_cfg->PmcLpmS0ixSubStateEnableMask = get_supported_lpm_mask();
+ s_cfg->PkgCStateDemotion = !config->disable_package_c_state_demotion;
}
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I0a4b0b181349ce41035524482add4336cf83a68b
Gerrit-Change-Number: 71654
Gerrit-PatchSet: 1
Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com>
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