coreboot-gerrit September 2022

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[S] Change in coreboot[master]: [TESTONLY] soc/intel/apollolake: Write to PCI config XHCLKGTEN
by Angel Pons (Code Review) 02 Sep '22

02 Sep '22

Attention is currently required from: Andrey Petrov. Hello build bot (Jenkins), Andrey Petrov, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/67316 to look at the new patch set (#2). Change subject: [TESTONLY] soc/intel/apollolake: Write to PCI config XHCLKGTEN ...................................................................... [TESTONLY] soc/intel/apollolake: Write to PCI config XHCLKGTEN Documentation says that the XHCLKGTEN register in the XHCI MMIO space is a "dummy register, mirror of physical register as XHCLKGTEN". So, try to write to the XHCLKGTEN register in the XHCI PCI config space. Change-Id: I05f5490fdb949f68bac16602ab94e0226854b38c Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/soc/intel/apollolake/chip.c 1 file changed, 21 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/67316/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/67316 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I05f5490fdb949f68bac16602ab94e0226854b38c Gerrit-Change-Number: 67316 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: [TESTONLY] soc/intel/apollolake: Write to PCI config XHCLKGTEN
by Angel Pons (Code Review) 02 Sep '22

02 Sep '22

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/67316 ) Change subject: [TESTONLY] soc/intel/apollolake: Write to PCI config XHCLKGTEN ...................................................................... [TESTONLY] soc/intel/apollolake: Write to PCI config XHCLKGTEN Documentation says that the XHCLKGTEN register in the XHCI MMIO space is a "dummy register, mirror of physical register as XHCLKGTEN". So, try to write to the XHCLKGTEN register in the XHCI PCI config space. Change-Id: I05f5490fdb949f68bac16602ab94e0226854b38c Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/soc/intel/apollolake/chip.c 1 file changed, 16 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/67316/1 diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index bbf0564..6bb4c64 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -866,19 +866,12 @@ * mitigate USB device suspend and resume failure. */ if (CONFIG(SOC_INTEL_GEMINILAKE)) { - uint32_t *cfg; - const struct resource *res; - uint32_t reg; - struct device *xhci_dev = PCH_DEV_XHCI; - - res = find_resource(xhci_dev, PCI_BASE_ADDRESS_0); - cfg = (void *)(uintptr_t)(res->base + CFG_XHCLKGTEN); - reg = SRAMPGTEN | SSLSE | USB2PLLSE | IOSFSTCGE | + uint32_t reg = SRAMPGTEN | SSLSE | USB2PLLSE | IOSFSTCGE | HSTCGE | HSUXDMIPLLSE | SSTCGE | XHCFTCLKSE | XHCBBTCGIPISO | XHCUSB2PLLSDLE | SSPLLSUE | XHCBLCGE | HSLTCGE | SSLTCGE | IOSFBTCGE | IOSFGBLCGE; - write32(cfg, reg); + pci_write_config32(PCH_DEV_XHCI, 0x50, reg); } /* Disable XHCI LFPS power management if the option in dev tree is set. */ -- To view, visit https://review.coreboot.org/c/coreboot/+/67316 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I05f5490fdb949f68bac16602ab94e0226854b38c Gerrit-Change-Number: 67316 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: soc/intel/alderlake: Remove dependency of FSP-S CpuMpPei Module
by Subrata Banik (Code Review) 02 Sep '22

02 Sep '22

Attention is currently required from: Tim Wawrzynczak, Angel Pons, Arthur Heymans, Ronak Kanabar, Eric Lai, Werner Zeh. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/66706 ) Change subject: soc/intel/alderlake: Remove dependency of FSP-S CpuMpPei Module ...................................................................... Patch Set 5: (1 comment) Patchset: PS5: Thanks Sheng, can we please get this in? -- To view, visit https://review.coreboot.org/c/coreboot/+/66706 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8ebe0bcfda513e79e791df7ab54b357aa23d295c Gerrit-Change-Number: 66706 Gerrit-PatchSet: 5 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Fri, 02 Sep 2022 13:41:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/intel/alderlake: Remove dependency of FSP-S CpuMpPei Module
by Lean Sheng Tan (Code Review) 02 Sep '22

02 Sep '22

Attention is currently required from: Subrata Banik, Tim Wawrzynczak, Angel Pons, Arthur Heymans, Ronak Kanabar, Eric Lai, Werner Zeh. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/66706 ) Change subject: soc/intel/alderlake: Remove dependency of FSP-S CpuMpPei Module ...................................................................... Patch Set 5: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/66706 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8ebe0bcfda513e79e791df7ab54b357aa23d295c Gerrit-Change-Number: 66706 Gerrit-PatchSet: 5 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Fri, 02 Sep 2022 13:02:48 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[L] Change in coreboot[master]: soc/amd/common/psp: Support PSP SMI handler
by ritul guru (Code Review) 02 Sep '22

02 Sep '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Martin L Roth, ritul guru, Marshall Dawson, Matt DeVillier, Paul Menzel, Arthur Heymans, Fred Reitberger, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Matt DeVillier, Fred Reitberger, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/65523 to look at the new patch set (#18). Change subject: soc/amd/common/psp: Support PSP SMI handler ...................................................................... soc/amd/common/psp: Support PSP SMI handler Enable optional support for registering an SMI handler for PSP SPI flash read/write/erase operation requests. The PSP SMI needs to be configured before the PSP can actually issue SMI after being informed of the SMI trigger info via the SMM_INFO command. See AMD document 55570 revision 3.16 for additional details. The PSP will not trigger SMI until informed via the SMM area buffer that SMM requests are ready to be served. See AMD document 55758 revision 2.00 for additional details. Change-Id: Ie1f4646101b90bc52c492f35fd26e6ca1e496142 Signed-off-by: Ritul Guru <ritul.bits(a)gmail.com> --- M src/soc/amd/common/block/include/amdblocks/psp.h M src/soc/amd/common/block/include/amdblocks/smi.h M src/soc/amd/common/block/include/amdblocks/spi.h M src/soc/amd/common/block/psp/Kconfig M src/soc/amd/common/block/psp/Makefile.inc M src/soc/amd/common/block/psp/psp_def.h M src/soc/amd/common/block/psp/psp_gen2.c A src/soc/amd/common/block/psp/psp_p2c.c A src/soc/amd/common/block/psp/psp_smi.c M src/soc/amd/common/block/psp/psp_smm.c M src/soc/amd/common/block/smi/smi_util.c M src/soc/amd/common/block/spi/Kconfig M src/soc/amd/picasso/smihandler.c M src/soc/amd/stoneyridge/include/soc/smi.h 14 files changed, 705 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/65523/18 -- To view, visit https://review.coreboot.org/c/coreboot/+/65523 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie1f4646101b90bc52c492f35fd26e6ca1e496142 Gerrit-Change-Number: 65523 Gerrit-PatchSet: 18 Gerrit-Owner: ritul guru <ritul.bits(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[master]: soc/amd/common/psp: Support PSP SMI handler
by ritul guru (Code Review) 02 Sep '22

02 Sep '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Martin L Roth, Marshall Dawson, Matt DeVillier, Paul Menzel, Arthur Heymans, Fred Reitberger, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Matt DeVillier, Fred Reitberger, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/65523 to look at the new patch set (#17). Change subject: soc/amd/common/psp: Support PSP SMI handler ...................................................................... soc/amd/common/psp: Support PSP SMI handler Enable optional support for registering an SMI handler for PSP SPI flash read/write/erase operation requests. The PSP SMI needs to be configured before the PSP can actually issue SMI after being informed of the SMI trigger info via the SMM_INFO command. See AMD document 55570 revision 3.16 for additional details. The PSP will not trigger SMI until informed via the SMM area buffer that SMM requests are ready to be served. See AMD document 55758 revision 2.00 for additional details. Change-Id: Ie1f4646101b90bc52c492f35fd26e6ca1e496142 Signed-off-by: Ritul Guru <ritul.bits(a)gmail.com> --- M src/soc/amd/common/block/include/amdblocks/psp.h M src/soc/amd/common/block/include/amdblocks/smi.h M src/soc/amd/common/block/include/amdblocks/spi.h M src/soc/amd/common/block/psp/Kconfig M src/soc/amd/common/block/psp/Makefile.inc M src/soc/amd/common/block/psp/psp_def.h M src/soc/amd/common/block/psp/psp_gen2.c A src/soc/amd/common/block/psp/psp_p2c.c A src/soc/amd/common/block/psp/psp_smi.c M src/soc/amd/common/block/psp/psp_smm.c M src/soc/amd/common/block/smi/smi_util.c M src/soc/amd/common/block/spi/Kconfig M src/soc/amd/picasso/smihandler.c M src/soc/amd/stoneyridge/include/soc/smi.h 14 files changed, 706 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/65523/17 -- To view, visit https://review.coreboot.org/c/coreboot/+/65523 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie1f4646101b90bc52c492f35fd26e6ca1e496142 Gerrit-Change-Number: 65523 Gerrit-PatchSet: 17 Gerrit-Owner: ritul guru <ritul.bits(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/corsola: Fix ANX7625 power-on T4 sequence
by wen zhang (Code Review) 02 Sep '22

02 Sep '22

Attention is currently required from: zanxi chen. wen zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67315 ) Change subject: mb/google/corsola: Fix ANX7625 power-on T4 sequence ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/67315 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6b888707ec3c0612e396564e77c4cdbe92614dc5 Gerrit-Change-Number: 67315 Gerrit-PatchSet: 1 Gerrit-Owner: zanxi chen <chenzanxi(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: wen zhang <zhangwen6(a)huaqin.corp-partner.google.com> Gerrit-Attention: zanxi chen <chenzanxi(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Fri, 02 Sep 2022 12:04:08 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/corsola: Fix ANX7625 power-on T4 sequence
by zanxi chen (Code Review) 02 Sep '22

02 Sep '22

zanxi chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/67315 ) Change subject: mb/google/corsola: Fix ANX7625 power-on T4 sequence ...................................................................... mb/google/corsola: Fix ANX7625 power-on T4 sequence The T4 of ANX7625 power on sequence should be larger than 0ms, but it's -59ms now. So add 100ms delay between DSI_TE and LCM_RST. BUG=b:242352915 TEST=The sequence T4 is larger than 0ms when power on. Change-Id: I6b888707ec3c0612e396564e77c4cdbe92614dc5 Signed-off-by: Zanxi Chen <chenzanxi(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/corsola/display.c 1 file changed, 17 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/67315/1 diff --git a/src/mainboard/google/corsola/display.c b/src/mainboard/google/corsola/display.c index dc66de2..f0a3b28 100644 --- a/src/mainboard/google/corsola/display.c +++ b/src/mainboard/google/corsola/display.c @@ -82,7 +82,7 @@ gpio_output(GPIO_EN_PP3300_EDPBRDG, 1); mdelay(14); gpio_output(GPIO_EDPBRDG_PWREN, 1); - mdelay(10); + mdelay(110); gpio_output(GPIO_EDPBRDG_RST_L, 1); } -- To view, visit https://review.coreboot.org/c/coreboot/+/67315 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6b888707ec3c0612e396564e77c4cdbe92614dc5 Gerrit-Change-Number: 67315 Gerrit-PatchSet: 1 Gerrit-Owner: zanxi chen <chenzanxi(a)huaqin.corp-partner.google.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: Add support for PSP NVRAM base addr and size
by ritul guru (Code Review) 02 Sep '22

02 Sep '22

Attention is currently required from: Bao Zheng, Jason Glenesk, Matt DeVillier, Paul Menzel, Fred Reitberger, Felix Held. ritul guru has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67137 ) Change subject: Add support for PSP NVRAM base addr and size ...................................................................... Patch Set 4: (1 comment) Patchset: PS2: > Please split it in two commits: […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/67137 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1664893db6f6dcdc588aeaf9448c2d81390af5fa Gerrit-Change-Number: 67137 Gerrit-PatchSet: 4 Gerrit-Owner: ritul guru <ritul.bits(a)gmail.com> Gerrit-Reviewer: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 02 Sep 2022 11:38:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[L] Change in coreboot[master]: soc/amd/common/psp: Support PSP SMI handler
by ritul guru (Code Review) 02 Sep '22

02 Sep '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Martin L Roth, Marshall Dawson, Matt DeVillier, Paul Menzel, Arthur Heymans, Fred Reitberger, Felix Held. ritul guru has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/65523 ) Change subject: soc/amd/common/psp: Support PSP SMI handler ...................................................................... Patch Set 16: (10 comments) File src/soc/amd/common/block/include/amdblocks/spi.h: https://review.coreboot.org/c/coreboot/+/65523/comment/645168ff_f4a62b12 PS15, Line 34: register > i'd be a bit more specific here and say register bit instead of register, since other bits on that r […] Ack https://review.coreboot.org/c/coreboot/+/65523/comment/5e0f4344_f61d76c5 PS15, Line 33: /* : * Re-purpose unused SPI controller register for semaphore to synchronize SPI access : * between SMM and non-SMM software. : */ : #define SPI_SEMAPHORE 0xfc : #define SPI_SEM_LOCKED BIT(4) > please move this below the SPI_FIFO_DEPTH define to have the register definitions ordered by their o […] Ack File src/soc/amd/common/block/psp/psp_def.h: https://review.coreboot.org/c/coreboot/+/65523/comment/45b53e9c_4ff38007 PS15, Line 26: /* PSP to x86 commands */ : #define MBOX_PSP_CMD_SPI_INFO 0x83 : #define MBOX_PSP_CMD_SPI_READ 0x84 : #define MBOX_PSP_CMD_SPI_WRITE 0x85 : #define MBOX_PSP_CMD_SPI_ERASE 0x86 > i'd move this to line 36 below the 3 psp v1-only x86 to psp commands to not have the psp to x86 mail […] Ack https://review.coreboot.org/c/coreboot/+/65523/comment/6b90d0d5_2e8e8d51 PS15, Line 63: struct pspv2_bios_mbox { : u32 mbox_command; : union { : u32 val; : struct smi_mbox_status { : u32 checksum:8; : u32 checksum_en:1; : u32 reserved:22; : u32 command_ready:1; : } __packed fields; : }; : struct mbox_default_buffer buffer; : } __packed; > since the pspv2_bios_mbox struct is only used in the p2c mailbox access code, i'd move it to the psp […] Ack https://review.coreboot.org/c/coreboot/+/65523/comment/90782f73_484d1ad1 PS15, Line 91: #define SMI_TARGET_NVRAM 0 : #define SMI_TARGET_RPMC_NVRAM 5 > i'd use an enum instead of the defines here Ack https://review.coreboot.org/c/coreboot/+/65523/comment/f96c3825_7feb0b3d PS15, Line 94: #define PSP_INIT_TIMEOUT 10000 /* 10 seconds */ : #define PSP_CMD_TIMEOUT 1000 /* 1 second */ > those are already defined in line 142 and 143 Ack File src/soc/amd/common/block/psp/psp_gen2.c: PS15: > hm, i'd move the p2c mailbox access functions to a separate file to not have the c2p and p2c mailbox […] Ack https://review.coreboot.org/c/coreboot/+/65523/comment/804b9d92_ea64de31 PS15, Line 10: > not directly related to this patch, but this file is missing a types. […] Ack https://review.coreboot.org/c/coreboot/+/65523/comment/58396765_20e7d83c PS15, Line 147: u8 > i'd use bool here Ack https://review.coreboot.org/c/coreboot/+/65523/comment/f09beda5_f9237815 PS15, Line 180: u32 > since this returns an enum mbox_p2c_status value. […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/65523 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie1f4646101b90bc52c492f35fd26e6ca1e496142 Gerrit-Change-Number: 65523 Gerrit-PatchSet: 16 Gerrit-Owner: ritul guru <ritul.bits(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 02 Sep 2022 11:33:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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coreboot-gerrit September 2022