coreboot-gerrit September 2022

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: mb/google/grunt: Enable AC wake
by Daisuke Nojiri (Code Review) 07 Sep '22

07 Sep '22

Daisuke Nojiri has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/67389 ) Change subject: mb/google/grunt: Enable AC wake ...................................................................... mb/google/grunt: Enable AC wake This patch enables AC plug/unplug for resume. BUG=b:188457962 BRANCH=grunt TEST=Verified AC plug/unplug wakes up Treeya. Signed-off-by: Daisuke Nojiri <dnojiri(a)chromium.org> Change-Id: I10480f8224b909fefe42d46d7c03fc9d3fe5abfe --- M src/mainboard/google/kahlee/variants/baseboard/include/baseboard/ec.h 1 file changed, 19 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/67389/1 diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/ec.h b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/ec.h index bd5c295..2b89387 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/ec.h +++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/ec.h @@ -38,7 +38,9 @@ #define MAINBOARD_EC_S3_WAKE_EVENTS \ (MAINBOARD_EC_S5_WAKE_EVENTS |\ EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEY_PRESSED) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE)) + EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED)) /* Log EC wake events plus EC shutdown events */ #define MAINBOARD_EC_LOG_EVENTS \ -- To view, visit https://review.coreboot.org/c/coreboot/+/67389 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I10480f8224b909fefe42d46d7c03fc9d3fe5abfe Gerrit-Change-Number: 67389 Gerrit-PatchSet: 1 Gerrit-Owner: Daisuke Nojiri <dnojiri(a)chromium.org> Gerrit-MessageType: newchange

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[L] Change in coreboot[master]: qualcomm/sc7280: remove unnecessary malloc and early return on failure
by Shelley Chen (Code Review) 07 Sep '22

07 Sep '22

Attention is currently required from: Venkat Thogaru, Julius Werner. Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/66975 ) Change subject: qualcomm/sc7280: remove unnecessary malloc and early return on failure ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/66975 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I51f7a86d143128d2c426fb8940ff34a66152b426 Gerrit-Change-Number: 66975 Gerrit-PatchSet: 4 Gerrit-Owner: Venkat Thogaru <thogaru(a)qualcomm.corp-partner.google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Vinod Polimera <vpolimer(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Venkat Thogaru <thogaru(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Wed, 07 Sep 2022 00:35:30 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: guybrush: remove RO_GSCVD area from FMAP
by Julius Werner (Code Review) 07 Sep '22

07 Sep '22

Attention is currently required from: Jason Nien, Harsha B R, Himanshu Sahdev, Martin Roth. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67376 ) Change subject: guybrush: remove RO_GSCVD area from FMAP ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > adding julius werner, can you please quote the reason for not using gscvd on CR50 devices by default […] GSC verification is a feature that will first roll out with Ti50. There is a Cr50 implementation but I believe(?) we ended up deciding not to use that. I think it was added to guybrush here before that decision was made, so taking it back out now seems reasonable. -- To view, visit https://review.coreboot.org/c/coreboot/+/67376 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I896b871bf2ac64e334514b979add9b8ac2c43945 Gerrit-Change-Number: 67376 Gerrit-PatchSet: 2 Gerrit-Owner: Himanshu Sahdev <himanshu.sahdev(a)intel.com> Gerrit-Reviewer: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Vadim Bendebury <vbendeb(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Attention: Himanshu Sahdev <himanshu.sahdev(a)intel.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Comment-Date: Wed, 07 Sep 2022 00:22:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Himanshu Sahdev <himanshu.sahdev(a)intel.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/rex: Add WWAN ACPI support
by Eric Lai (Code Review) 07 Sep '22

07 Sep '22

Attention is currently required from: Tarun Tuli, Subrata Banik, Tim Wawrzynczak, Kapil Porwal, Ivy Jian. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67336 ) Change subject: mb/google/rex: Add WWAN ACPI support ...................................................................... Patch Set 2: Code-Review+2 (1 comment) File src/mainboard/google/rex/variants/rex0/overridetree.cb: https://review.coreboot.org/c/coreboot/+/67336/comment/c1498fb2_246361f3 PS2, Line 232: # register "reset_delay_ms" = "1000" > is this needed? IIRC, we need 10s wait for FW ready again like power on. -- To view, visit https://review.coreboot.org/c/coreboot/+/67336 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6114c589769d2eca882cf1a5255cf4c5937121a6 Gerrit-Change-Number: 67336 Gerrit-PatchSet: 2 Gerrit-Owner: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Wed, 07 Sep 2022 00:03:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/rex: Set up MIPI cameras via ACPI
by Daniel Kang (Code Review) 07 Sep '22

07 Sep '22

Attention is currently required from: Tian Shu Qiu, Tarun Tuli, Bingbu Cao, Dalibor Segan, Wonkyu Kim, Subrata Banik, Paul Menzel, Rizwan Qureshi, Kapil Porwal. Daniel Kang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67085 ) Change subject: mb/google/rex: Set up MIPI cameras via ACPI ...................................................................... Patch Set 15: (1 comment) File src/mainboard/google/rex/variants/rex0/overridetree.cb: https://review.coreboot.org/c/coreboot/+/67085/comment/26799110_ad4c86a9 PS15, Line 314: Controls > clock control seems to be missed for UCAM. […] UCAM uses its own clock while WCAM gets the clock from host. -- To view, visit https://review.coreboot.org/c/coreboot/+/67085 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaaa16e491a66500606b3a9eb1d87f396641778e0 Gerrit-Change-Number: 67085 Gerrit-PatchSet: 15 Gerrit-Owner: Daniel Kang <daniel.h.kang(a)intel.com> Gerrit-Reviewer: Bingbu Cao <bingbu.cao(a)intel.com> Gerrit-Reviewer: Dalibor Segan <dalibor.segan(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tian Shu Qiu <tian.shu.qiu(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tian Shu Qiu <tian.shu.qiu(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Bingbu Cao <bingbu.cao(a)intel.com> Gerrit-Attention: Dalibor Segan <dalibor.segan(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Tue, 06 Sep 2022 23:09:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/rex: Set up MIPI cameras via ACPI
by Wonkyu Kim (Code Review) 07 Sep '22

07 Sep '22

Attention is currently required from: Tian Shu Qiu, Tarun Tuli, Daniel Kang, Bingbu Cao, Dalibor Segan, Subrata Banik, Paul Menzel, Rizwan Qureshi, Kapil Porwal. Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67085 ) Change subject: mb/google/rex: Set up MIPI cameras via ACPI ...................................................................... Patch Set 15: (1 comment) File src/mainboard/google/rex/variants/rex0/overridetree.cb: https://review.coreboot.org/c/coreboot/+/67085/comment/90da8c74_51c46221 PS15, Line 314: Controls clock control seems to be missed for UCAM. Don't we need to control clock control like WCAM? -- To view, visit https://review.coreboot.org/c/coreboot/+/67085 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaaa16e491a66500606b3a9eb1d87f396641778e0 Gerrit-Change-Number: 67085 Gerrit-PatchSet: 15 Gerrit-Owner: Daniel Kang <daniel.h.kang(a)intel.com> Gerrit-Reviewer: Bingbu Cao <bingbu.cao(a)intel.com> Gerrit-Reviewer: Dalibor Segan <dalibor.segan(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tian Shu Qiu <tian.shu.qiu(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tian Shu Qiu <tian.shu.qiu(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Daniel Kang <daniel.h.kang(a)intel.com> Gerrit-Attention: Bingbu Cao <bingbu.cao(a)intel.com> Gerrit-Attention: Dalibor Segan <dalibor.segan(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Tue, 06 Sep 2022 22:54:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: Documentation: Add wake source info to device tree documentation
by Dmitry Torokhov (Code Review) 07 Sep '22

07 Sep '22

Attention is currently required from: Raul Rangel, Tim Wawrzynczak, Tim Van Patten. Dmitry Torokhov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67385 ) Change subject: Documentation: Add wake source info to device tree documentation ...................................................................... Patch Set 2: (1 comment) File Documentation/getting_started/devicetree.md: https://review.coreboot.org/c/coreboot/+/67385/comment/a6fe5a77_834eac21 PS2, Line 263: The linux kernel has great support for this method. > Isn't the issue that the kernel doesn't warn the user/developer that they have both wake sources ena […] I'd argue warning users about messed up firmware is not Linux kernel's task. Quite often users of the message can't do anything about it, and the device might not be running Linux at all... Can this be added to pre-upload/pre-commit checks? -- To view, visit https://review.coreboot.org/c/coreboot/+/67385 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifcdbd5371408784bf9b81c1ade90263de8c60e0f Gerrit-Change-Number: 67385 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Dmitry Torokhov <dtor(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jon Murphy <jpmurphy(a)google.com> Gerrit-CC: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-CC: Mark Hasemeyer <markhas(a)google.com> Gerrit-CC: Robert Zieba <robertzieba(a)google.com> Gerrit-CC: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Comment-Date: Tue, 06 Sep 2022 22:49:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Van Patten <timvp(a)google.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: Documentation: Add wake source info to device tree documentation
by Tim Van Patten (Code Review) 07 Sep '22

07 Sep '22

Attention is currently required from: Raul Rangel, Tim Wawrzynczak. Tim Van Patten has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67385 ) Change subject: Documentation: Add wake source info to device tree documentation ...................................................................... Patch Set 2: (2 comments) File Documentation/getting_started/devicetree.md: https://review.coreboot.org/c/coreboot/+/67385/comment/904cf581_9eeeba2b PS2, Line 96: When this entry is processed during ramstage, it will create a device in the : ACPI SSDT table (all devices in devicetrees end up in the SSDT table). Can ramstage be updated to detect when multiple wake sources are registered and generate an error/warning message? Or should (can?) `ACPI_IRQ_WAKE_LEVEL_LOW()` be removed? https://review.coreboot.org/c/coreboot/+/67385/comment/61d5509a_1fe6bbf0 PS2, Line 263: The linux kernel has great support for this method. Isn't the issue that the kernel doesn't warn the user/developer that they have both wake sources enabled? Windows may be going overboard by BSODing with that configuration, but silently allowing a config that is not advised and leads to subtle bugs isn't great either. In a perfect world, a warning message is output indicating that the same device is registering multiple wake sources, which may lead to undefined behavior. -- To view, visit https://review.coreboot.org/c/coreboot/+/67385 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifcdbd5371408784bf9b81c1ade90263de8c60e0f Gerrit-Change-Number: 67385 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Dmitry Torokhov <dtor(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jon Murphy <jpmurphy(a)google.com> Gerrit-CC: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-CC: Mark Hasemeyer <markhas(a)google.com> Gerrit-CC: Robert Zieba <robertzieba(a)google.com> Gerrit-CC: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Tue, 06 Sep 2022 22:36:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/skyrim/var/winterhold: Update devicetree setting
by Martin Roth (Code Review) 07 Sep '22

07 Sep '22

Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/67308 ) Change subject: mb/google/skyrim/var/winterhold: Update devicetree setting ...................................................................... mb/google/skyrim/var/winterhold: Update devicetree setting Initialize winterhold devicetree. BUG=b:241196632 TEST=emerge-skyrim coreboot Signed-off-by: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Change-Id: I9fe224cdc2acb1f13d3bf9341b487892c15f8ea2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67308 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Martin Roth <martin.roth(a)amd.corp-partner.google.com> --- M src/mainboard/google/skyrim/variants/winterhold/overridetree.cb 1 file changed, 192 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Martin Roth: Looks good to me, approved diff --git a/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb b/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb index 7a56f93..1e46f2b 100644 --- a/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb +++ b/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb @@ -1,5 +1,178 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip soc/amd/mendocino - device domain 0 on end + device domain 0 on + device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A + device ref xhci_1 on # XHCI1 controller + chip drivers/usb/acpi + device ref xhci_1_root_hub on # XHCI1 root hub + chip drivers/usb/acpi + device ref usb3_port3 on # USB 3.1 port3 + chip drivers/usb/hub + register "desc" = ""USB Hub"" + register "name" = ""VL822"" + register "port_count" = "4" + device usb 0.0 on # VL822 USB3 hub + chip drivers/usb/acpi + register "desc" = ""USB3 Type-A Port A0 (DB)"" + register "type" = "UPC_TYPE_USB3_A" + register "use_custom_pld" = "true" + register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(2, 2))" + device usb 3.0 on end + end + chip drivers/usb/acpi + register "desc" = ""WWAN"" + register "type" = "UPC_TYPE_INTERNAL" + register "group" = "ACPI_PLD_GROUP(2, 2)" + register "has_power_resource" = "1" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_42)" + register "reset_off_delay_ms" = "20" + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_8)" + register "enable_delay_ms" = "20" + device usb 3.1 on end + end + end # VL822 USB3 hub + end + end # USB 3.1 port3 + end + chip drivers/usb/acpi + device ref usb2_port3 on # USB 2 port3 + chip drivers/usb/hub + register "desc" = ""USB Hub"" + register "name" = ""VL822"" + register "port_count" = "4" + device usb 0.0 on # VL822 USB2 hub + chip drivers/usb/acpi + register "desc" = ""USB2 Type-A Port A0 (DB)"" + register "type" = "UPC_TYPE_USB3_A" + register "use_custom_pld" = "true" + register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(2, 2))" + device usb 2.0 on end + end + chip drivers/usb/acpi + register "desc" = ""WWAN"" + register "type" = "UPC_TYPE_INTERNAL" + register "group" = "ACPI_PLD_GROUP(2, 2)" + device usb 2.1 on end + end + end # VL822 USB2 hub + end + end # USB 2 port3 + end + end # XHCI1 root hub + end + end # XHCI1 controller + end # Internal GPP Bridge 0 to Bus A + end # domain + + device ref i2c_0 on + chip drivers/i2c/generic + register "hid" = ""ELAN0000"" + register "desc" = ""ELAN Touchpad"" + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_40)" + register "wake" = "GEVENT_20" + register "probed" = "1" + device i2c 15 on end + end + chip drivers/i2c/hid + register "generic.hid" = ""GXTP7863"" + register "generic.desc" = ""Goodix Touchpad"" + register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_40)" + register "generic.wake" = "GEVENT_20" + register "generic.probed" = "1" + register "hid_desc_reg_offset" = "0x20" + device i2c 2c on end + end + end # I2C0 + device ref i2c_1 on + chip drivers/i2c/hid + register "generic.hid" = ""GDIX0000"" + register "generic.desc" = ""Goodix Touchscreen"" + register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_29)" + register "generic.probed" = "1" + register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_131)" + register "generic.enable_delay_ms" = "10" + register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_136)" + register "generic.reset_off_delay_ms" = "1" + register "generic.reset_delay_ms" = "10" + register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_76)" + register "generic.stop_delay_ms" = "180" + register "generic.stop_off_delay_ms" = "1" + register "generic.has_power_resource" = "1" + register "hid_desc_reg_offset" = "0x01" + device i2c 5d on end + end + chip drivers/i2c/generic + register "hid" = ""ELAN0001"" + register "desc" = ""ELAN Touchscreen"" + register "probed" = "1" + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_29)" + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_131)" + register "enable_delay_ms" = "1" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_136)" + register "reset_delay_ms" = "20" + register "reset_off_delay_ms" = "2" + register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_76)" + register "stop_off_delay_ms" = "2" + register "has_power_resource" = "1" + register "disable_gpio_export_in_crs" = "1" + device i2c 10 on end + end + chip drivers/generic/gpio_keys + register "name" = ""PENH"" + register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPIO_3)" + register "key.dev_name" = ""EJCT"" + register "key.wakeup_event_action" = "EV_ACT_DEASSERTED" + register "key.linux_code" = "SW_PEN_INSERTED" + register "key.linux_input_type" = "EV_SW" + register "key.label" = ""pen_eject"" + register "key.debounce_interval" = "100" + register "key.wakeup_route" = "WAKEUP_ROUTE_GPIO_IRQ" + device generic 0 on end + end + end # I2C1 + device ref i2c_2 on + chip drivers/i2c/generic + register "hid" = ""RTL5682"" + register "name" = ""RT58"" + register "desc" = ""Realtek RT5682"" + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPIO_90)" + register "property_count" = "1" + register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" + register "property_list[0].name" = ""realtek,jd-src"" + register "property_list[0].integer" = "1" + device i2c 1a on end + end + chip drivers/i2c/generic + register "hid" = ""10EC1019"" + register "desc" = ""Realtek SPK AMP R"" + register "uid" = "1" + device i2c 29 on end + end + chip drivers/i2c/generic + register "hid" = ""10EC1019"" + register "desc" = ""Realtek SPK AMP L"" + register "uid" = "2" + register "probed" = "1" + device i2c 2a on end + end + end # I2C2 + + device ref uart_1 on + chip drivers/uart/acpi + register "name" = ""CRFP"" + register "desc" = ""Fingerprint Reader"" + register "hid" = "ACPI_DT_NAMESPACE_HID" + register "compat_string" = ""google,cros-ec-uart"" + register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_24)" + register "wake" = "GEVENT_15" + register "uart" = "ACPI_UART_RAW_DEVICE(3000000, 64)" + register "has_power_resource" = "1" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_12)" + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_4)" + register "enable_delay_ms" = "3" + device generic 0 alias fpmcu on end + end + end # UART1 + end # chip soc/amd/mendocino -- To view, visit https://review.coreboot.org/c/coreboot/+/67308 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9fe224cdc2acb1f13d3bf9341b487892c15f8ea2 Gerrit-Change-Number: 67308 Gerrit-PatchSet: 3 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Isaac Lee <isaaclee(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Moises Garcia <moisesgarcia(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: mb/google/skyrim/var/winterhold: Update devicetree setting
by Martin Roth (Code Review) 07 Sep '22

07 Sep '22

Attention is currently required from: Raul Rangel, Jason Nien, EricKY Cheng, Isaac Lee, Jon Murphy, Moises Garcia, Eric Peers, Karthikeyan Ramasubramanian. Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67308 ) Change subject: mb/google/skyrim/var/winterhold: Update devicetree setting ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/67308 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9fe224cdc2acb1f13d3bf9341b487892c15f8ea2 Gerrit-Change-Number: 67308 Gerrit-PatchSet: 2 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Isaac Lee <isaaclee(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Moises Garcia <moisesgarcia(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Attention: Isaac Lee <isaaclee(a)google.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Moises Garcia <moisesgarcia(a)google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Comment-Date: Tue, 06 Sep 2022 22:09:23 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit September 2022