coreboot-gerrit June 2022

coreboot-gerrit@coreboot.org

1 participants
1234 discussions

Change in coreboot[master]: soc/intel/adl: Add missing claimed memory regions
by Eran Mitrani (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: Tarun Tuli, Subrata Banik, Tim Wawrzynczak, Angel Pons, Nick Vaccaro. Eran Mitrani has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64677 ) Change subject: soc/intel/adl: Add missing claimed memory regions ...................................................................... Patch Set 13: (22 comments) File src/soc/intel/alderlake/include/soc/systemagent.h: https://review.coreboot.org/c/coreboot/+/64677/comment/0264cd69_0f35bf68 PS9, Line 16: #define EPBAR 0x40 : #define DMIBAR 0x68 : #define CAPID0_A 0xe4 : #define VTD_DISABLE (1 << 23) : : /* MCHBAR offsets */ : #define GFXVTBAR 0x5400 : #define EDRAMBAR 0x5408 : #define VTVC0BAR 0x5410 : #define REGBAR 0x5420 : #define MCH_DDR_POWER_LIMIT_LO 0x58e0 : #define MCH_DDR_POWER_LIMIT_HI 0x58e4 : #define MCH_PKG_POWER_LIMIT_LO 0x59a0 : #define MCH_PKG_POWER_LIMIT_HI 0x59a4 : #define BIOS_RESET_CPL 0x5da8 : #define IMRBASE 0x6a40 : #define IMRLIMIT 0x6a48 : #define IPUVTBAR 0x7880 : #define TBTxBAR(x) (0x7888 + (x) * 8) : : #define MAX_TBT_PCIE_PORT 4 : : #define VTBAR_ENABLED 0x01 : #define VTBAR_MASK 0x7ffffff000ull : : static const struct sa_mmio_descriptor soc_vtd_resources[] = { : { GFXVTBAR, GFXVT_BASE_ADDRESS, GFXVT_BASE_SIZE, "GFXVTBAR" }, : { IPUVTBAR, IPUVT_BASE_ADDRESS, IPUVT_BASE_SIZE, "IPUVTBAR" }, : { TBTxBAR(0), TBT0_BASE_ADDRESS, TBT0_BASE_SIZE, "TBT0BAR" }, : { TBTxBAR(1), TBT1_BASE_ADDRESS, TBT1_BASE_SIZE, "TBT1BAR" }, : { TBTxBAR(2), TBT2_BASE_ADDRESS, TBT2_BASE_SIZE, "TBT2BAR" }, : { TBTxBAR(3), TBT3_BASE_ADDRESS, TBT3_BASE_SIZE, "TBT3BAR" }, : { VTVC0BAR, VTVC0_BASE_ADDRESS, VTVC0_BASE_SIZE, "VTVC0BAR" }, : }; : : #define V_P2SB_CFG_IBDF_BUS 0 : #define V_P2SB_CFG_IBDF_DEV 30 : #define V_P2SB_CFG_IBDF_FUNC 7 : #define V_P2SB_CFG_HBDF_BUS 0 : #define V_P2SB_CFG_HBDF_DEV 30 : #define V_P2SB_CFG_HBDF_FUNC 6 > we use tabs for indentation in coreboot, please leave these as tabs Done https://review.coreboot.org/c/coreboot/+/64677/comment/4fd6ab71_4d8596af PS9, Line 59: 0x01000000 // 16MB > `16 * MiB` Done https://review.coreboot.org/c/coreboot/+/64677/comment/3d22f32d_d31f5c9c PS9, Line 61: 0x80000 // 512KB > `512 * KiB` Done https://review.coreboot.org/c/coreboot/+/64677/comment/514a6305_581b85c0 PS9, Line 63: 0x10000 //64KB > `64 * KiB` Done https://review.coreboot.org/c/coreboot/+/64677/comment/d5b1ceed_f9149bd0 PS9, Line 66: 0x20000 // 128KB > `128 * KiB` Done https://review.coreboot.org/c/coreboot/+/64677/comment/301fc594_9d5236dd PS9, Line 67: #define APIC_BASE_ADDRESS 0xFEC00000 > see `IO_APIC_ADDR` in src/arch/x86/include/arch/ioapic. […] Done https://review.coreboot.org/c/coreboot/+/64677/comment/cb9754dd_d52dec2a PS9, Line 68: 0x00100000 > etc. Done https://review.coreboot.org/c/coreboot/+/64677/comment/2f5070c8_9122a769 PS9, Line 70: 0x00100000 > etc. Done https://review.coreboot.org/c/coreboot/+/64677/comment/6887d5dd_b1d630a8 PS9, Line 72: 0x00100000 > etc. Done https://review.coreboot.org/c/coreboot/+/64677/comment/e9863a8b_7b4f9722 PS9, Line 76: : #define GGC_REG 0x50 > Already defined as `GGC` in src/soc/intel/common/block/systemagent/systemagent_def. […] Done https://review.coreboot.org/c/coreboot/+/64677/comment/5d58fb96_4ef5d2c0 PS9, Line 58: #define MMSPI_FLASH_BASE_ADDRESS 0xFF000000 : #define MMSPI_FLASH_SIZE 0x01000000 // 16MB : #define CRAB_ABORT_BASE_ADDRESS 0xEFB00000 : #define CRAB_ABORT_SIZE 0x80000 // 512KB : #define TPM_BASE_ADDRESS 0xFED40000 : #define TPM_SIZE 0x10000 //64KB : : #define LT_SECURITY_BASE_ADDRESS 0xFED50000 : #define LT_SECURITY_SIZE 0x20000 // 128KB : #define APIC_BASE_ADDRESS 0xFEC00000 : #define APIC_SIZE 0x00100000 // 1MB : #define LEGACY_MEM_BASE_ADDRESS 0x00000000 : #define LEGACY_MEM_SIZE 0x00100000 // 1MB : #define MSI_INTERRUPTS_BASE_ADDRESS 0xFEE00000 : #define MSI_INTERRUPTS_SIZE 0x00100000 // 1MB : : #define MASK_PCIEXBAR_LENGTH 0x0000000E // bits [3:1] : #define PCIEXBAR_LENGTH_LSB 1 // used to shift right : : #define GGC_REG 0x50 : #define DSM_BASE_ADDR_REG 0xB0 : #define MASK_DSM_LENGTH 0xFF00 // [15:8] : #define MASK_DSM_LENGTH_LSB 8 // used to shift right : #define MASK_GSM_LENGTH 0xC0 // [7:6] : #define MASK_GSM_LENGTH_LSB 6 // used to shift right : #define DPR_REG 0x5C : #define MASK_DPR_LENGTH 0xFF0 // [11:4] : #define MASK_DPR_LENGTH_LSB 4 // used to shift right > tabs for indentation please Done File src/soc/intel/alderlake/systemagent.c: https://review.coreboot.org/c/coreboot/+/64677/comment/45a7d168_d123131e PS9, Line 39: // first field (sa_mmio_descriptor.index) is not used, setting to 0: > nit: this file is already using `/* */` style comments, would be good to keep consistency Done https://review.coreboot.org/c/coreboot/+/64677/comment/49e580a0_1cb9d9d3 PS9, Line 197: 0x100000000 > `4 * GiB` Done https://review.coreboot.org/c/coreboot/+/64677/comment/efa5b544_a67465b3 PS9, Line 200: 0x80000000 > `2 * GiB` Done https://review.coreboot.org/c/coreboot/+/64677/comment/edad405f_340a7820 PS9, Line 203: 0x40000000 > etc. Done https://review.coreboot.org/c/coreboot/+/64677/comment/bc2df6d7_b3a85234 PS9, Line 234: 0x2000000 > `32 * MiB` Done https://review.coreboot.org/c/coreboot/+/64677/comment/75cab8df_2a5947f1 PS9, Line 236: 0x400000 > `4 * MiB` Done https://review.coreboot.org/c/coreboot/+/64677/comment/409dd66e_6ca68668 PS9, Line 240: 0x40000000 > `1 * GiB` Done https://review.coreboot.org/c/coreboot/+/64677/comment/143e88ae_981a36dc PS9, Line 243: 0x60000000 > `1536 * MiB` Done https://review.coreboot.org/c/coreboot/+/64677/comment/fa03bfac_03541b88 PS9, Line 278: return size; > although the masks may prevent it now, it may be safest to ensure size is always initialized incase […] Done https://review.coreboot.org/c/coreboot/+/64677/comment/399225c7_726c40be PS9, Line 294: resource->base = base; > check/handle for resource being null Done File src/soc/intel/common/block/systemagent/systemagent_def.h: https://review.coreboot.org/c/coreboot/+/64677/comment/a672a5f8_fda7d86a PS9, Line 25: #define PCIEXBAR_LENGTH_4096MB 6 : #define PCIEXBAR_LENGTH_2048MB 5 : #define PCIEXBAR_LENGTH_1024MB 4 : #define PCIEXBAR_LENGTH_512MB 3 > use tabs to indent/align the right side Done -- To view, visit https://review.coreboot.org/c/coreboot/+/64677 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I80df95f9146934d6a2d23e525c22be3a9a7e2b9f Gerrit-Change-Number: 64677 Gerrit-PatchSet: 13 Gerrit-Owner: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Wed, 01 Jun 2022 22:33:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tarun Tuli <taruntuli(a)google.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/adl: Add missing claimed memory regions
by build bot (Jenkins) (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: Subrata Banik, Angel Pons, Nick Vaccaro. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64677 ) Change subject: soc/intel/adl: Add missing claimed memory regions ...................................................................... Patch Set 13: (1 comment) File src/soc/intel/alderlake/systemagent.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150425): https://review.coreboot.org/c/coreboot/+/64677/comment/51141e81_832eb048 PS13, Line 298: printk(BIOS_ERR, "%s: argument resource is NULL for %s\n", __func__, description); line length of 98 exceeds 96 columns -- To view, visit https://review.coreboot.org/c/coreboot/+/64677 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I80df95f9146934d6a2d23e525c22be3a9a7e2b9f Gerrit-Change-Number: 64677 Gerrit-PatchSet: 13 Gerrit-Owner: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Wed, 01 Jun 2022 22:30:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/adl: Add missing claimed memory regions
by Eran Mitrani (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: Subrata Banik, Angel Pons, Nick Vaccaro. Hello build bot (Jenkins), Subrata Banik, Tim Wawrzynczak, Angel Pons, Nick Vaccaro, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/64677 to look at the new patch set (#13). Change subject: soc/intel/adl: Add missing claimed memory regions ...................................................................... soc/intel/adl: Add missing claimed memory regions This CL adds the missing regions from this list in the bug mentioned below The Alder Lake chipset has several more reserved memory regions that are unavailable to the resource allocator than are currently marked as such in the system agent code. This CL adds the following regions: MMSPI CRAB_ABORT TPM LT_SECURITY APIC MMCONF DSM TSEG PMRR GSM DPR BUG=b:149830546 Change-Id: I80df95f9146934d6a2d23e525c22be3a9a7e2b9f Signed-off-by: Eran Mitrani <mitrani(a)google.com> --- M src/soc/intel/alderlake/Makefile.inc M src/soc/intel/alderlake/include/soc/systemagent.h M src/soc/intel/alderlake/systemagent.c M src/soc/intel/common/block/include/intelblocks/systemagent.h M src/soc/intel/common/block/systemagent/systemagent.c M src/soc/intel/common/block/systemagent/systemagent_def.h 6 files changed, 260 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/64677/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/64677 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I80df95f9146934d6a2d23e525c22be3a9a7e2b9f Gerrit-Change-Number: 64677 Gerrit-PatchSet: 13 Gerrit-Owner: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: soc/intel/adl: Add missing claimed memory regions
by build bot (Jenkins) (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: Subrata Banik, Angel Pons, Nick Vaccaro. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64677 ) Change subject: soc/intel/adl: Add missing claimed memory regions ...................................................................... Patch Set 12: (1 comment) File src/soc/intel/alderlake/systemagent.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150424): https://review.coreboot.org/c/coreboot/+/64677/comment/2996e01b_9410a001 PS12, Line 298: printk(BIOS_ERR, "%s: argument resource is NULL for %s\n", __func__, description); line length of 98 exceeds 96 columns -- To view, visit https://review.coreboot.org/c/coreboot/+/64677 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I80df95f9146934d6a2d23e525c22be3a9a7e2b9f Gerrit-Change-Number: 64677 Gerrit-PatchSet: 12 Gerrit-Owner: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Wed, 01 Jun 2022 22:28:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/adl: Add missing claimed memory regions
by Eran Mitrani (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: Subrata Banik, Angel Pons, Nick Vaccaro. Hello build bot (Jenkins), Subrata Banik, Tim Wawrzynczak, Angel Pons, Nick Vaccaro, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/64677 to look at the new patch set (#12). Change subject: soc/intel/adl: Add missing claimed memory regions ...................................................................... soc/intel/adl: Add missing claimed memory regions This CL adds the missing regions from this list in the bug mentioned below The Alder Lake chipset has several more reserved memory regions that are unavailable to the resource allocator than are currently marked as such in the system agent code. This CL adds the following regions: MMSPI CRAB_ABORT TPM LT_SECURITY APIC MMCONF DSM TSEG PMRR GSM DPR BUG=b:149830546 Change-Id: I80df95f9146934d6a2d23e525c22be3a9a7e2b9f Signed-off-by: Eran Mitrani <mitrani(a)google.com> --- M src/soc/intel/alderlake/Makefile.inc M src/soc/intel/alderlake/include/soc/systemagent.h M src/soc/intel/alderlake/systemagent.c M src/soc/intel/common/block/include/intelblocks/systemagent.h M src/soc/intel/common/block/systemagent/systemagent.c M src/soc/intel/common/block/systemagent/systemagent_def.h 6 files changed, 263 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/64677/12 -- To view, visit https://review.coreboot.org/c/coreboot/+/64677 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I80df95f9146934d6a2d23e525c22be3a9a7e2b9f Gerrit-Change-Number: 64677 Gerrit-PatchSet: 12 Gerrit-Owner: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: soc/intel/adl: Add missing claimed memory regions
by build bot (Jenkins) (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: Subrata Banik, Angel Pons, Nick Vaccaro. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64677 ) Change subject: soc/intel/adl: Add missing claimed memory regions ...................................................................... Patch Set 11: (1 comment) File src/soc/intel/alderlake/systemagent.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150423): https://review.coreboot.org/c/coreboot/+/64677/comment/d18d2e0e_5afb6061 PS11, Line 298: printk(BIOS_ERR, "%s: argument resource is NULL for %s\n", __func__, description); line length of 98 exceeds 96 columns -- To view, visit https://review.coreboot.org/c/coreboot/+/64677 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I80df95f9146934d6a2d23e525c22be3a9a7e2b9f Gerrit-Change-Number: 64677 Gerrit-PatchSet: 11 Gerrit-Owner: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Wed, 01 Jun 2022 22:22:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/adl: Add missing claimed memory regions
by Eran Mitrani (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: Subrata Banik, Angel Pons, Nick Vaccaro. Hello build bot (Jenkins), Subrata Banik, Tim Wawrzynczak, Angel Pons, Nick Vaccaro, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/64677 to look at the new patch set (#11). Change subject: soc/intel/adl: Add missing claimed memory regions ...................................................................... soc/intel/adl: Add missing claimed memory regions This CL adds the missing regions from this list in the bug mentioned below The Alder Lake chipset has several more reserved memory regions that are unavailable to the resource allocator than are currently marked as such in the system agent code. This CL adds the following regions: MMSPI CRAB_ABORT TPM LT_SECURITY APIC MMCONF DSM TSEG PMRR GSM DPR BUG=b:149830546 Change-Id: I80df95f9146934d6a2d23e525c22be3a9a7e2b9f Signed-off-by: Eran Mitrani <mitrani(a)google.com> --- M src/soc/intel/alderlake/Makefile.inc M src/soc/intel/alderlake/include/soc/systemagent.h M src/soc/intel/alderlake/systemagent.c M src/soc/intel/common/block/include/intelblocks/systemagent.h M src/soc/intel/common/block/systemagent/systemagent.c M src/soc/intel/common/block/systemagent/systemagent_def.h 6 files changed, 278 insertions(+), 23 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/64677/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/64677 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I80df95f9146934d6a2d23e525c22be3a9a7e2b9f Gerrit-Change-Number: 64677 Gerrit-PatchSet: 11 Gerrit-Owner: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: Documentation: Update coreboot 4.17 release notes
by Felix Singer (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: Martin L Roth, Werner Zeh, Nicholas Chin. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64846 ) Change subject: Documentation: Update coreboot 4.17 release notes ...................................................................... Patch Set 3: Code-Review+2 (5 comments) File Documentation/releases/coreboot-4.17-relnotes.md: https://review.coreboot.org/c/coreboot/+/64846/comment/19d52ea9_f3306b47 PS3, Line 11: successful Add a dot. https://review.coreboot.org/c/coreboot/+/64846/comment/c959f076_17306e12 PS3, Line 122: nit: Add second empty line https://review.coreboot.org/c/coreboot/+/64846/comment/c252712d_8b6749ea PS3, Line 141: (because it is part of another firmware section (IFWI or a different : CBFS), the CRTM measurement fails. > A closing bracket is missing here. I would replace the outer brackets with commas. https://review.coreboot.org/c/coreboot/+/64846/comment/068ddc75_cc65b59b PS3, Line 246: nit: Add second empty line https://review.coreboot.org/c/coreboot/+/64846/comment/2b5af0af_36c8b38c PS3, Line 285: linux nit: Uppercase L -- To view, visit https://review.coreboot.org/c/coreboot/+/64846 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id9491ad9aa6ab3eb5504bee85591f3b1d9bf6cc2 Gerrit-Change-Number: 64846 Gerrit-PatchSet: 3 Gerrit-Owner: Martin L Roth <gaumless(a)tutanota.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-CC: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Martin L Roth <gaumless(a)tutanota.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Wed, 01 Jun 2022 22:09:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: drivers/wifi: Move MTL Magnetar CNVi DIDs from SoC to generic driver
by Wonkyu Kim (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: Subrata Banik, Paul Menzel, Tim Wawrzynczak, Kapil Porwal, Eric Lai, Lean Sheng Tan. Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64592 ) Change subject: drivers/wifi: Move MTL Magnetar CNVi DIDs from SoC to generic driver ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/64592 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib98762749c71f63df3e8d03be910539469359c68 Gerrit-Change-Number: 64592 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Wed, 01 Jun 2022 22:09:10 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: Documentation/releases: Deprecate Intel Icelake SoC
by Felix Singer (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: Nico Huber, Martin L Roth, ron minnich, Paul Menzel, Angel Pons, Arthur Heymans, Michael Niewöhner, Patrick Rudolph. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63312 ) Change subject: Documentation/releases: Deprecate Intel Icelake SoC ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63312 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ife84c52f06ea7253a1e2032c3603987080cac077 Gerrit-Change-Number: 63312 Gerrit-PatchSet: 2 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)chromium.org> Gerrit-CC: Martin L Roth <gaumless(a)tutanota.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)tutanota.com> Gerrit-Attention: ron minnich <rminnich(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 01 Jun 2022 22:02:40 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit June 2022