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Change subject: soc/intel/alderlake: provide a list of D-states to enter LPM
......................................................................
Patch Set 17:
(1 comment)
File src/acpi/acpi.c:
https://review.coreboot.org/c/coreboot/+/63969/comment/c70ef074_6b058dbe
PS17, Line 1485: __weak uint8_t soc_lpi_get_constraints(void) { return 0; }
> I'm fine with this approach, but a Kconfig would also work.
@Tim from your end, do you have any strong preference one way or the other?
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Change subject: soc/intel/alderlake: provide a list of D-states to enter LPM
......................................................................
Patch Set 17:
(1 comment)
File src/acpi/acpi.c:
https://review.coreboot.org/c/coreboot/+/63969/comment/d01fd6a9_6e776cb2
PS14, Line 1485: __weak uint8_t soc_lpi_get_constraints(void) { return 0; }
nit: move after line 1483?
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Change subject: apple/macbook21: configure the clockgen and add C3 CPU state
......................................................................
Patch Set 9:
(1 comment)
Patchset:
PS9:
With those recommandations you all gave to me, I think
it's time for me to test the patch again and see if
it still works, just so the patch doesn't break current
macbook2,1 support. I'll mark that comment as solved
once I know that the patch still works.
If it doesn't work, I'll put another comment telling
that and will do my best to fix bugs.
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Hello build bot (Jenkins), Henry Sun, Super Ni, Teddy Shih, Paul Menzel, Aseda Aboagye, Simon Yang, Ivan Chen, Karthik Ramasubramanian, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/63652
to look at the new patch set (#7).
Change subject: mb/google/dedede/var/beadrix: Add a Proximity Sensor SX9324 for SAR
......................................................................
mb/google/dedede/var/beadrix: Add a Proximity Sensor SX9324 for SAR
To meet LTE's RF Specific Absorption Rate (SAR) certification, we add a
Semtech Smart Proximity Sensor (P-Sensor) SX9324. P-Sensor connects
EC of I2C 5 bus and GPIO D22, D23, as well as, SoC of GPIO E11, refer
to mainboard schematic.
BUG=b:213549229
BRANCH=dedede
TEST=emerge-dedede coreboot
Signed-off-by: Teddy Shih <teddyshih(a)ami.corp-partner.google.com>
Change-Id: If172d13aa62503547227adf91f049ea50b948888
---
M src/mainboard/google/dedede/variants/beadrix/gpio.c
M src/mainboard/google/dedede/variants/beadrix/overridetree.cb
2 files changed, 75 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/63652/7
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Change subject: mb/google/dedede/var/beadrix: Add a Proximity Sensor SX9324 for SAR
......................................................................
Patch Set 6:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/63652/comment/e192d4e2_4ae42f6c
PS4, Line 9: To meet LTE's RF Specific Absorption Rate (SAR) certification,
: we add a Semtech Smart Proximity Sensor (P-Sensor) SX9324 for SAR.
: P-Sensor connects EC of I2C 5 bus and GPIO D22, D23, as well as,
: SoC of GPIO E11, according to mainboard schematic.
> Please reflow for 72 characters per line.
Hi Paul,
Thank you for your advice.
I have modified it.
File src/mainboard/google/dedede/variants/beadrix/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/63652/comment/eadb653c_3154db44
PS4, Line 30: .speed_config[0] = {
: .speed = I2C_SPEED_FAST,
: .scl_lcnt = 190,
: .scl_hcnt = 100,
: .sda_hold = 40,
: }
> Hi Karthik, […]
Done
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Change subject: arch/x86/smbios.c: Add SMBIOS type 17 for empty DIMM slots
......................................................................
Patch Set 8:
(1 comment)
Patchset:
PS8:
> But there's no need to create any meminfo entries with `dimm_present` set to `IGNORED_DIMM`. […]
I made CB:64035 and CB:64036 which should provide the needed functionality for xeon_sp/cpx. The only thing to do is define the `mainboard_dimm_slot_exists()` function in mainboard code so that it returns true for existing DIMM slots, based on socket/channel/dimm/slot number.
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