coreboot-gerrit May 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/alderlake: provide a list of D-states to enter LPM
by Tim Wawrzynczak (Code Review) 03 May '22

03 May '22

Attention is currently required from: Tarun Tuli, Angel Pons. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63969 ) Change subject: soc/intel/alderlake: provide a list of D-states to enter LPM ...................................................................... Patch Set 17: (1 comment) File src/acpi/acpi.c: https://review.coreboot.org/c/coreboot/+/63969/comment/5554087d_e9d3e132 PS17, Line 1485: __weak uint8_t soc_lpi_get_constraints(void) { return 0; } > Another option is the weak implementation does the single device/dummy entry creation and that gets replaced with the more extensive one on the platform if it exists? I like this one, moves the "default" logic to a now "default" place 👍 -- To view, visit https://review.coreboot.org/c/coreboot/+/63969 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe46a0583c522a8adf0a015cd3a698f694482437 Gerrit-Change-Number: 63969 Gerrit-PatchSet: 17 Gerrit-Owner: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Tue, 03 May 2022 19:13:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tarun Tuli <taruntuli(a)google.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Hook up FSP hyper-threading setting to option API
by Tim Wawrzynczak (Code Review) 03 May '22

03 May '22

Attention is currently required from: Felix Singer, Nico Huber, Subrata Banik, Michael Niewöhner. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60547 ) Change subject: soc/intel/alderlake: Hook up FSP hyper-threading setting to option API ...................................................................... Patch Set 11: (1 comment) Patchset: PS6: > > ... assume ... should ... should ... […] haha you're not wrong 😜 -- To view, visit https://review.coreboot.org/c/coreboot/+/60547 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I520a936b4c3a8997ba2c6bea0126b3bbcc5d68ce Gerrit-Change-Number: 60547 Gerrit-PatchSet: 11 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Comment-Date: Tue, 03 May 2022 19:12:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Hook up FSP hyper-threading setting to option API
by Nico Huber (Code Review) 03 May '22

03 May '22

Attention is currently required from: Felix Singer, Subrata Banik, Tim Wawrzynczak, Michael Niewöhner. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60547 ) Change subject: soc/intel/alderlake: Hook up FSP hyper-threading setting to option API ...................................................................... Patch Set 11: (1 comment) Patchset: PS6: > ... assume ... should ... should ... exactly :) -- To view, visit https://review.coreboot.org/c/coreboot/+/60547 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I520a936b4c3a8997ba2c6bea0126b3bbcc5d68ce Gerrit-Change-Number: 60547 Gerrit-PatchSet: 11 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Comment-Date: Tue, 03 May 2022 19:06:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: (only for test) crossgcc: Update to GCC 11.3
by Elyes Haouas (Code Review) 03 May '22

03 May '22

Attention is currently required from: Martin L Roth, Paul Menzel. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64021 ) Change subject: (only for test) crossgcc: Update to GCC 11.3 ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > Duplicate of https://review.coreboot. […] no, current patch builds :) This is only for test as I've used only gcc-11.3.0_asan_shadow_offset_callback.patch -- To view, visit https://review.coreboot.org/c/coreboot/+/64021 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I27a2a16c2aa1cda36d7e8cb4dc48057fc210d110 Gerrit-Change-Number: 64021 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin L Roth <martinroth(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 03 May 2022 18:49:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Hook up FSP hyper-threading setting to option API
by Tim Wawrzynczak (Code Review) 03 May '22

03 May '22

Attention is currently required from: Felix Singer, Subrata Banik, Michael Niewöhner. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60547 ) Change subject: soc/intel/alderlake: Hook up FSP hyper-threading setting to option API ...................................................................... Patch Set 11: (1 comment) Patchset: PS6: > I think Nico just would like to know if enabling / disabling of hyper-threading works. […] the procedure here is already handled by the FSP, where I assume it is setting something in the soft straps, then it should its return code should indicate that a reboot is required, which coreboot should be honoring. -- To view, visit https://review.coreboot.org/c/coreboot/+/60547 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I520a936b4c3a8997ba2c6bea0126b3bbcc5d68ce Gerrit-Change-Number: 60547 Gerrit-PatchSet: 11 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Comment-Date: Tue, 03 May 2022 18:47:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/crota: setting for codec reset pin
by Tim Wawrzynczak (Code Review) 03 May '22

03 May '22

Attention is currently required from: Terry Chen. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64027 ) Change subject: mb/google/brya/var/crota: setting for codec reset pin ...................................................................... Patch Set 2: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/64027/comment/f2051e73_6645cd09 PS2, Line 9: The audio codec of Crota360 used is Cirrus CS42L42, different from Brya (Realtek ALC5682I) : There is no Reset pin on ALC5682 but CS42L42 is needed. : So we use GPP_B15 for the reset pin of CS42L42 controlled that make the power sequence well. maximum line length for commit msg is 72 please suggestion: ``` Crota360 is using a Cirrus CS42L42 for its audio codec; it requires the reset pin to be deasserted in ramstage for proper power sequencing. ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/64027 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie942b3c553823510dfa6f6fb70a7b13881fc4c14 Gerrit-Change-Number: 64027 Gerrit-PatchSet: 2 Gerrit-Owner: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-Comment-Date: Tue, 03 May 2022 18:33:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: ec/google/chromeec: Add retimer handle to Type C conn
by Prashant Malani (Code Review) 03 May '22

03 May '22

Attention is currently required from: Lance Zhao. Prashant Malani has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63793 ) Change subject: ec/google/chromeec: Add retimer handle to Type C conn ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/63793/comment/3cdfa751_43e34fec PS3, Line 7: /ec_acpi > nit, just: […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/63793 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic0480b08c6d6a7562cca57192e49b8ea2a33b51e Gerrit-Change-Number: 63793 Gerrit-PatchSet: 4 Gerrit-Owner: Prashant Malani <pmalani(a)chromium.org> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao Gerrit-Comment-Date: Tue, 03 May 2022 17:44:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/variants/crota: Enable Bluetooth offload support
by Tim Wawrzynczak (Code Review) 03 May '22

03 May '22

Attention is currently required from: Terry Chen, Paul Menzel. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64019 ) Change subject: mb/google/brya/variants/crota: Enable Bluetooth offload support ...................................................................... Patch Set 5: (1 comment) File src/mainboard/google/brya/variants/crota/variant.c: PS5: This file is unnecessary, if this is on all SKUs, you can just set `register "cnvi_bt_audio_offload" = "1"` in `overridetree.cb` for crota -- To view, visit https://review.coreboot.org/c/coreboot/+/64019 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7ac54156cc4a8d824ed1c549d66fc369698a352c Gerrit-Change-Number: 64019 Gerrit-PatchSet: 5 Gerrit-Owner: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 03 May 2022 17:42:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: ec/google/chromeec: Add retimer handle to Type C conn
by Prashant Malani (Code Review) 03 May '22

03 May '22

Attention is currently required from: Lance Zhao, Prashant Malani. Hello Lance Zhao, build bot (Jenkins), Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63793 to look at the new patch set (#4). Change subject: ec/google/chromeec: Add retimer handle to Type C conn ...................................................................... ec/google/chromeec: Add retimer handle to Type C conn Some platforms have retimers which can be configured via the EC. Add a handle to these retimer devices to the Type C connector device, using devicetree references. BUG=b:208883648 TEST=Verify disassembled SSDT on brya. BRANCH=None Signed-off-by: Prashant Malani <pmalani(a)chromium.org> Change-Id: Ic0480b08c6d6a7562cca57192e49b8ea2a33b51e --- M src/acpi/acpigen_usb.c M src/ec/google/chromeec/chip.h M src/ec/google/chromeec/ec_acpi.c M src/include/acpi/acpigen_usb.h 4 files changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/63793/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/63793 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic0480b08c6d6a7562cca57192e49b8ea2a33b51e Gerrit-Change-Number: 63793 Gerrit-PatchSet: 4 Gerrit-Owner: Prashant Malani <pmalani(a)chromium.org> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Prashant Malani <pmalani(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/dedede/var/beadrix: Add a Proximity Sensor SX9324 for SAR
by Teddy Shih (Code Review) 03 May '22

03 May '22

Attention is currently required from: Henry Sun, Super Ni, Teddy Shih, Paul Menzel, Simon Yang, Aseda Aboagye, Ivan Chen, Karthik Ramasubramanian, Felix Held. Teddy Shih has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63652 ) Change subject: mb/google/dedede/var/beadrix: Add a Proximity Sensor SX9324 for SAR ...................................................................... Patch Set 8: Code-Review+1 (2 comments) Patchset: PS4: > Hi Teddy, […] Hi Simon, For I2C clock frequency, I will remove the value of parameter speed_config until ECS HW's comment to ensure it. I have checked the JSL I2C bus 0-5 according mainboard schematic [1]. As I2C bus 1 and 3 are unused, therefore I will set them to PchSerialIoDisabled. Reference: [1] https://drive.google.com/file/d/1ZO_Ba0UOBihc2teO0XPZnALM-xkhy9t2/view?usp=… [2] EVT schematic (V B 220207) https://drive.google.com/file/d/1Tb6sPUu9BQmiu77HEhp_q43iWLMpstEf/view?usp=… Patchset: PS8: Dear All, Thank you for all reviewers' comments. I have replied and modified CL regarding reviewers' comments. Please kindly review my CL. Best Regards, Teddy -- To view, visit https://review.coreboot.org/c/coreboot/+/63652 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If172d13aa62503547227adf91f049ea50b948888 Gerrit-Change-Number: 63652 Gerrit-PatchSet: 8 Gerrit-Owner: Teddy Shih <teddyshih(a)ami.corp-partner.google.com> Gerrit-Reviewer: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Ivan Chen <yulunchen(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Simon Yang <simon1.yang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Super Ni <super.ni(a)intel.corp-partner.google.com> Gerrit-Reviewer: Teddy Shih <teddyshih(a)ami.corp-partner.google.com> Gerrit-Reviewer: Teddy Shih <teddyshihau(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eddy Lu <eddylu(a)ami.corp-partner.google.com> Gerrit-CC: Jack Cheng <jack.cheng(a)ecs.corp-partner.google.com> Gerrit-CC: Raymond Chung <raymondchung(a)ami.corp-partner.google.com> Gerrit-CC: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Super Ni <super.ni(a)intel.corp-partner.google.com> Gerrit-Attention: Teddy Shih <teddyshihau(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.corp-partner.google.com> Gerrit-Attention: Ivan Chen <yulunchen(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 03 May 2022 17:23:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Simon Yang <simon1.yang(a)intel.com> Comment-In-Reply-To: Teddy Shih <teddyshih(a)ami.corp-partner.google.com> Gerrit-MessageType: comment

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coreboot-gerrit May 2022