Terry Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64027 )
Change subject: mb/google/brya/var/crota: setting for codec reset pin
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/64027/comment/3b0ba8bd_8455997a
PS2, Line 9: The audio codec of Crota360 used is Cirrus CS42L42, different from Brya (Realtek ALC5682I)
: There is no Reset pin on ALC5682 but CS42L42 is needed.
: So we use GPP_B15 for the reset pin of CS42L42 controlled that make the power sequence well.
> maximum line length for commit msg is 72 please […]
Done, thanks.
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Change subject: mb/google/brya/var/crota: setting for codec reset pin
......................................................................
mb/google/brya/var/crota: setting for codec reset pin
Crota360 is using a Cirrus CS42L42 for its audio codec; it
requires the reset pin to be deasserted in ramstage for proper
power sequencing.
BUG=b:230074351
BRANCH=none
TEST=build coreboot without error
Signed-off-by: Terry Chen <terry_chen(a)wistron.corp-partner.google.com>
Change-Id: Ie942b3c553823510dfa6f6fb70a7b13881fc4c14
---
M src/mainboard/google/brya/variants/crota/gpio.c
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/64027/3
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Change subject: util/amdfwtool: Add amdfwread utility
......................................................................
util/amdfwtool: Add amdfwread utility
Amdfwtool creates AMD firmware images however there is currently no way
to get information from an existing image. This commit adds amdfwread to
support that functionality. At the moment only reading PSP soft fuse
flags is supported.
BUG=b:202397678
TEST=Ran amdfwread and verified that it correctly reads the soft fuse
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Signed-off-by: Robert Zieba <robertzieba(a)google.com>
Change-Id: I15fa07c9cad8e4640e9c40e5539b0dab44424850
---
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M util/amdfwtool/Makefile
A util/amdfwtool/amdfwread.c
M util/testing/Makefile.inc
4 files changed, 255 insertions(+), 9 deletions(-)
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Reka Norman has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63893 )
Change subject: mb/google/brya/var/craask: Disable LTE-related GPIOs based on fw_config
......................................................................
Patch Set 8:
(1 comment)
File src/mainboard/google/brya/variants/craask/fw_config.c:
https://review.coreboot.org/c/coreboot/+/63893/comment/fd88091d_5deeaca6
PS7, Line 23: if (!fw_config_probe(FW_CONFIG(DB_USB, DB_1C_LTE))) {
: printk(BIOS_DEBUG, "Disable LTE-related GPIO pins.\n");
: gpio_configure_pads(lte_disable_pads, ARRAY_SIZE(lte_disable_pads));
: }
:
> This approach leavess a gpio interrupt line (GPP_H19) floating for a short time.
I think Nick's point is that there's a short time between configuring GPP_H19 as an interrupt pin in the baseboard gpio.c and disabling it in fw_config.c, during which it will be floating. Is that right? That's my bad for doing it this way on nivviks, and we should fix nivviks too.
What you've done in patchset 8 would work for now, but it will get messy if we need to handle more fw_configs. So I think we should do what Nick suggested. I'll upload a CL fixing this for nivviks, then you can update this to match.
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Change subject: util/amdfwtool: Add amdfwread utility
......................................................................
util/amdfwtool: Add amdfwread utility
Amdfwtool creates AMD firmware images however there is currently no way
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BUG=b:202397678
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Signed-off-by: Robert Zieba <robertzieba(a)google.com>
Change-Id: I15fa07c9cad8e4640e9c40e5539b0dab44424850
---
M util/amdfwtool/.gitignore
M util/amdfwtool/Makefile
A util/amdfwtool/amdfwread.c
M util/testing/Makefile.inc
4 files changed, 255 insertions(+), 9 deletions(-)
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Change subject: util/amdfwtool: Add amdfwread utility
......................................................................
util/amdfwtool: Add amdfwread utility
Amdfwtool creates AMD firmware images however there is currently no way
to get information from an existing image. This commit adds amdfwread to
support that functionality. At the moment only reading PSP soft fuse
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BUG=b:202397678
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Signed-off-by: Robert Zieba <robertzieba(a)google.com>
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M util/amdfwtool/.gitignore
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M util/testing/Makefile.inc
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Change subject: arch/x86: Add support for catching null dereferences through debug regs
......................................................................
arch/x86: Add support for catching null dereferences through debug regs
This commit adds support for catching null dereferences and execution
through x86's debug registers. This is particularly useful when running
32-bit coreboot as paging is not enabled to catch these through page
faults. This commit adds three new configs to support this feature:
DEBUG_HW_BREAKPOINTS, DEBUG_NULL_DEREF_BREAKPOINTS and
DEBUG_NULL_DEREF_HALT.
BUG=b:223902046
TEST=Ran on nipperkin device, verifying that HW breakpoints work as
expected.
Change-Id: I113590689046a13c2a552741bbfe7668a834354a
Signed-off-by: Robert Zieba <robertzieba(a)google.com>
---
M src/arch/x86/Kconfig
M src/arch/x86/Makefile.inc
A src/arch/x86/breakpoint.c
M src/arch/x86/exception.c
A src/arch/x86/include/arch/breakpoint.h
A src/arch/x86/include/arch/null_breakpoint.h
A src/arch/x86/null_breakpoint.c
7 files changed, 454 insertions(+), 1 deletion(-)
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Julius Werner has submitted this change. ( https://review.coreboot.org/c/qc_blobs/+/63958 )
Change subject: sc7180/boot: Update qclib blobs binaries from 37 to 42
......................................................................
sc7180/boot: Update qclib blobs binaries from 37 to 42
TEST=Validated on qualcomm sc7180 development board
Signed-off-by: Sudheer Kumar Amrabadi <samrabad(a)codeaurora.org>
Change-Id: Ib419b72733d8a4829d70632f537d3de87c72f7d2
---
M sc7180/boot/QcLib.elf
M sc7180/boot/Release_Notes.txt
2 files changed, 23 insertions(+), 0 deletions(-)
Approvals:
Julius Werner: Verified; Looks good to me, approved
diff --git a/sc7180/boot/QcLib.elf b/sc7180/boot/QcLib.elf
index bfa4235..ee03d68 100644
--- a/sc7180/boot/QcLib.elf
+++ b/sc7180/boot/QcLib.elf
Binary files differ
diff --git a/sc7180/boot/Release_Notes.txt b/sc7180/boot/Release_Notes.txt
index 536a937..215c38a 100644
--- a/sc7180/boot/Release_Notes.txt
+++ b/sc7180/boot/Release_Notes.txt
@@ -1,3 +1,26 @@
+=================== Release 00042 ================================
+This Release Notes file covers these blobs:
+ * QcLib.elf
+ * dcb.bin
+
+Version : 00042
+
+Release Date : Apr, 2022
+
+Supported Silicon : SC7180
+
+No special instructions, requirements or dependencies, files must be
+present in this folder to be pulled in during coreboot build
+
+Changes since last version :
+ * Basetools to update for python3
+
+Errata : Nothing to report
+
+Toolchain Version : LLVM 12.0.0
+
+ABI Info : see qclib-interface.txt
+
=================== Release 00037 ================================
This Release Notes file covers these blobs:
* QcLib.elf
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