coreboot-gerrit May 2022

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Change in coreboot[master]: mb/google/brask/variants/moli: disable ASPM on pcie_rp 6
by Raihow Shi (Code Review) 04 May '22

04 May '22

Attention is currently required from: Tim Wawrzynczak. Hello Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/64042 to look at the new patch set (#2). Change subject: mb/google/brask/variants/moli: disable ASPM on pcie_rp 6 ...................................................................... mb/google/brask/variants/moli: disable ASPM on pcie_rp 6 Currently coreboot will hang on ASPM on pcie_rp 6, so disable ASPM to let it go into kernel. BUG=b:231400217 TEST=emerge-brask coreboot. Signed-off-by: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Change-Id: I79a80d97d168f40e58774e5652967d659daa323c --- M src/mainboard/google/brya/variants/moli/overridetree.cb 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/64042/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/64042 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I79a80d97d168f40e58774e5652967d659daa323c Gerrit-Change-Number: 64042 Gerrit-PatchSet: 2 Gerrit-Owner: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: Hook up FSP hyper-threading setting to option API
by Felix Singer (Code Review) 04 May '22

04 May '22

Attention is currently required from: Nico Huber, Tim Wawrzynczak, Michael Niewöhner. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60547 ) Change subject: soc/intel/alderlake: Hook up FSP hyper-threading setting to option API ...................................................................... Patch Set 13: (1 comment) File src/soc/intel/alderlake/romstage/fsp_params.c: https://review.coreboot.org/c/coreboot/+/60547/comment/77df18bd_9c3dffaa PS6, Line 162: /* Enable Hyper Threading */ > Please update. I just deleted it, since it is obsolete anyway. -- To view, visit https://review.coreboot.org/c/coreboot/+/60547 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I520a936b4c3a8997ba2c6bea0126b3bbcc5d68ce Gerrit-Change-Number: 60547 Gerrit-PatchSet: 13 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Comment-Date: Wed, 04 May 2022 08:24:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Hook up FSP hyper-threading setting to option API
by Felix Singer (Code Review) 04 May '22

04 May '22

Attention is currently required from: Nico Huber, Tim Wawrzynczak, Michael Niewöhner. Hello build bot (Jenkins), Subrata Banik, Tim Wawrzynczak, Michael Niewöhner, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60547 to look at the new patch set (#14). Change subject: soc/intel/alderlake: Hook up FSP hyper-threading setting to option API ...................................................................... soc/intel/alderlake: Hook up FSP hyper-threading setting to option API Select `HAVE_HYPERTHREADING` and hook up the hyper-threading setting from the FSP to the option API so that related mainboards don't have to do that. Unless otherwise configured (e.g. the CMOS setting or overriden by the mainboard code), the value from the Kconfig setting `FSP_HYPERTHREADING` is used. Change-Id: I520a936b4c3a8997ba2c6bea0126b3bbcc5d68ce Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/soc/intel/alderlake/Kconfig M src/soc/intel/alderlake/romstage/fsp_params.c 2 files changed, 3 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/60547/14 -- To view, visit https://review.coreboot.org/c/coreboot/+/60547 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I520a936b4c3a8997ba2c6bea0126b3bbcc5d68ce Gerrit-Change-Number: 60547 Gerrit-PatchSet: 14 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/skylake: Hook up FSP hyper-threading setting to option API
by Felix Singer (Code Review) 04 May '22

04 May '22

Attention is currently required from: Nico Huber, Michael Niewöhner. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60542 ) Change subject: soc/intel/skylake: Hook up FSP hyper-threading setting to option API ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/60542/comment/f9f54dc4_de9d0443 PS2, Line 15: obsolete now. > I think I mentioned that with the following: […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/60542 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1023d1b94acb63f30455c56b394b68059deaaa16 Gerrit-Change-Number: 60542 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Comment-Date: Wed, 04 May 2022 08:05:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/crota: setting for codec reset pin in overridetree
by Terry Chen (Code Review) 04 May '22

04 May '22

Terry Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/64043 ) Change subject: mb/google/brya/var/crota: setting for codec reset pin in overridetree ...................................................................... mb/google/brya/var/crota: setting for codec reset pin in overridetree Crota360 is using a Cirrus CS42L42 for its audio codec; it requires the reset pin to be deasserted in ramstage for proper power sequencing. BUG=b:230074351 BRANCH=none TEST=build coreboot without error Signed-off-by: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Change-Id: Ica3467fbc8639526bee071d56af854de5e07091e --- M src/mainboard/google/brya/variants/crota/overridetree.cb 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/64043/1 diff --git a/src/mainboard/google/brya/variants/crota/overridetree.cb b/src/mainboard/google/brya/variants/crota/overridetree.cb index 20820ac..d96e0f1 100644 --- a/src/mainboard/google/brya/variants/crota/overridetree.cb +++ b/src/mainboard/google/brya/variants/crota/overridetree.cb @@ -131,7 +131,7 @@ device ref i2c0 on chip drivers/i2c/cs42l42 register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A23_IRQ)" - register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B13)" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B15)" register "ts_inv" = "true" register "ts_dbnc_rise" = "RISE_DEB_1000_MS" register "ts_dbnc_fall" = "FALL_DEB_0_MS" -- To view, visit https://review.coreboot.org/c/coreboot/+/64043 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ica3467fbc8639526bee071d56af854de5e07091e Gerrit-Change-Number: 64043 Gerrit-PatchSet: 1 Gerrit-Owner: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/brask/variants/moli: disable ASPM on pcie_rp 6
by Raihow Shi (Code Review) 04 May '22

04 May '22

Raihow Shi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/64042 ) Change subject: mb/google/brask/variants/moli: disable ASPM on pcie_rp 6 ...................................................................... mb/google/brask/variants/moli: disable ASPM on pcie_rp 6 Currently coreboot will hang on ASPM on pcie_rp 6, so disable ASPM to let it go into kernel. Signed-off-by: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Change-Id: I79a80d97d168f40e58774e5652967d659daa323c --- M src/mainboard/google/brya/variants/moli/overridetree.cb 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/64042/1 diff --git a/src/mainboard/google/brya/variants/moli/overridetree.cb b/src/mainboard/google/brya/variants/moli/overridetree.cb index 2048b61..0783999 100644 --- a/src/mainboard/google/brya/variants/moli/overridetree.cb +++ b/src/mainboard/google/brya/variants/moli/overridetree.cb @@ -76,6 +76,7 @@ .clk_src = 5, .clk_req = 5, .flags = PCIE_RP_LTR | PCIE_RP_AER, + .pcie_rp_aspm = ASPM_DISABLE, }" device pci 00.0 on end end # IntelI225V Ethernet NIC -- To view, visit https://review.coreboot.org/c/coreboot/+/64042 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I79a80d97d168f40e58774e5652967d659daa323c Gerrit-Change-Number: 64042 Gerrit-PatchSet: 1 Gerrit-Owner: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/skylake: Move FSP_HYPERTHREADING to common Intel Kconfig
by Felix Singer (Code Review) 04 May '22

04 May '22

Attention is currently required from: Anjaneya "Reddy" Chagam, Nico Huber, Jonathan Zhang, Johnny Lin, Christian Walter, Tim Wawrzynczak, Arthur Heymans, Michael Niewöhner, Tim Chu. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60543 ) Change subject: soc/intel/skylake: Move FSP_HYPERTHREADING to common Intel Kconfig ...................................................................... Patch Set 8: (1 comment) File src/soc/intel/xeon_sp/Kconfig: https://review.coreboot.org/c/coreboot/+/60543/comment/715ac731_5e96217e PS6, Line 38: HAVE_HYPERTHREADING > Makes sense, yes. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/60543 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I892d48b488cbf828057f0e9be9edc4352c58bbe7 Gerrit-Change-Number: 60543 Gerrit-PatchSet: 8 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Wed, 04 May 2022 08:00:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Hook up FSP hyper-threading setting to option API
by Felix Singer (Code Review) 04 May '22

04 May '22

Attention is currently required from: Nico Huber, Tim Wawrzynczak, Michael Niewöhner. Hello build bot (Jenkins), Subrata Banik, Tim Wawrzynczak, Michael Niewöhner, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60547 to look at the new patch set (#13). Change subject: soc/intel/alderlake: Hook up FSP hyper-threading setting to option API ...................................................................... soc/intel/alderlake: Hook up FSP hyper-threading setting to option API Select `HAVE_HYPERTHREADING` and hook up the hyper-threading setting from the FSP to the option API so that related mainboards don't have to do that. Unless otherwise configured (e.g. the CMOS setting or overriden by the mainboard code), the value from the Kconfig setting `FSP_HYPERTHREADING` is used. Change-Id: I520a936b4c3a8997ba2c6bea0126b3bbcc5d68ce Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/soc/intel/alderlake/Kconfig M src/soc/intel/alderlake/romstage/fsp_params.c 2 files changed, 3 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/60547/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/60547 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I520a936b4c3a8997ba2c6bea0126b3bbcc5d68ce Gerrit-Change-Number: 60547 Gerrit-PatchSet: 13 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/tigerlake: Hook up FSP hyper-threading setting to option API
by Felix Singer (Code Review) 04 May '22

04 May '22

Attention is currently required from: Tim Wawrzynczak, Michael Niewöhner. Hello build bot (Jenkins), Sean Rhodes, Tim Wawrzynczak, Michael Niewöhner, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60545 to look at the new patch set (#12). Change subject: soc/intel/tigerlake: Hook up FSP hyper-threading setting to option API ...................................................................... soc/intel/tigerlake: Hook up FSP hyper-threading setting to option API Select `HAVE_HYPERTHREADING` and hook up the hyper-threading setting from the FSP to the option API so that related mainboards don't have to do that. Unless otherwise configured (e.g. the CMOS setting or overriden by the mainboard code), the value from the Kconfig setting `FSP_HYPERTHREADING` is used. Also, remove related code from the mainboard starlabs/laptop/tgl, since it is obsolete now. Change-Id: I49bbd4a776b4e6c55cb373bbf88a3ca076342e3e Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/mainboard/starlabs/labtop/variants/tgl/romstage.c M src/soc/intel/tigerlake/Kconfig M src/soc/intel/tigerlake/romstage/fsp_params.c 3 files changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/60545/12 -- To view, visit https://review.coreboot.org/c/coreboot/+/60545 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I49bbd4a776b4e6c55cb373bbf88a3ca076342e3e Gerrit-Change-Number: 60545 Gerrit-PatchSet: 12 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/cannonlake: Hook up FSP hyper-threading setting to option API
by Felix Singer (Code Review) 04 May '22

04 May '22

Attention is currently required from: Michael Niewöhner. Hello build bot (Jenkins), Sean Rhodes, Nico Huber, Michael Niewöhner, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60544 to look at the new patch set (#10). Change subject: soc/intel/cannonlake: Hook up FSP hyper-threading setting to option API ...................................................................... soc/intel/cannonlake: Hook up FSP hyper-threading setting to option API Select `HAVE_HYPERTHREADING` and hook up the hyper-threading setting from the FSP to the option API so that related mainboards don't have to do that. Unless otherwise configured (e.g. the CMOS setting or overriden by the mainboard code), the value from the Kconfig setting `FSP_HYPERTHREADING` is used. Also, remove related code from the following mainboards, since it is obsolete now. * siemens/chili * starlabs/laptop/cml Change-Id: I173b87da5ce76549672c50ba30204cd77be8b82f Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/mainboard/siemens/chili/romstage.c M src/mainboard/starlabs/labtop/variants/cml/romstage.c M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/romstage/fsp_params.c 4 files changed, 4 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/60544/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/60544 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I173b87da5ce76549672c50ba30204cd77be8b82f Gerrit-Change-Number: 60544 Gerrit-PatchSet: 10 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: newpatchset

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coreboot-gerrit May 2022