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Change subject: mb/google/brask/variants/moli: Change DDR4 Interleave to Non-Interleave
......................................................................
Patch Set 2:
(3 comments)
File src/mainboard/google/brya/variants/moli/memory.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-142867):
https://review.coreboot.org/c/coreboot/+/62478/comment/f2589c7a_bd7210cc
PS2, Line 16: return &ddr4_mem_config;
code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-142867):
https://review.coreboot.org/c/coreboot/+/62478/comment/c35fc2cf_9b49ea1e
PS2, Line 16: return &ddr4_mem_config;
please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-142867):
https://review.coreboot.org/c/coreboot/+/62478/comment/4d8ebc30_c5b9a14b
PS2, Line 17: }
adding a line without newline at end of file
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Change subject: mb/google/brya/var/kano: Update TDP PL1, PL2, and PL4 for U28 SKUs
......................................................................
Patch Set 3: Code-Review+2
(1 comment)
File src/mainboard/google/brya/variants/kano/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/62466/comment/c80678ab_2f9b1804
PS3, Line 66: register "power_limits_config[ADL_P_282_482_28W_CORE]" = "{
> Do we still need this? you already update the cpu_power_limits limits. […]
Probably still a good idea to have a known-good default in there in case of DPTF software errors.
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Change subject: mb/google/brya/var/kano: Update TDP PL1, PL2, and PL4 for U28 SKUs
......................................................................
Patch Set 3:
(1 comment)
File src/mainboard/google/brya/variants/kano/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/62466/comment/f67f8235_f3942f3a
PS3, Line 66: register "power_limits_config[ADL_P_282_482_28W_CORE]" = "{
Do we still need this? you already update the cpu_power_limits limits. Update dptf entry should be enough in device tree.
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Change subject: soc/intel/common: Add compressed ME_RW blobs to ME_RW_A/B for ADL-N
......................................................................
Patch Set 2:
(1 comment)
File src/soc/intel/common/block/cse/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/62358/comment/5071f789_79cee847
PS2, Line 88: ifeq ($(CONFIG_SOC_INTEL_ALDERLAKE_PCH_N),y)
> We chose this, as did not want to impact ADL-P at this stage of the program. […]
Will this impact the ADL-P? If we don't touch the flashmap.md just reduce the size, should be fine. Add Tim and Nick for more insight.
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Change subject: mainboard/lenovo/x230: Rework Kconfig
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Set Ready For Review
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Change subject: mb/google/nissa: Add fmd file for nissa
......................................................................
Patch Set 4:
(1 comment)
Patchset:
PS4:
> LGTM, thanks for putting this together. […]
Uploaded https://crrev.com/i/4584911
Please add
```
Cq-Depend: chrome-internal:4584911
```
directly above the Change-Id line in the commit message.
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Change subject: mb/google/brya/var/kano: Update TDP PL1, PL2, and PL4 for U28 SKUs
......................................................................
Patch Set 3:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62466/comment/ece40796_ab784da6
PS2, Line 9: Update TDP PL1, PL2, and PL4 for U28 sku
> suggestion: […]
Done
Patchset:
PS3:
Thanks.
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Hello build bot (Jenkins), Tim Wawrzynczak, Ren Kuo, Nick Vaccaro,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/62466
to look at the new patch set (#3).
Change subject: mb/google/brya/var/kano: Update TDP PL1, PL2, and PL4 for U28 SKUs
......................................................................
mb/google/brya/var/kano: Update TDP PL1, PL2, and PL4 for U28 SKUs
Based on testing results from the thermal team, they have decided
to update PL1, PL2 and PL4 for U28 SKUs.
BUG=b:221338290
TEST=Run with U28 and ensure the PL1/PL2/PL4 settings are correct
Signed-off-by: David Wu <david_wu(a)quanta.corp-partner.google.com>
Change-Id: Ib82e2dbacd6cbc39390eb28f27ca9db48d6c215c
---
M src/mainboard/google/brya/variants/kano/overridetree.cb
M src/mainboard/google/brya/variants/kano/ramstage.c
2 files changed, 16 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/62466/3
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