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Change subject: mb/google/brya/var/vell: Change to ELAN touchpanel driver
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Patch Set 8: Code-Review+2
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Change subject: drivers/wwan/fm: Include option to add ACPI _DSD for DmaProperty
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Change subject: drivers/{pcie,wifi}/generic: Update untrusted property name
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Change subject: drivers/pcie/generic: Add support to generate code under companion device instead
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Change subject: i2c: Configurable I2C transfer timeout
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Patch Set 7: Code-Review+2
(1 comment)
File src/soc/qualcomm/common/include/soc/qup_se_handlers_common.h:
https://review.coreboot.org/c/coreboot/+/62278/comment/2a9bdb2e_a661420d
PS7, Line 466: int size, struct stopwatch *timeout);
nit: I think just passing the time in microseconds (as an integer) would have been sufficient here...
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Hello build bot (Jenkins), YH Lin, Tim Wawrzynczak, Zhuohao Lee, Felix Held,
I'd like you to reexamine a change. Please visit
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Change subject: mb/google/brask/variants/moli: Reduce PSysMax to 11 A
......................................................................
mb/google/brask/variants/moli: Reduce PSysMax to 11 A
set psys_imax_ma to 11000 mA for Moli variant, which implies Psys_Pmax = 11A * 19.5V = 214.5W
BUG=b:215258941
Signed-off-by: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com>
Change-Id: I61f4813f3527123a590d80b4a6e49d76ebb71c99
---
M src/mainboard/google/brya/variants/moli/Makefile.inc
A src/mainboard/google/brya/variants/moli/ramstage.c
2 files changed, 39 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/62374/8
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I'd like you to reexamine a change. Please visit
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Change subject: mb/google/brask/variants/moli: set psys_imax_ma for moli
......................................................................
mb/google/brask/variants/moli: set psys_imax_ma for moli
set psys_imax_ma to 11000 mA for Moli variant, which implies Psys_Pmax = 11A * 19.5V = 214.5W
BUG=b:215258941
Signed-off-by: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com>
Change-Id: I61f4813f3527123a590d80b4a6e49d76ebb71c99
---
M src/mainboard/google/brya/variants/moli/Makefile.inc
A src/mainboard/google/brya/variants/moli/ramstage.c
2 files changed, 39 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/62374/7
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Change subject: mb/google/brask/variants/moli: Change DDR4 Interleave to Non-Interleave
......................................................................
Patch Set 3:
(1 comment)
File src/mainboard/google/brya/variants/moli/memory.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-142869):
https://review.coreboot.org/c/coreboot/+/62478/comment/daf4b0f3_ccafa348
PS3, Line 17: }
adding a line without newline at end of file
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Change subject: mb/google/brya/var/kano: Update TDP PL1, PL2, and PL4 for U28 SKUs
......................................................................
Patch Set 3:
(1 comment)
File src/mainboard/google/brya/variants/kano/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/62466/comment/2620732d_9171f66b
PS3, Line 66: register "power_limits_config[ADL_P_282_482_28W_CORE]" = "{
> Probably still a good idea to have a known-good default in there in case of DPTF software errors.
if want to do so, should put all 4 entries here?
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