coreboot-gerrit March 2022

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Change in coreboot[master]: amdfwtool: Add ISH header support for A/B recovery layout
by Bao Zheng (Code Review) 02 Mar '22

02 Mar '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Martin Roth, Marshall Dawson, Zheng Bao, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Martin Roth, Marshall Dawson, Zheng Bao, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57747 to look at the new patch set (#55). Change subject: amdfwtool: Add ISH header support for A/B recovery layout ...................................................................... amdfwtool: Add ISH header support for A/B recovery layout Image Slot Header (ISH) is a new feature. The rom layout for A/B recovery with ISH: EFS -> PSP L1 0x48 -> ISH A -> PSP L2 A -> BIOS L2 A 0x4A -> ISH B -> PSP L2 B -> BIOS L2 B Change-Id: Ib0690cde1dce949514c7aacebe13096b7814ceff Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/Makefile M util/amdfwtool/Makefile.inc M util/amdfwtool/amdfwtool.c M util/amdfwtool/amdfwtool.h 4 files changed, 64 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/57747/55 -- To view, visit https://review.coreboot.org/c/coreboot/+/57747 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib0690cde1dce949514c7aacebe13096b7814ceff Gerrit-Change-Number: 57747 Gerrit-PatchSet: 55 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bao Zheng <zheng.bao(a)amd.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: amdfwtool: Clear struct match before regular expression matching
by Bao Zheng (Code Review) 02 Mar '22

02 Mar '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Nikolai Vyssotski, Rob Barnes, Karthik Ramasubramanian, Karthikeyan Ramasubramanian. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Nikolai Vyssotski, Fred Reitberger, Rob Barnes, Karthik Ramasubramanian, Karthikeyan Ramasubramanian, Karthikeyan Ramasubramanian, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/62482 to look at the new patch set (#7). Change subject: amdfwtool: Clear struct match before regular expression matching ...................................................................... amdfwtool: Clear struct match before regular expression matching If it is not cleared and the number of strings is fewer than last iteration, the match[3] will keep the last value, which actually should be empty. Add assert to make sure the level is a legal value. BUG=b:222038278 Change-Id: If14e0923fbb1648d83784eb5dc1411c93227db5a Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/data_parse.c 1 file changed, 12 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/62482/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/62482 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If14e0923fbb1648d83784eb5dc1411c93227db5a Gerrit-Change-Number: 62482 Gerrit-PatchSet: 7 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <karthikmit2005(a)gmail.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Attention: Karthikeyan Ramasubramanian <karthikmit2005(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/amd/cezanne: Add PSP Bootloader for AB recovery in fw.cfg
by Bao Zheng (Code Review) 02 Mar '22

02 Mar '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Martin Roth, Marshall Dawson, Zheng Bao, Fred Reitberger. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Nikolai Vyssotski, Fred Reitberger, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56937 to look at the new patch set (#65). Change subject: soc/amd/cezanne: Add PSP Bootloader for AB recovery in fw.cfg ...................................................................... soc/amd/cezanne: Add PSP Bootloader for AB recovery in fw.cfg TypeId0x01_PspBootLoader_AB_Stage1_CZN.sbin is bootloader for A/B recovery. Both bootloader can be put in the fw.cfg. The amdfwtool decides which booloader is dropped in the directory. Change-Id: I099b4c98d64dba935bf3ea2b7f191da83b9bd95e Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M src/soc/amd/cezanne/fw.cfg 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/56937/65 -- To view, visit https://review.coreboot.org/c/coreboot/+/56937 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I099b4c98d64dba935bf3ea2b7f191da83b9bd95e Gerrit-Change-Number: 56937 Gerrit-PatchSet: 65 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bao Zheng <zheng.bao(a)amd.corp-partner.google.com> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/dedede/var/madoo: Remove Hynix memory for madoo
by Dtrain Hsu (Code Review) 02 Mar '22

02 Mar '22

Dtrain Hsu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/62507 ) Change subject: mb/google/dedede/var/madoo: Remove Hynix memory for madoo ...................................................................... mb/google/dedede/var/madoo: Remove Hynix memory for madoo Remove Hynix H54G46CYRBX267 in the mem_list_variant.txt and generate the SPD ID. BUG=b:209889645 BRANCH=dedede TEST=FW_NAME=madoo emerge-dedede coreboot chromeos-bootimage Signed-off-by: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Change-Id: I5d90df02f12c6cb1f592d7ad294b6da4a829507c --- M src/mainboard/google/dedede/variants/madoo/memory/Makefile.inc M src/mainboard/google/dedede/variants/madoo/memory/dram_id.generated.txt M src/mainboard/google/dedede/variants/madoo/memory/mem_parts_used.txt 3 files changed, 1 insertion(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/62507/1 diff --git a/src/mainboard/google/dedede/variants/madoo/memory/Makefile.inc b/src/mainboard/google/dedede/variants/madoo/memory/Makefile.inc index 05cb4ed..948c12f 100644 --- a/src/mainboard/google/dedede/variants/madoo/memory/Makefile.inc +++ b/src/mainboard/google/dedede/variants/madoo/memory/Makefile.inc @@ -4,4 +4,4 @@ # util/spd_tools/bin/part_id_gen JSL lp4x src/mainboard/google/dedede/variants/madoo/memory src/mainboard/google/dedede/variants/madoo/memory/mem_parts_used.txt SPD_SOURCES = -SPD_SOURCES += spd/lp4x/set-1/spd-1.hex # ID = 0(0b0000) Parts = H9HCNNNBKMMLXR-NEE, MT53E512M32D2NP-046 WT:E, K4U6E3S4AA-MGCR, MT53E512M32D1NP-046 WT:B, K4U6E3S4AB-MGCL, H54G46CYRBX267 +SPD_SOURCES += spd/lp4x/set-1/spd-1.hex # ID = 0(0b0000) Parts = H9HCNNNBKMMLXR-NEE, MT53E512M32D2NP-046 WT:E, K4U6E3S4AA-MGCR, MT53E512M32D1NP-046 WT:B, K4U6E3S4AB-MGCL diff --git a/src/mainboard/google/dedede/variants/madoo/memory/dram_id.generated.txt b/src/mainboard/google/dedede/variants/madoo/memory/dram_id.generated.txt index 14cf74e..076d988 100644 --- a/src/mainboard/google/dedede/variants/madoo/memory/dram_id.generated.txt +++ b/src/mainboard/google/dedede/variants/madoo/memory/dram_id.generated.txt @@ -9,4 +9,3 @@ K4U6E3S4AA-MGCR 0 (0000) MT53E512M32D1NP-046 WT:B 0 (0000) K4U6E3S4AB-MGCL 0 (0000) -H54G46CYRBX267 0 (0000) diff --git a/src/mainboard/google/dedede/variants/madoo/memory/mem_parts_used.txt b/src/mainboard/google/dedede/variants/madoo/memory/mem_parts_used.txt index 17188e3..4d616ec 100644 --- a/src/mainboard/google/dedede/variants/madoo/memory/mem_parts_used.txt +++ b/src/mainboard/google/dedede/variants/madoo/memory/mem_parts_used.txt @@ -3,4 +3,3 @@ K4U6E3S4AA-MGCR MT53E512M32D1NP-046 WT:B K4U6E3S4AB-MGCL -H54G46CYRBX267 -- To view, visit https://review.coreboot.org/c/coreboot/+/62507 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5d90df02f12c6cb1f592d7ad294b6da4a829507c Gerrit-Change-Number: 62507 Gerrit-PatchSet: 1 Gerrit-Owner: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: libpayload: cbmem_console: Drop loglevel markers from snapshot
by Julius Werner (Code Review) 02 Mar '22

02 Mar '22

Attention is currently required from: Raul Rangel, Yu-Ping Wu. Hello Raul Rangel, Yu-Ping Wu, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/62506 to review the following change. Change subject: libpayload: cbmem_console: Drop loglevel markers from snapshot ...................................................................... libpayload: cbmem_console: Drop loglevel markers from snapshot coreboot recently introduced non-printable loglevel markers in the CBMEM console. Payloads were generally unaffected since they don't use log levels and it is still legal to append lines without a marker to the log. However, payloads using cbmem_console_snapshot() to display existing logs from coreboot have started seeing '?' characters in place of the markers. This patch fixes the issue by filtering out marker characters. BUG=b:221909874 Signed-off-by: Julius Werner <jwerner(a)chromium.org> Change-Id: I4a9e5d464508320cf43ea572d62896d38c2a128d --- M payloads/libpayload/drivers/cbmem_console.c 1 file changed, 24 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/62506/1 diff --git a/payloads/libpayload/drivers/cbmem_console.c b/payloads/libpayload/drivers/cbmem_console.c index 22d5312..df40ad0 100644 --- a/payloads/libpayload/drivers/cbmem_console.c +++ b/payloads/libpayload/drivers/cbmem_console.c @@ -80,11 +80,28 @@ do_write(buffer, count); } +static void snapshot_putc(char *console, uint32_t *cursor, char c) +{ + /* This is BIOS_LOG_IS_MARKER() from coreboot. Due to stupid + licensing restrictions, we can't use it directly. */ + if (c >= 0x10 && c <= 0x18) + return; + + /* Slight memory corruption may occur between reboots and give us a few + unprintable characters like '\0'. Replace them with '?' on output. */ + if (!isprint(c) && !isspace(c)) + console[*cursor] = '?'; + else + console[*cursor] = c; + + *cursor += 1; +} + char *cbmem_console_snapshot(void) { const struct cbmem_console *const console_p = phys_to_virt(cbmem_console_p); char *console_c; - uint32_t size, cursor, overflow; + uint32_t size, cursor, overflow, newc, oldc; if (!console_p) { printf("ERROR: No cbmem console found in coreboot table\n"); @@ -104,24 +121,19 @@ size); return NULL; } - console_c[size] = '\0'; + newc = 0; if (overflow) { if (cursor >= size) { printf("ERROR: CBMEM console struct is corrupted\n"); return NULL; } - memcpy(console_c, console_p->body + cursor, size - cursor); - memcpy(console_c + size - cursor, console_p->body, cursor); - } else { - memcpy(console_c, console_p->body, size); + for (oldc = cursor; oldc < size; oldc++) + snapshot_putc(console_c, &newc, console_p->body[oldc]); } - - /* Slight memory corruption may occur between reboots and give us a few - unprintable characters like '\0'. Replace them with '?' on output. */ - for (cursor = 0; cursor < size; cursor++) - if (!isprint(console_c[cursor]) && !isspace(console_c[cursor])) - console_c[cursor] = '?'; + for (oldc = 0; oldc < size && oldc < cursor; oldc++) + snapshot_putc(console_c, &newc, console_p->body[oldc]); + console_c[newc] = '\0'; return console_c; } -- To view, visit https://review.coreboot.org/c/coreboot/+/62506 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4a9e5d464508320cf43ea572d62896d38c2a128d Gerrit-Change-Number: 62506 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: sc7280: Add PCIe host controller driver
by Shelley Chen (Code Review) 02 Mar '22

02 Mar '22

Attention is currently required from: Ravi kumar, Furquan Shaikh, Paul Menzel, Ravi Kumar Bokka, Julius Werner, Prasad Malisetty, mturney mturney. Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/53902 ) Change subject: sc7280: Add PCIe host controller driver ...................................................................... Patch Set 66: (1 comment) File src/soc/qualcomm/sc7280/pcie_host.c: https://review.coreboot.org/c/coreboot/+/53902/comment/4e124145_1cee5028 PS66, Line 519: static void *qcom_dw_pcie_get_config_addr(struct pcierc_dwc_t *pcierc, int bdf) Actually, this looks more like what pci_map_bus() should look like. -- To view, visit https://review.coreboot.org/c/coreboot/+/53902 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iccf60aa56541f5230fa9c3f821d7709615c36631 Gerrit-Change-Number: 53902 Gerrit-PatchSet: 66 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Prasad Malisetty <pmaliset(a)qualcomm.corp-partner.google.com> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Prasad Malisetty <pmaliset(a)qualcomm.corp-partner.google.com> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Comment-Date: Wed, 02 Mar 2022 01:58:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/glados: Drop TPM PIRQ
by Matt DeVillier (Code Review) 02 Mar '22

02 Mar '22

Attention is currently required from: Nico Huber, Tim Wawrzynczak. Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62444 ) Change subject: mb/google/glados: Drop TPM PIRQ ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > What is ACPI reporting for the IRQ # then? there is not one reported. Per src/drivers/pc80/tpm/tis.c, an interrupt is only injected into ACPI if CONFIG_TPM_PIRQ is set, or if it can be read directly from the TPM; otherwise it is omitted -- To view, visit https://review.coreboot.org/c/coreboot/+/62444 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I544695505291bbebe062df636cc8ddd139c08c2b Gerrit-Change-Number: 62444 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Wed, 02 Mar 2022 01:55:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: dptf: add power participant support
by EricR Lai (Code Review) 02 Mar '22

02 Mar '22

Attention is currently required from: Lance Zhao, Sumeet R Pawnikar, Patrick Rudolph. EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62039 ) Change subject: dptf: add power participant support ...................................................................... Patch Set 2: (1 comment) File src/ec/google/chromeec/acpi/ec.asl: https://review.coreboot.org/c/coreboot/+/62039/comment/b183ce10_1885ea14 PS2, Line 18: External (\_SB.DPTF.TPWR, DeviceObj) I didn't see who use this in this CL. In the Qevent or the follow up CL? -- To view, visit https://review.coreboot.org/c/coreboot/+/62039 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3df1618cacc9e3dfe2c90aa6680e211d3fff9bcf Gerrit-Change-Number: 62039 Gerrit-PatchSet: 2 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Poornima Tom <poornima.tom(a)intel.com> Gerrit-CC: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Lance Zhao Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 02 Mar 2022 01:54:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: amdfwtool: Add ISH header support for A/B recovery layout
by Bao Zheng (Code Review) 02 Mar '22

02 Mar '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Martin Roth, Marshall Dawson, Zheng Bao, Felix Held. Bao Zheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57747 ) Change subject: amdfwtool: Add ISH header support for A/B recovery layout ...................................................................... Patch Set 54: (1 comment) File util/amdfwtool/amdfwtool.h: https://review.coreboot.org/c/coreboot/+/57747/comment/c687efa1_70e9bf60 PS52, Line 245: ; > nit: Add a new line between the #defines Done -- To view, visit https://review.coreboot.org/c/coreboot/+/57747 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib0690cde1dce949514c7aacebe13096b7814ceff Gerrit-Change-Number: 57747 Gerrit-PatchSet: 54 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bao Zheng <zheng.bao(a)amd.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 02 Mar 2022 01:51:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: amdfwtool: Clear struct match before regular expression matching
by Bao Zheng (Code Review) 02 Mar '22

02 Mar '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Nikolai Vyssotski, Rob Barnes, Karthik Ramasubramanian, Karthikeyan Ramasubramanian. Bao Zheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62482 ) Change subject: amdfwtool: Clear struct match before regular expression matching ...................................................................... Patch Set 6: (1 comment) File util/amdfwtool/data_parse.c: https://review.coreboot.org/c/coreboot/+/62482/comment/0da49bc6_191a3da7 PS4, Line 432: match > Can you change the function signature to `regmatch_t match[N_MATCHES]`. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/62482 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If14e0923fbb1648d83784eb5dc1411c93227db5a Gerrit-Change-Number: 62482 Gerrit-PatchSet: 6 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <karthikmit2005(a)gmail.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Attention: Karthikeyan Ramasubramanian <karthikmit2005(a)gmail.com> Gerrit-Comment-Date: Wed, 02 Mar 2022 01:51:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Gerrit-MessageType: comment

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coreboot-gerrit March 2022