coreboot-gerrit March 2022

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Change in coreboot[master]: cbfstool/linux_trampoline: Fill the ACPI RSDP entry
by Arthur Heymans (Code Review) 03 Mar '22

03 Mar '22

Attention is currently required from: Arthur Heymans. Hello Arthur Heymans, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/62574 to review the following change. Change subject: cbfstool/linux_trampoline: Fill the ACPI RSDP entry ...................................................................... cbfstool/linux_trampoline: Fill the ACPI RSDP entry With LinuxBoot Linux relied on the legacy method of fetching the RSDP pointer to get ACPI. This uses a more modern approach available since 2018 on the Linux kernel, which involves filling in the zero page. This method takes precedence over any other method of fetching the RSDP in Linux (UEFI, Kexec, Legacy/BIOS). Some UEFI zealots are threatening that legacy code will be removed from Linux so it's best to already adapt to that possibility. Change-Id: I688b94608b03b0177c42d2834c7e3beb802ae686 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M util/cbfstool/linux_trampoline.S M util/cbfstool/linux_trampoline.c 2 files changed, 21 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/62574/1 diff --git a/util/cbfstool/linux_trampoline.S b/util/cbfstool/linux_trampoline.S index 7268528..454fb0d 100644 --- a/util/cbfstool/linux_trampoline.S +++ b/util/cbfstool/linux_trampoline.S @@ -13,7 +13,9 @@ #define CB_TAG_FORWARD 0x11 #define CB_TAG_MEMORY 0x1 #define CB_TAG_FRAMEBUFFER 0x12 +#define CB_TAG_ACPI_RSDP 0x43 +#define ACPI_RSDP_ADDR 0x70 #define E820_NR_OFFSET 0x1e8 #define LINUX_ENTRY_OFFSET 0x214 #define E820_OFFSET 0x2d0 @@ -52,7 +54,7 @@ .testMemory: cmp $CB_TAG_MEMORY, (%ebx) -jne .testFramebuffer +jne .testAcpiRsdp /* memory tag: copy e820 map and entry count. also determine alt_mem_k */ mov 4(%ebx), %eax @@ -87,6 +89,15 @@ add $20, %edi jmp .test_e820_entry +.testAcpiRsdp: +cmp $CB_TAG_ACPI_RSDP, (%ebx) +jne .testFramebuffer + +mov 8(%ebx), %eax +mov %eax, (LINUX_PARAM_LOC + ACPI_RSDP_ADDR) +mov 12(%ebx), %eax +mov %eax, (LINUX_PARAM_LOC + ACPI_RSDP_ADDR + 4) + .testFramebuffer: cmp $CB_TAG_FRAMEBUFFER, (%ebx) jne .endScan diff --git a/util/cbfstool/linux_trampoline.c b/util/cbfstool/linux_trampoline.c index b804c80..0e43ab6 100644 --- a/util/cbfstool/linux_trampoline.c +++ b/util/cbfstool/linux_trampoline.c @@ -3,17 +3,18 @@ unsigned char trampoline[] = { 0xfc, 0x31, 0xd2, 0xb9, 0x00, 0x00, 0x00, 0x00, 0xbb, 0x00, 0x00, 0x01, 0x00, 0x01, 0xcb, 0x8b, 0x01, 0x3d, 0x4c, 0x42, 0x49, 0x4f, 0x74, 0x07, 0x83, 0xc1, 0x10, 0x39, 0xcb, 0x75, 0xe9, 0x39, - 0xcb, 0x0f, 0x84, 0xaa, 0x00, 0x00, 0x00, 0x8b, 0x59, 0x04, 0x01, 0xcb, 0x8b, 0x49, 0x14, 0x83, + 0xcb, 0x0f, 0x84, 0xc3, 0x00, 0x00, 0x00, 0x8b, 0x59, 0x04, 0x01, 0xcb, 0x8b, 0x49, 0x14, 0x83, 0x3b, 0x11, 0x75, 0x05, 0x8b, 0x4b, 0x08, 0xeb, 0xcf, 0x83, 0x3b, 0x01, 0x75, 0x53, 0x8b, 0x43, 0x04, 0x83, 0xe8, 0x08, 0xc1, 0xe8, 0x02, 0x3d, 0xa0, 0x00, 0x00, 0x00, 0x7e, 0x05, 0xb8, 0xa0, 0x00, 0x00, 0x00, 0x89, 0xc6, 0xbf, 0x05, 0x00, 0x00, 0x00, 0xf7, 0xf7, 0xa3, 0xe8, 0x01, 0x09, 0x00, 0x89, 0xf0, 0x91, 0x8d, 0x73, 0x08, 0xbf, 0xd0, 0x02, 0x09, 0x00, 0xf3, 0xa5, 0x91, 0xa1, - 0xe8, 0x01, 0x09, 0x00, 0xbf, 0xd0, 0x02, 0x09, 0x00, 0x83, 0xf8, 0x00, 0x74, 0x18, 0x83, 0x7f, + 0xe8, 0x01, 0x09, 0x00, 0xbf, 0xd0, 0x02, 0x09, 0x00, 0x83, 0xf8, 0x00, 0x74, 0x2d, 0x83, 0x7f, 0x10, 0x0c, 0x7e, 0x07, 0xc7, 0x47, 0x10, 0x02, 0x00, 0x00, 0x00, 0x48, 0x83, 0xc7, 0x14, 0xeb, - 0xe8, 0x83, 0x3b, 0x12, 0x75, 0x00, 0x03, 0x5b, 0x04, 0x49, 0x75, 0x93, 0xb8, 0x00, 0x00, 0x04, - 0x00, 0xc7, 0x40, 0x10, 0xff, 0xff, 0x00, 0x00, 0xc7, 0x40, 0x14, 0x00, 0x9b, 0xcf, 0x00, 0xc7, - 0x40, 0x18, 0xff, 0xff, 0x00, 0x00, 0xc7, 0x40, 0x1c, 0x00, 0x93, 0xcf, 0x00, 0xc6, 0x00, 0x2b, - 0x89, 0x40, 0x02, 0x0f, 0x01, 0x10, 0xbe, 0x00, 0x00, 0x09, 0x00, 0xff, 0x25, 0x14, 0x02, 0x09, - 0x00, 0xf4, 0xeb, 0xfd + 0xe8, 0x83, 0x3b, 0x43, 0x75, 0x10, 0x8b, 0x43, 0x08, 0xa3, 0x70, 0x00, 0x09, 0x00, 0x8b, 0x43, + 0x0c, 0xa3, 0x74, 0x00, 0x09, 0x00, 0x83, 0x3b, 0x12, 0x75, 0x00, 0x03, 0x5b, 0x04, 0x49, 0x0f, + 0x85, 0x7a, 0xff, 0xff, 0xff, 0xb8, 0x00, 0x00, 0x04, 0x00, 0xc7, 0x40, 0x10, 0xff, 0xff, 0x00, + 0x00, 0xc7, 0x40, 0x14, 0x00, 0x9b, 0xcf, 0x00, 0xc7, 0x40, 0x18, 0xff, 0xff, 0x00, 0x00, 0xc7, + 0x40, 0x1c, 0x00, 0x93, 0xcf, 0x00, 0xc6, 0x00, 0x2b, 0x89, 0x40, 0x02, 0x0f, 0x01, 0x10, 0xbe, + 0x00, 0x00, 0x09, 0x00, 0xff, 0x25, 0x14, 0x02, 0x09, 0x00, 0xf4, 0xeb, 0xfd }; -unsigned int trampoline_len = 212; +unsigned int trampoline_len = 237; -- To view, visit https://review.coreboot.org/c/coreboot/+/62574 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I688b94608b03b0177c42d2834c7e3beb802ae686 Gerrit-Change-Number: 62574 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in coreboot[master]: coreboot_tables.c: Expose the ACPI RSDP
by Arthur Heymans (Code Review) 03 Mar '22

03 Mar '22

Attention is currently required from: Arthur Heymans. Hello Arthur Heymans, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/62573 to review the following change. Change subject: coreboot_tables.c: Expose the ACPI RSDP ...................................................................... coreboot_tables.c: Expose the ACPI RSDP The ACPI RSDP can only be found in: - legacy BIOS region - via UEFI service On some systems like ARM that legacy BIOS region is not an option, so to avoid needing UEFI it makes sense to expose the RSDP via a coreboot table entry. Change-Id: I591312a2c48f0cbbb03b2787e4b365e9c932afff Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/acpi/acpi.c M src/commonlib/include/commonlib/coreboot_tables.h M src/include/acpi/acpi.h M src/lib/coreboot_table.c 4 files changed, 34 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/62573/1 diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c index 3bf57c6..390c727 100644 --- a/src/acpi/acpi.c +++ b/src/acpi/acpi.c @@ -1588,6 +1588,13 @@ cbfs_preload(file); } +uintptr_t coreboot_rsdp; + +uintptr_t get_coreboot_rsdp(void) +{ + return coreboot_rsdp; +} + unsigned long write_acpi_tables(unsigned long start) { unsigned long current; @@ -1695,6 +1702,7 @@ /* We need at least an RSDP and an RSDT Table */ rsdp = (acpi_rsdp_t *) current; + coreboot_rsdp = (uintptr_t)rsdp; current += sizeof(acpi_rsdp_t); current = acpi_align_current(current); rsdt = (acpi_rsdt_t *) current; diff --git a/src/commonlib/include/commonlib/coreboot_tables.h b/src/commonlib/include/commonlib/coreboot_tables.h index 91da8e0..3b215bf 100644 --- a/src/commonlib/include/commonlib/coreboot_tables.h +++ b/src/commonlib/include/commonlib/coreboot_tables.h @@ -85,6 +85,7 @@ LB_TAG_BOARD_CONFIG = 0x0040, LB_TAG_ACPI_CNVS = 0x0041, LB_TAG_TYPE_C_INFO = 0x0042, + LB_TAG_ACPI_RSDP = 0x0043, /* The following options are CMOS-related */ LB_TAG_CMOS_OPTION_TABLE = 0x00c8, LB_TAG_OPTION = 0x00c9, @@ -574,4 +575,15 @@ uint8_t tpm_version; /* 1: TPM1.2, 2: TPM2.0 */ uint8_t ppi_version; /* BCD encoded */ } __packed; + + +/* + * Handoff the ACPI RSDP + */ +struct lb_acpi_rsdp { + uint32_t tag; + uint32_t size; + uint64_t rsdp_pointer; /* Address of the ACPI RSDP */ +} __packed; + #endif diff --git a/src/include/acpi/acpi.h b/src/include/acpi/acpi.h index dade92d..0ba8767 100644 --- a/src/include/acpi/acpi.h +++ b/src/include/acpi/acpi.h @@ -54,6 +54,7 @@ }; #define RSDP_SIG "RSD PTR " /* RSDT pointer signature */ +uintptr_t get_coreboot_rsdp(void); #define ASLC "CORE" /* Must be exactly 4 bytes long! */ #define ACPI_NAME_BUFFER_SIZE 5 /* 4 chars + 1 NUL */ diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index d0cba80..ec10ff2 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <acpi/acpi.h> #include <arch/cbconfig.h> #include <console/console.h> #include <console/uart.h> @@ -420,6 +421,16 @@ return (unsigned long)rec + rec->size; } +static void lb_add_acpi_rsdp(struct lb_header *head) +{ + struct lb_acpi_rsdp *acpi_rsdp; + struct lb_record *rec = lb_new_record(head); + acpi_rsdp = (struct lb_acpi_rsdp *)rec; + acpi_rsdp->tag = LB_TAG_ACPI_RSDP; + acpi_rsdp->size = sizeof(*acpi_rsdp); + acpi_rsdp->rsdp_pointer = get_coreboot_rsdp(); +} + size_t write_coreboot_forwarding_table(uintptr_t entry, uintptr_t target) { struct lb_header *head; @@ -523,6 +534,8 @@ /* Add all cbmem entries into the coreboot tables. */ cbmem_add_records_to_cbtable(head); + lb_add_acpi_rsdp(head); + /* Remember where my valid memory ranges are */ return lb_table_fini(head); } -- To view, visit https://review.coreboot.org/c/coreboot/+/62573 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I591312a2c48f0cbbb03b2787e4b365e9c932afff Gerrit-Change-Number: 62573 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/denverton_ns: enable Denverton to use common SoC XHCI code
by Elyes Haouas (Code Review) 03 Mar '22

03 Mar '22

Attention is currently required from: Felix Singer, Jeff Daly, Mariusz Szafrański, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Patrick Rudolph. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60992 ) Change subject: soc/intel/denverton_ns: enable Denverton to use common SoC XHCI code ...................................................................... Patch Set 10: (1 comment) File src/soc/intel/denverton_ns/chip.h: https://review.coreboot.org/c/coreboot/+/60992/comment/c14b4b58_eee05719 PS10, Line 6: #include <acpi/acpi_device.h> please, why this include ? -- To view, visit https://review.coreboot.org/c/coreboot/+/60992 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I505b3a7761cb3719697626e1f272d0928fdd29f1 Gerrit-Change-Number: 60992 Gerrit-PatchSet: 10 Gerrit-Owner: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 03 Mar 2022 21:32:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/vell: Enable USB2 port for KBD MCU
by Felix Singer (Code Review) 03 Mar '22

03 Mar '22

Attention is currently required from: Daisuke Nojiri. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62505 ) Change subject: mb/google/brya/vell: Enable USB2 port for KBD MCU ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/62505 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iad2140dbdf5e34332388f3f43b3ede3d22e73087 Gerrit-Change-Number: 62505 Gerrit-PatchSet: 2 Gerrit-Owner: Daisuke Nojiri <dnojiri(a)chromium.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Daisuke Nojiri <dnojiri(a)chromium.org> Gerrit-Comment-Date: Thu, 03 Mar 2022 21:22:44 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/wwan/fm: Include option to add ACPI _DSD for DmaProperty
by Tim Wawrzynczak (Code Review) 03 Mar '22

03 Mar '22

Attention is currently required from: Subrata Banik, Nick Vaccaro. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62436 ) Change subject: drivers/wwan/fm: Include option to add ACPI _DSD for DmaProperty ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: rebase -- To view, visit https://review.coreboot.org/c/coreboot/+/62436 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If485ac5314fae6e6faefac43fcfcea4f4cdd02c0 Gerrit-Change-Number: 62436 Gerrit-PatchSet: 3 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Thu, 03 Mar 2022 20:48:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/wwan/fm: Include option to add ACPI _DSD for DmaProperty
by Tim Wawrzynczak (Code Review) 03 Mar '22

03 Mar '22

Attention is currently required from: Subrata Banik, Tim Wawrzynczak, Nick Vaccaro. Hello build bot (Jenkins), Subrata Banik, Nick Vaccaro, EricR Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/62436 to look at the new patch set (#3). Change subject: drivers/wwan/fm: Include option to add ACPI _DSD for DmaProperty ...................................................................... drivers/wwan/fm: Include option to add ACPI _DSD for DmaProperty Similar to commit 09c047c, the WWAN device might be considered an untrusted device by some platforms, therefore add an option to add the same `DmaProperty` to the WWAN _DSD. BUG=b:215424986 BRANCH=brya TEST=dump SSDT, see new property Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Change-Id: If485ac5314fae6e6faefac43fcfcea4f4cdd02c0 --- M src/drivers/wwan/fm/acpi_fm350gl.c M src/drivers/wwan/fm/chip.h 2 files changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/62436/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/62436 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If485ac5314fae6e6faefac43fcfcea4f4cdd02c0 Gerrit-Change-Number: 62436 Gerrit-PatchSet: 3 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: drivers/{pcie,wifi}/generic: Update untrusted property name
by Tim Wawrzynczak (Code Review) 03 Mar '22

03 Mar '22

Tim Wawrzynczak has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62435 ) Change subject: drivers/{pcie,wifi}/generic: Update untrusted property name ...................................................................... drivers/{pcie,wifi}/generic: Update untrusted property name In order to align with established standards for establishing DMA boundaries[1] from ACPI, the UntrustedDevice property has been renamed to DmaProperty, which follows Microsoft's implementation. After discussions with Microsoft, they have agreed to make the `UID` property optional, so it is left out here, and instead it can be applied to: 1) Internal PCI devices 2) PCIe root ports 3) Downstream PCI(e) devices [1]: https://docs.microsoft.com/en-us/windows-hardware/drivers/pci/dsd-for-pcie-… BUG=b:215424986 Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Change-Id: Id70e916532e3d3d70305fc61473da28c702fc397 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62435 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> --- M src/drivers/pcie/generic/Kconfig M src/drivers/pcie/generic/generic.c M src/drivers/wifi/generic/acpi.c M src/drivers/wifi/generic/chip.h 4 files changed, 7 insertions(+), 8 deletions(-) Approvals: build bot (Jenkins): Verified EricR Lai: Looks good to me, approved diff --git a/src/drivers/pcie/generic/Kconfig b/src/drivers/pcie/generic/Kconfig index 2a68708..f41f37d 100644 --- a/src/drivers/pcie/generic/Kconfig +++ b/src/drivers/pcie/generic/Kconfig @@ -5,7 +5,6 @@ help This driver allows attaching arbitrary ACPI properties to arbitrary PCI root ports or devices. Currently it supports one - property, "UntrustedDevice". This property indicates to the - operating system that the PCIe device may be considered - untrusted, and appropriate policies, e.g. IOMMU isolation, - should take place. + property, "DmaProperty", which indicates to the operating system that + the PCIe device may be considered untrusted, and appropriate policies, + e.g. IOMMU isolation, should take place. diff --git a/src/drivers/pcie/generic/generic.c b/src/drivers/pcie/generic/generic.c index 2daebda..c14628f 100644 --- a/src/drivers/pcie/generic/generic.c +++ b/src/drivers/pcie/generic/generic.c @@ -34,7 +34,7 @@ acpigen_write_ADR_pci_device(dev); dsd = acpi_dp_new_table("_DSD"); - acpi_dp_add_integer(dsd, "UntrustedDevice", 1); + acpi_dp_add_integer(dsd, "DmaProperty", 1); acpi_dp_write(dsd); acpigen_write_device_end(); diff --git a/src/drivers/wifi/generic/acpi.c b/src/drivers/wifi/generic/acpi.c index 7c606f9..16c1839 100644 --- a/src/drivers/wifi/generic/acpi.c +++ b/src/drivers/wifi/generic/acpi.c @@ -515,13 +515,13 @@ /* Wake capabilities */ acpigen_write_PRW(config->wake, ACPI_S3); - /* Add _DSD for UntrustedDevice property. */ + /* Add _DSD for DmaProperty property. */ if (config->is_untrusted) { struct acpi_dp *dsd, *pkg; dsd = acpi_dp_new_table("_DSD"); pkg = acpi_dp_new_table(ACPI_DSD_UNTRUSTED_UUID); - acpi_dp_add_integer(pkg, "UntrustedDevice", 1); + acpi_dp_add_integer(pkg, "DmaProperty", 1); acpi_dp_add_package(dsd, pkg); acpi_dp_write(dsd); } diff --git a/src/drivers/wifi/generic/chip.h b/src/drivers/wifi/generic/chip.h index 35726f2..907b260 100644 --- a/src/drivers/wifi/generic/chip.h +++ b/src/drivers/wifi/generic/chip.h @@ -10,7 +10,7 @@ struct drivers_wifi_generic_config { unsigned int wake; /* When set to true, this will add a _DSD which contains a single - property, `UntrustedDevice`, set to 1, to the ACPI Device. */ + property, `DmaProperty`, set to 1, under the ACPI Device. */ bool is_untrusted; }; -- To view, visit https://review.coreboot.org/c/coreboot/+/62435 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id70e916532e3d3d70305fc61473da28c702fc397 Gerrit-Change-Number: 62435 Gerrit-PatchSet: 3 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/brya/var/redrix{4es}: Correct the unused USB2/TCSS port
by Tim Wawrzynczak (Code Review) 03 Mar '22

03 Mar '22

Attention is currently required from: Marx Wang, Chen Wisley. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62564 ) Change subject: mb/google/brya/var/redrix{4es}: Correct the unused USB2/TCSS port ...................................................................... Patch Set 1: Code-Review+1 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/62564/comment/1d05e075_96cfcac2 PS1, Line 8: So I think this is due to `commit 03c0853f4d58c73` could you add that here, e.g. ``` Commit 03c0853f4d58c73 accidentally set the Bluetooth USB2 port to "empty", therefore re-enable USB2 port 9. ``` https://review.coreboot.org/c/coreboot/+/62564/comment/ce06f150_a36c9f82 PS1, Line 12: 2. disable TCSS PCIe port1 Since this is separate from fixing the "broken" commit, I think this should go in a separate commit -- To view, visit https://review.coreboot.org/c/coreboot/+/62564 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie94ef847fc130019f1e06983fc5039f1f564cd3a Gerrit-Change-Number: 62564 Gerrit-PatchSet: 1 Gerrit-Owner: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-Reviewer: Marx Wang <marx.wang(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Marx Wang <marx.wang(a)intel.com> Gerrit-Attention: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-Comment-Date: Thu, 03 Mar 2022 20:44:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: Revert "mb/google/brya/var/taeko: Fix PLD group order (W/A)"
by Tim Wawrzynczak (Code Review) 03 Mar '22

03 Mar '22

Attention is currently required from: Kevin Chang, YH Lin. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62565 ) Change subject: Revert "mb/google/brya/var/taeko: Fix PLD group order (W/A)" ...................................................................... Patch Set 1: Code-Review+2 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/62565/comment/bc44fdf2_a8682cc3 PS1, Line 10: : This issue fix by OS that revert core boot work around. : suggestion: ``` This issue was fixed in the OS, therefore the workaround can be reverted. ``` https://review.coreboot.org/c/coreboot/+/62565/comment/d857bb5d_d100afa1 PS1, Line 14: none `firmware-brya-14505.B` -- To view, visit https://review.coreboot.org/c/coreboot/+/62565 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic836e0cf53c2f9d30bd12851be285d864b2256b8 Gerrit-Change-Number: 62565 Gerrit-PatchSet: 1 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-CC: Melo Chuang <melo.chuang(a)lcfc.corp-partner.google.com> Gerrit-CC: Rasheed Hsueh <rasheed.hsueh(a)lcfc.corp-partner.google.com> Gerrit-CC: Sunshine Chao <sunshine.chao(a)lcfc.corp-partner.google.com> Gerrit-Attention: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)chromium.org> Gerrit-Comment-Date: Thu, 03 Mar 2022 20:38:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brask/variants/moli: Change DDR4 Interleave to Non-Interleave
by Tim Wawrzynczak (Code Review) 03 Mar '22

03 Mar '22

Attention is currently required from: YH Lin, Zoey Wu, Zhuohao Lee, Felix Held. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62478 ) Change subject: mb/google/brask/variants/moli: Change DDR4 Interleave to Non-Interleave ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/62478 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iab153f16a3b729e7fa9daaa3dbfbccc70e6d789d Gerrit-Change-Number: 62478 Gerrit-PatchSet: 5 Gerrit-Owner: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.com> Gerrit-CC: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Peter Chi <peter_chi(a)wistron.corp-partner.google.com> Gerrit-CC: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 03 Mar 2022 20:37:45 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit March 2022