coreboot-gerrit March 2022

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Change in coreboot[master]: coreboot_tables.c: Expose the ACPI RSDP
by Tim Wawrzynczak (Code Review) 03 Mar '22

03 Mar '22

Attention is currently required from: Lance Zhao, Nico Huber. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62573 ) Change subject: coreboot_tables.c: Expose the ACPI RSDP ...................................................................... Patch Set 1: (1 comment) File src/commonlib/include/commonlib/coreboot_tables.h: https://review.coreboot.org/c/coreboot/+/62573/comment/5b6dc6b6_84850b71 PS1, Line 586: uint64_t > Usually `lb_uint64` and no `__packed`. I don't like either way actually […] Could start now.... hto{bl}e64() is available here, and libpayload has {bl}etoh functions.... -- To view, visit https://review.coreboot.org/c/coreboot/+/62573 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I591312a2c48f0cbbb03b2787e4b365e9c932afff Gerrit-Change-Number: 62573 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lance Zhao Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Thu, 03 Mar 2022 22:14:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in coreboot[master]: cbfstool/linux_trampoline: Fill the ACPI RSDP entry
by build bot (Jenkins) (Code Review) 03 Mar '22

03 Mar '22

Attention is currently required from: Arthur Heymans, ron minnich. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62574 ) Change subject: cbfstool/linux_trampoline: Fill the ACPI RSDP entry ...................................................................... Patch Set 3: Verified-1 (15 comments) File util/cbfstool/linux_trampoline.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143063): https://review.coreboot.org/c/coreboot/+/62574/comment/f4f10eef_6f96751a PS3, Line 6: 0xcb, 0x0f, 0x84, 0xc3, 0x00, 0x00, 0x00, 0x8b, 0x59, 0x04, 0x01, 0xcb, 0x8b, 0x49, 0x14, 0x83, line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143063): https://review.coreboot.org/c/coreboot/+/62574/comment/cda8b626_83288745 PS3, Line 6: 0xcb, 0x0f, 0x84, 0xc3, 0x00, 0x00, 0x00, 0x8b, 0x59, 0x04, 0x01, 0xcb, 0x8b, 0x49, 0x14, 0x83, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143063): https://review.coreboot.org/c/coreboot/+/62574/comment/718bca51_34be6753 PS3, Line 11: 0xe8, 0x01, 0x09, 0x00, 0xbf, 0xd0, 0x02, 0x09, 0x00, 0x83, 0xf8, 0x00, 0x74, 0x2d, 0x83, 0x7f, line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143063): https://review.coreboot.org/c/coreboot/+/62574/comment/d758fb83_bec21556 PS3, Line 11: 0xe8, 0x01, 0x09, 0x00, 0xbf, 0xd0, 0x02, 0x09, 0x00, 0x83, 0xf8, 0x00, 0x74, 0x2d, 0x83, 0x7f, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143063): https://review.coreboot.org/c/coreboot/+/62574/comment/455e8a49_5f9b517a PS3, Line 13: 0xe8, 0x83, 0x3b, 0x43, 0x75, 0x10, 0x8b, 0x43, 0x08, 0xa3, 0x70, 0x00, 0x09, 0x00, 0x8b, 0x43, line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143063): https://review.coreboot.org/c/coreboot/+/62574/comment/1ec9133e_6d61e775 PS3, Line 13: 0xe8, 0x83, 0x3b, 0x43, 0x75, 0x10, 0x8b, 0x43, 0x08, 0xa3, 0x70, 0x00, 0x09, 0x00, 0x8b, 0x43, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143063): https://review.coreboot.org/c/coreboot/+/62574/comment/b207731e_47b8ad7c PS3, Line 14: 0x0c, 0xa3, 0x74, 0x00, 0x09, 0x00, 0x83, 0x3b, 0x12, 0x75, 0x00, 0x03, 0x5b, 0x04, 0x49, 0x0f, line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143063): https://review.coreboot.org/c/coreboot/+/62574/comment/05dea68b_d5831df7 PS3, Line 14: 0x0c, 0xa3, 0x74, 0x00, 0x09, 0x00, 0x83, 0x3b, 0x12, 0x75, 0x00, 0x03, 0x5b, 0x04, 0x49, 0x0f, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143063): https://review.coreboot.org/c/coreboot/+/62574/comment/662d0009_eb22ae67 PS3, Line 15: 0x85, 0x7a, 0xff, 0xff, 0xff, 0xb8, 0x00, 0x00, 0x04, 0x00, 0xc7, 0x40, 0x10, 0xff, 0xff, 0x00, line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143063): https://review.coreboot.org/c/coreboot/+/62574/comment/d0540152_8fcfa3bd PS3, Line 15: 0x85, 0x7a, 0xff, 0xff, 0xff, 0xb8, 0x00, 0x00, 0x04, 0x00, 0xc7, 0x40, 0x10, 0xff, 0xff, 0x00, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143063): https://review.coreboot.org/c/coreboot/+/62574/comment/b41651aa_4352a001 PS3, Line 16: 0x00, 0xc7, 0x40, 0x14, 0x00, 0x9b, 0xcf, 0x00, 0xc7, 0x40, 0x18, 0xff, 0xff, 0x00, 0x00, 0xc7, line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143063): https://review.coreboot.org/c/coreboot/+/62574/comment/2dbcd216_bf56015c PS3, Line 16: 0x00, 0xc7, 0x40, 0x14, 0x00, 0x9b, 0xcf, 0x00, 0xc7, 0x40, 0x18, 0xff, 0xff, 0x00, 0x00, 0xc7, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143063): https://review.coreboot.org/c/coreboot/+/62574/comment/84b3b3ff_2cf1d525 PS3, Line 17: 0x40, 0x1c, 0x00, 0x93, 0xcf, 0x00, 0xc6, 0x00, 0x2b, 0x89, 0x40, 0x02, 0x0f, 0x01, 0x10, 0xbe, line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143063): https://review.coreboot.org/c/coreboot/+/62574/comment/77df8895_a7488978 PS3, Line 17: 0x40, 0x1c, 0x00, 0x93, 0xcf, 0x00, 0xc6, 0x00, 0x2b, 0x89, 0x40, 0x02, 0x0f, 0x01, 0x10, 0xbe, please, no spaces at the start of a line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143063): https://review.coreboot.org/c/coreboot/+/62574/comment/5465a572_b5ce2dee PS3, Line 18: 0x00, 0x00, 0x09, 0x00, 0xff, 0x25, 0x14, 0x02, 0x09, 0x00, 0xf4, 0xeb, 0xfd please, no spaces at the start of a line -- To view, visit https://review.coreboot.org/c/coreboot/+/62574 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I688b94608b03b0177c42d2834c7e3beb802ae686 Gerrit-Change-Number: 62574 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-Comment-Date: Thu, 03 Mar 2022 22:13:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: coreboot_tables.c: Expose the ACPI RSDP
by Arthur Heymans (Code Review) 03 Mar '22

03 Mar '22

Attention is currently required from: Lance Zhao, Nico Huber, Tim Wawrzynczak. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62573 ) Change subject: coreboot_tables.c: Expose the ACPI RSDP ...................................................................... Patch Set 1: (4 comments) File src/acpi/acpi.c: https://review.coreboot.org/c/coreboot/+/62573/comment/6d25dff8_e706d607 PS1, Line 1591: uintptr_t coreboot_rsdp; > um, static? Done File src/commonlib/include/commonlib/coreboot_tables.h: https://review.coreboot.org/c/coreboot/+/62573/comment/8fec3a8e_cae1ff15 PS1, Line 586: uint64_t > Usually `lb_uint64` and no `__packed`. I don't like either way actually […] Done File src/include/acpi/acpi.h: https://review.coreboot.org/c/coreboot/+/62573/comment/7ef95564_1b3c54d3 PS1, Line 57: uintptr_t get_coreboot_rsdp(void); > Maybe don't mix this with #defines, or add some blank lines. Looks a bit […] Done File src/lib/coreboot_table.c: https://review.coreboot.org/c/coreboot/+/62573/comment/ccc8d7a0_7d9282a7 PS1, Line 537: lb_add_acpi_rsdp(head); > I guess this will need something like `if (CONFIG(ACPI))`. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/62573 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I591312a2c48f0cbbb03b2787e4b365e9c932afff Gerrit-Change-Number: 62573 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lance Zhao Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Thu, 03 Mar 2022 22:13:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in coreboot[master]: coreboot_tables.c: Expose the ACPI RSDP
by Arthur Heymans (Code Review) 03 Mar '22

03 Mar '22

Attention is currently required from: Arthur Heymans, Lance Zhao, Tim Wawrzynczak. Hello Lance Zhao, Nico Huber, Tim Wawrzynczak, Arthur Heymans, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/62573 to look at the new patch set (#2). Change subject: coreboot_tables.c: Expose the ACPI RSDP ...................................................................... coreboot_tables.c: Expose the ACPI RSDP The ACPI RSDP can only be found in: - legacy BIOS region - via UEFI service On some systems like ARM that legacy BIOS region is not an option, so to avoid needing UEFI it makes sense to expose the RSDP via a coreboot table entry. Change-Id: I591312a2c48f0cbbb03b2787e4b365e9c932afff Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/acpi/acpi.c M src/commonlib/include/commonlib/coreboot_tables.h M src/include/acpi/acpi.h M src/lib/coreboot_table.c 4 files changed, 35 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/62573/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/62573 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I591312a2c48f0cbbb03b2787e4b365e9c932afff Gerrit-Change-Number: 62573 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Lance Zhao Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: cbfstool/linux_trampoline: Fill the ACPI RSDP entry
by Nico Huber (Code Review) 03 Mar '22

03 Mar '22

Attention is currently required from: Arthur Heymans, ron minnich. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62574 ) Change subject: cbfstool/linux_trampoline: Fill the ACPI RSDP entry ...................................................................... Patch Set 2: Code-Review+1 (2 comments) File util/cbfstool/linux_trampoline.S: https://review.coreboot.org/c/coreboot/+/62574/comment/540872bb_b512770e PS2, Line 97: ACPI_RSDP_ADDR Was this location unused in earlier zero page versions? i.e. no version check needed? https://review.coreboot.org/c/coreboot/+/62574/comment/fb174a22_9a1b863a PS2, Line 100: `jmp .endScan` I guess? This is a path where we know the next `cmp` will fail, right? -- To view, visit https://review.coreboot.org/c/coreboot/+/62574 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I688b94608b03b0177c42d2834c7e3beb802ae686 Gerrit-Change-Number: 62574 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-Comment-Date: Thu, 03 Mar 2022 22:13:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: coreboot_tables.c: Expose the ACPI RSDP
by Nico Huber (Code Review) 03 Mar '22

03 Mar '22

Attention is currently required from: Arthur Heymans, Lance Zhao, Tim Wawrzynczak. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62573 ) Change subject: coreboot_tables.c: Expose the ACPI RSDP ...................................................................... Patch Set 1: (1 comment) File src/commonlib/include/commonlib/coreboot_tables.h: https://review.coreboot.org/c/coreboot/+/62573/comment/84d872a9_63b9619d PS1, Line 586: uint64_t Usually `lb_uint64` and no `__packed`. I don't like either way actually (proper (de)serialization can spare us bug hunting). -- To view, visit https://review.coreboot.org/c/coreboot/+/62573 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I591312a2c48f0cbbb03b2787e4b365e9c932afff Gerrit-Change-Number: 62573 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Lance Zhao Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Thu, 03 Mar 2022 22:01:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: libpayload: Parse the ACPI RSDP table entry
by Arthur Heymans (Code Review) 03 Mar '22

03 Mar '22

Attention is currently required from: Arthur Heymans. Hello Arthur Heymans, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/62576 to review the following change. Change subject: libpayload: Parse the ACPI RSDP table entry ...................................................................... libpayload: Parse the ACPI RSDP table entry Change-Id: I583cda63c3f0b58f8d198ed5ecea7c4619c7a897 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M payloads/libpayload/include/coreboot_tables.h M payloads/libpayload/include/sysinfo.h M payloads/libpayload/libc/coreboot.c 3 files changed, 21 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/62576/1 diff --git a/payloads/libpayload/include/coreboot_tables.h b/payloads/libpayload/include/coreboot_tables.h index 3fd3fc8..0e0078f 100644 --- a/payloads/libpayload/include/coreboot_tables.h +++ b/payloads/libpayload/include/coreboot_tables.h @@ -83,6 +83,7 @@ CB_TAG_BOARD_CONFIG = 0x0040, CB_TAG_ACPI_CNVS = 0x0041, CB_TAG_TYPE_C_INFO = 0x0042, + CB_TAG_ACPI_RSDP = 0x0043, CB_TAG_CMOS_OPTION_TABLE = 0x00c8, CB_TAG_OPTION = 0x00c9, CB_TAG_OPTION_ENUM = 0x00ca, @@ -422,6 +423,16 @@ u32 type; }; +/* + * Handoff the ACPI RSDP + */ +struct cb_acpi_rsdp { + uint32_t tag; + uint32_t size; + uint64_t rsdp_pointer; /* Address of the ACPI RSDP */ +} __packed; + + /* Helpful inlines */ static inline u64 cb_unpack64(struct cbuint64 val) diff --git a/payloads/libpayload/include/sysinfo.h b/payloads/libpayload/include/sysinfo.h index 376f298..d0afde8 100644 --- a/payloads/libpayload/include/sysinfo.h +++ b/payloads/libpayload/include/sysinfo.h @@ -110,6 +110,7 @@ uintptr_t mrc_cache; uintptr_t acpi_gnvs; uintptr_t acpi_cnvs; + uintptr_t acpi_rsdp; #define UNDEFINED_STRAPPING_ID (~0) #define UNDEFINED_FW_CONFIG ~((uint64_t)0) diff --git a/payloads/libpayload/libc/coreboot.c b/payloads/libpayload/libc/coreboot.c index 72d7664..9a6b9e2 100644 --- a/payloads/libpayload/libc/coreboot.c +++ b/payloads/libpayload/libc/coreboot.c @@ -265,6 +265,12 @@ } } +static void cb_parse_rsdp(void *ptr, struct sysinfo_t *info) +{ + const struct cb_acpi_rsdp *cb_acpi_rsdp = ptr; + info->acpi_rsdp = cb_acpi_rsdp->rsdp_pointer; +} + int cb_parse_header(void *addr, int len, struct sysinfo_t *info) { struct cb_header *header; @@ -405,6 +411,9 @@ cb_parse_tsc_info(ptr, info); break; #endif + case CB_TAG_ACPI_RSDP: + cb_parse_rsdp(ptr, info); + break; default: cb_parse_arch_specific(rec, info); break; -- To view, visit https://review.coreboot.org/c/coreboot/+/62576 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I583cda63c3f0b58f8d198ed5ecea7c4619c7a897 Gerrit-Change-Number: 62576 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/brya: Move ACPI MPTS method from DSDT to SSDT for Brya and ...
by Tim Wawrzynczak (Code Review) 03 Mar '22

03 Mar '22

Attention is currently required from: Bora Guvendik, Cliff Huang, Selma Bensaid, Paul Menzel. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61887 ) Change subject: mb/google/brya: Move ACPI MPTS method from DSDT to SSDT for Brya and Redrix ...................................................................... Patch Set 12: Code-Review+2 (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/61887/comment/b1110283_2696c4bf PS12, Line 24: MPST `MPTS` Patchset: PS12: Thanks Cliff! 😊 File src/mainboard/google/brya/mainboard.c: https://review.coreboot.org/c/coreboot/+/61887/comment/c4ff0bc4_0149d4db PS12, Line 71: cpi_device_path_join(parent, "RTD3._STA") > The returned rtd3 dev path is with PXSX instead: […] Oh yes you're right the RTD3 name is implicit... oh well, this is mainboard code, so we are more free to make assumptions if we must... -- To view, visit https://review.coreboot.org/c/coreboot/+/61887 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0f0b7638e90a7862173fca99305398bb250373e9 Gerrit-Change-Number: 61887 Gerrit-PatchSet: 12 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Cliff Huang <cliff.huang(a)intel.corp-partner.google.com> Gerrit-CC: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Thu, 03 Mar 2022 21:59:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: coreboot_tables.c: Expose the ACPI RSDP
by Nico Huber (Code Review) 03 Mar '22

03 Mar '22

Attention is currently required from: Arthur Heymans, Lance Zhao, Tim Wawrzynczak. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62573 ) Change subject: coreboot_tables.c: Expose the ACPI RSDP ...................................................................... Patch Set 1: Code-Review+1 (3 comments) File src/acpi/acpi.c: https://review.coreboot.org/c/coreboot/+/62573/comment/5441552a_eeced963 PS1, Line 1591: uintptr_t coreboot_rsdp; um, static? File src/include/acpi/acpi.h: https://review.coreboot.org/c/coreboot/+/62573/comment/c4757c80_3535bbc6 PS1, Line 57: uintptr_t get_coreboot_rsdp(void); Maybe don't mix this with #defines, or add some blank lines. Looks a bit odd this way. File src/lib/coreboot_table.c: https://review.coreboot.org/c/coreboot/+/62573/comment/4d16e669_b8145bd9 PS1, Line 537: lb_add_acpi_rsdp(head); I guess this will need something like `if (CONFIG(ACPI))`. -- To view, visit https://review.coreboot.org/c/coreboot/+/62573 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I591312a2c48f0cbbb03b2787e4b365e9c932afff Gerrit-Change-Number: 62573 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Lance Zhao Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Thu, 03 Mar 2022 21:58:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: payloads/seabios: Update stable version to 1.16.0
by Felix Singer (Code Review) 03 Mar '22

03 Mar '22

Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/62575 ) Change subject: payloads/seabios: Update stable version to 1.16.0 ...................................................................... payloads/seabios: Update stable version to 1.16.0 SeaBIOS 1.16.0 was released on March 2nd. Thus, update the stable version from 1.14.0 to 1.16.0. Change-Id: I475a9be47171bfbe3b3c2d4d1d14bb753d8575a8 Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M payloads/external/SeaBIOS/Kconfig M payloads/external/SeaBIOS/Makefile 2 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/62575/1 diff --git a/payloads/external/SeaBIOS/Kconfig b/payloads/external/SeaBIOS/Kconfig index 9aea2d0..d7dd165 100644 --- a/payloads/external/SeaBIOS/Kconfig +++ b/payloads/external/SeaBIOS/Kconfig @@ -5,7 +5,7 @@ default SEABIOS_STABLE config SEABIOS_STABLE - bool "1.14.0" + bool "1.16.0" help Stable SeaBIOS version config SEABIOS_MASTER diff --git a/payloads/external/SeaBIOS/Makefile b/payloads/external/SeaBIOS/Makefile index cdcd426..502f4ea 100644 --- a/payloads/external/SeaBIOS/Makefile +++ b/payloads/external/SeaBIOS/Makefile @@ -1,5 +1,5 @@ TAG-$(CONFIG_SEABIOS_MASTER)=origin/master -TAG-$(CONFIG_SEABIOS_STABLE)=155821a1990b6de78dde5f98fa5ab90e802021e0 +TAG-$(CONFIG_SEABIOS_STABLE)=d239552ce7220e448ae81f41515138f7b9e3c4db TAG-$(CONFIG_SEABIOS_REVISION)=$(CONFIG_SEABIOS_REVISION_ID) project_git_repo=https://review.coreboot.org/seabios.git -- To view, visit https://review.coreboot.org/c/coreboot/+/62575 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I475a9be47171bfbe3b3c2d4d1d14bb753d8575a8 Gerrit-Change-Number: 62575 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: newchange

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coreboot-gerrit March 2022