coreboot-gerrit March 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: Revert "soc/intel/alderlake: Define Kconfigs for Descriptor Region"
by Tim Wawrzynczak (Code Review) 28 Mar '22

28 Mar '22

Attention is currently required from: Sridhar Siricilla, Arthur Heymans. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63140 ) Change subject: Revert "soc/intel/alderlake: Define Kconfigs for Descriptor Region" ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63140 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4529329d20f02a5a2aafe7a2ef08289a2faf2fbf Gerrit-Change-Number: 63140 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Mon, 28 Mar 2022 15:06:05 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: Revert "soc/intel/alderlake: Use Kconfigs for Descriptor Region"
by Tim Wawrzynczak (Code Review) 28 Mar '22

28 Mar '22

Attention is currently required from: Sridhar Siricilla, Arthur Heymans. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63139 ) Change subject: Revert "soc/intel/alderlake: Use Kconfigs for Descriptor Region" ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63139 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie858341f0723a6b278ea53960f1e09b37bc82d83 Gerrit-Change-Number: 63139 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Mon, 28 Mar 2022 15:06:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: util/sconfig: Fix for multidomain support sconfig/devicetree.cb
by Mariusz Szafrański (Code Review) 28 Mar '22

28 Mar '22

Attention is currently required from: Furquan Shaikh, Martin Roth, Mariusz Szafrański, Jonathan Zhang, Angel Pons, Michal Motyl. Hello build bot (Jenkins), Furquan Shaikh, Martin Roth, Jonathan Zhang, Suresh Bellampalli, Subrata Banik, Angel Pons, Michal Motyl, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/51180 to look at the new patch set (#4). Change subject: util/sconfig: Fix for multidomain support sconfig/devicetree.cb ...................................................................... util/sconfig: Fix for multidomain support sconfig/devicetree.cb Fixes sconfig related build errors while there exists DEV.FUNC number shared by two devices from different domains (root buses) i.e. device domain 0 on device pci 00.0 on end ....... end device domain 1 on device pci 00.0 on end ....... end Two domains (each with its own root PCI bus) and device with 00.0 exists on both buses. Tested on PoC code for unreleased SoC based on multidomain concept CB:56263 Change-Id: Idd639d0cb3ed1a49ed7c7b1c77ac747ba6f77672 Signed-off-by: Mariusz Szafranski <mariuszx.szafranski(a)intel.com> --- M util/sconfig/main.c 1 file changed, 9 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/51180/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/51180 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idd639d0cb3ed1a49ed7c7b1c77ac747ba6f77672 Gerrit-Change-Number: 51180 Gerrit-PatchSet: 4 Gerrit-Owner: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/amd/sabrina: Add espi_switch_to_spi2_pads
by Raul Rangel (Code Review) 28 Mar '22

28 Mar '22

Attention is currently required from: Jason Glenesk, Marshall Dawson, Fred Reitberger, Karthik Ramasubramanian, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63095 ) Change subject: soc/amd/sabrina: Add espi_switch_to_spi2_pads ...................................................................... Patch Set 4: (1 comment) File src/soc/amd/sabrina/espi_util.c: https://review.coreboot.org/c/coreboot/+/63095/comment/4ad1aaa6_4e517b26 PS4, Line 13: 2 > shouldn't this be spi1? I copied the name from Cezanne. I agree though it is confusing... -- To view, visit https://review.coreboot.org/c/coreboot/+/63095 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I96baf6b9c169ed61d221352b29ac676bca40da21 Gerrit-Change-Number: 63095 Gerrit-PatchSet: 4 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 28 Mar 2022 15:01:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/sabrina/Kconfig: update SOC_AMD_COMMON_BLOCK_UCODE_SIZE
by Marshall Dawson (Code Review) 28 Mar '22

28 Mar '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Felix Held. Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63127 ) Change subject: soc/amd/sabrina/Kconfig: update SOC_AMD_COMMON_BLOCK_UCODE_SIZE ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63127 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I12209d523096781195ba8957ec797d8c80eecbe5 Gerrit-Change-Number: 63127 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 28 Mar 2022 14:47:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake/pmc_descriptor.c: Don't depend on FMAP
by Tim Wawrzynczak (Code Review) 28 Mar '22

28 Mar '22

Attention is currently required from: Sridhar Siricilla, Arthur Heymans. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63141 ) Change subject: soc/intel/alderlake/pmc_descriptor.c: Don't depend on FMAP ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Sridhar, do you think the ADLRVP build still required the A0 PMC descriptor change as well? Can we just drop the support from coreboot? Seems unlikely to me that any new RVPs would be built with such early silicon -- To view, visit https://review.coreboot.org/c/coreboot/+/63141 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2d180353bfd69601ce03feb59101fb425859e779 Gerrit-Change-Number: 63141 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Mon, 28 Mar 2022 14:44:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Add support to control coreboot and Intel SoC features
by Arthur Heymans (Code Review) 28 Mar '22

28 Mar '22

Attention is currently required from: Nico Huber, Subrata Banik, Sridhar Siricilla, Patrick Rudolph. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61380 ) Change subject: soc/intel/common: Add support to control coreboot and Intel SoC features ...................................................................... Patch Set 16: (1 comment) File src/soc/intel/common/basecode/debug/debug_feature.c: https://review.coreboot.org/c/coreboot/+/61380/comment/0d73f60e_48fe074b PS16, Line 25: CONFIG_SI_DESC_REGION I don't think depending on FMAP is necessary here. Please see CB:63141 -- To view, visit https://review.coreboot.org/c/coreboot/+/61380 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5ba40926bd9ad909654f152e48cdd648b28afd62 Gerrit-Change-Number: 61380 Gerrit-PatchSet: 16 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 28 Mar 2022 14:43:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake/pmc_descriptor.c: Don't depend on FMAP
by Arthur Heymans (Code Review) 28 Mar '22

28 Mar '22

Attention is currently required from: Tim Wawrzynczak. Hello Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63141 to look at the new patch set (#2). Change subject: soc/intel/alderlake/pmc_descriptor.c: Don't depend on FMAP ...................................................................... soc/intel/alderlake/pmc_descriptor.c: Don't depend on FMAP The Intel descriptor region is always at the bottom of the flash so using a hardcoded 0 offset is fine. This allows the code to work with boards with SI_DESC in the fmap region. This is for instance the case with the autogenerated FMAP. Change-Id: I2d180353bfd69601ce03feb59101fb425859e779 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/soc/intel/alderlake/bootblock/pmc_descriptor.c 1 file changed, 13 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/63141/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63141 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2d180353bfd69601ce03feb59101fb425859e779 Gerrit-Change-Number: 63141 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/guybrush/var/dewatt: add specific SPD hex for dewatt
by Robert Zieba (Code Review) 28 Mar '22

28 Mar '22

Attention is currently required from: Chris Wang, Felix Held. Robert Zieba has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63132 ) Change subject: mb/google/guybrush/var/dewatt: add specific SPD hex for dewatt ...................................................................... Patch Set 4: (1 comment) File src/mainboard/google/guybrush/variants/dewatt/memory/Makefile.inc: https://review.coreboot.org/c/coreboot/+/63132/comment/0a45da97_be58d06f PS4, Line 16: SPD_SOURCES += $(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/memory/K4U6E3S4AB-MGCL.hex # ID = 9(0b1001) Parts = K4U6E3S4AB-MGCL Is there no way to update the memory_parts.json file to get the same effect? I'm concerned about this breaking if this ever gets overwritten by spd_tools. -- To view, visit https://review.coreboot.org/c/coreboot/+/63132 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia54726ce8c1bae46dcd4fed3df509ef184914e94 Gerrit-Change-Number: 63132 Gerrit-PatchSet: 4 Gerrit-Owner: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Robert Zieba <robertzieba(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 28 Mar 2022 14:37:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Add support to control CSE firmware update
by Arthur Heymans (Code Review) 28 Mar '22

28 Mar '22

Attention is currently required from: Subrata Banik, Rizwan Qureshi, Sridhar Siricilla, Patrick Rudolph. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62715 ) Change subject: soc/intel/common: Add support to control CSE firmware update ...................................................................... Patch Set 3: (1 comment) File src/soc/intel/common/basecode/debug/debug_feature.c: https://review.coreboot.org/c/coreboot/+/62715/comment/bb888f27_e71e6cfb PS3, Line 34: fmap_locate_area_as_rdev_rw Does fmap_locate_area_as_rdev work too? I'm not sure if this will attempt to use memory mapped medium, but it's worth the try as you don't seem to want to write to that region? -- To view, visit https://review.coreboot.org/c/coreboot/+/62715 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9f234b142191eb83137d5d83f21e890e1cb828ba Gerrit-Change-Number: 62715 Gerrit-PatchSet: 3 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 28 Mar 2022 14:18:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit March 2022