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Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63132 )
Change subject: mb/google/guybrush/var/dewatt: add specific SPD hex for dewatt
......................................................................
Patch Set 4:
(1 comment)
File src/mainboard/google/guybrush/variants/dewatt/memory/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/63132/comment/ef5d6b10_6d2d12ff
PS4, Line 16: SPD_SOURCES += $(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/memory/K4U6E3S4AB-MGCL.hex # ID = 9(0b1001) Parts = K4U6E3S4AB-MGCL
> +1. As is, this will get overwritten every time part_id_gen is run. We could modify apcb_v3_edit. […]
Sigh this is needing more one-off. For parts that need exclusive IDs, we can support part specific SPDs through update to part_id_gen.
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Change subject: mb/clevo/tgl-u: add new board L14xMU
......................................................................
Patch Set 14:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59548/comment/12e7b89c_a752dae7
PS14, Line 56: - WLAN/BT (PCIe) - gets detected but can't be enabled
> Could it be related to rfkill stuff?
yes, bc of the missing EC driver
File src/mainboard/clevo/tgl-u/Kconfig:
https://review.coreboot.org/c/coreboot/+/59548/comment/7c04602c_845eb4a7
PS13, Line 12: select MAINBOARD_HAS_LPC_TPM
> What if someone wants to use fTPM?
well, we have no means making that selectable for the user atm. We'll need to resolve that issue with fTPM when using recent vendor csme-regions, where we can add some Kconfig/cmos option for making it choosable for the user.
File src/mainboard/clevo/tgl-u/variants/l140mu/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/59548/comment/514e0b3d_febe1a3b
PS13, Line 147: device ref i2c1 on
> What is this used for?
TBT ROM, I'll add a comment
File src/mainboard/clevo/tgl-u/variants/l140mu/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/59548/comment/8d012fff_1c9fd8f3
PS14, Line 191: device ref peg on
> nit: I'd move this before `tbt_pcie_rp0`
why? it's a SSD slot like pcie_rp9, so grouping them makes more sense to me
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Arthur Heymans has uploaded a new patch set (#3) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/63034 )
Change subject: Docs/project_ideas: Implement the ARM BBR spec in coreboot
......................................................................
Docs/project_ideas: Implement the ARM BBR spec in coreboot
Change-Id: I0f5f1f0a613ed0ed3f8ecdf3c1330a0d78efe399
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M Documentation/contributing/project_ideas.md
1 file changed, 34 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/63034/3
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63034 )
Change subject: Docs/project_ideas: Make coreboot ARM BBR compliant
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/63034/comment/c177b9ea_ae839c06
PS2, Line 7: Make coreboot ARM BBR compliant
> Please update accordingly as per Julius' comment
Thanks. I only changed the actual file.
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Hello Igor Bagnucki,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/63144
to review the following change.
Change subject: src/console/Kconfig: Add option to disable loglevel prefix
......................................................................
src/console/Kconfig: Add option to disable loglevel prefix
Signed-off-by: Igor Bagnucki <igor.bagnucki(a)3mdeb.com>
Change-Id: I911bb601cf1933a4c6498b2ae1e4cb4d4bc85621
---
M src/console/Kconfig
M src/console/printk.c
2 files changed, 11 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/63144/1
diff --git a/src/console/Kconfig b/src/console/Kconfig
index 37d8fef..6152592 100644
--- a/src/console/Kconfig
+++ b/src/console/Kconfig
@@ -395,6 +395,15 @@
endif
+config CONSOLE_USE_LOGLEVEL_PREFIX
+ bool "Use loglevel prefix to indicate line loglevel"
+ default y
+ help
+ When enabled, if the code contains a:
+ `printk(BIOS_DEBUG, "This is a debug message!\n")`,
+ it will show up as:
+ `[DEBUG] This is a debug message!`
+
config CONSOLE_USE_ANSI_ESCAPES
bool "Use ANSI escape sequences for console highlighting"
default y
diff --git a/src/console/printk.c b/src/console/printk.c
index eb35c53..1ce2fad 100644
--- a/src/console/printk.c
+++ b/src/console/printk.c
@@ -96,7 +96,8 @@
and potentially an escape sequence for highlighting. */
if (CONFIG(CONSOLE_USE_ANSI_ESCAPES))
wrap_interactive_printf(BIOS_LOG_ESCAPE_PATTERN, bios_log_escape[state.level]);
- wrap_interactive_printf(BIOS_LOG_PREFIX_PATTERN, bios_log_prefix[state.level]);
+ if (CONFIG(CONSOLE_USE_LOGLEVEL_PREFIX))
+ wrap_interactive_printf(BIOS_LOG_PREFIX_PATTERN, bios_log_prefix[state.level]);
}
static void line_end(union log_state state)
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59548 )
Change subject: mb/clevo/tgl-u: add new board L14xMU
......................................................................
Patch Set 14: Code-Review+1
(6 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59548/comment/c0d4f064_da58bd3c
PS14, Line 56: - WLAN/BT (PCIe) - gets detected but can't be enabled
Could it be related to rfkill stuff?
File src/mainboard/clevo/tgl-u/Kconfig:
https://review.coreboot.org/c/coreboot/+/59548/comment/e37d525d_9d84d7f0
PS13, Line 12: select MAINBOARD_HAS_LPC_TPM
What if someone wants to use fTPM?
File src/mainboard/clevo/tgl-u/cmos.layout:
https://review.coreboot.org/c/coreboot/+/59548/comment/690d4341_b0e5682f
PS13, Line 20: 400 1 e 2 hyper_threading
Doesn't this conflict with century byte?
File src/mainboard/clevo/tgl-u/variants/l140mu/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/59548/comment/24f001a6_949736d2
PS13, Line 26: DdiPortAConfig
Looks like this should use an enum
https://review.coreboot.org/c/coreboot/+/59548/comment/18f99b7e_a7a3ab52
PS13, Line 147: device ref i2c1 on
What is this used for?
File src/mainboard/clevo/tgl-u/variants/l140mu/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/59548/comment/88ea0aae_898eed65
PS14, Line 191: device ref peg on
nit: I'd move this before `tbt_pcie_rp0`
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