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Change subject: mb/google/brya/variants/baseboard/brask: Turn off NFC power in S0ix
......................................................................
Patch Set 2:
(1 comment)
File src/mainboard/google/brya/variants/brask/variant.c:
https://review.coreboot.org/c/coreboot/+/63191/comment/37aa0c3b_ab0df62e
PS2, Line 7: #include <soc/gpio.h>
We probably can remove this.
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Change subject: qualcomm/sc7280: Add support for edp and mdp driver
......................................................................
qualcomm/sc7280: Add support for edp and mdp driver
- Add support for edp aux read and write.
- Update edp panel properties based on edid read.
- Configure edp controller and edp phy.
BUG=b:182963902,b:216687885
TEST=Validated on qualcomm sc7280 development board.
Signed-off-by: Vinod Polimera <quic_vpolimer(a)quicinc.com>
Change-Id: I6368e3064548eaead5046b5ca6cd31e1fd498187
---
M src/mainboard/google/herobrine/mainboard.c
M src/soc/qualcomm/sc7280/Kconfig
M src/soc/qualcomm/sc7280/Makefile.inc
A src/soc/qualcomm/sc7280/display/edp_aux.c
A src/soc/qualcomm/sc7280/display/edp_ctrl.c
A src/soc/qualcomm/sc7280/display/edp_phy_7nm.c
A src/soc/qualcomm/sc7280/display/mdss.c
A src/soc/qualcomm/sc7280/include/soc/display/edp_aux.h
A src/soc/qualcomm/sc7280/include/soc/display/edp_ctrl.h
A src/soc/qualcomm/sc7280/include/soc/display/edp_phy.h
A src/soc/qualcomm/sc7280/include/soc/display/edp_reg.h
A src/soc/qualcomm/sc7280/include/soc/display/mdssreg.h
12 files changed, 3,139 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/62370/5
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Change subject: soc/qualcomm/common: verify size of memchipinfo structure
......................................................................
soc/qualcomm/common: verify size of memchipinfo structure
BUG=b:182963902,b:177917361
TEST=Validated on qualcomm sc7280 development board
Signed-off-by: Ravi Kumar Bokka <rbokka(a)codeaurora.org>
Change-Id: I0d59669adaf287d0eb7b58ccb0fe3f98e3d23281
---
M src/commonlib/bsd/include/commonlib/bsd/mem_chip_info.h
M src/soc/qualcomm/common/qclib.c
2 files changed, 20 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/63026/3
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Frank Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63174 )
Change subject: mb/google/brya/var/banshee: Update the GPP_D12 as USB_C3_LSX_RX
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
Hi Google,
Could you review and merge the CL?
We would like to have the official CPFE FW for next build.
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Change subject: soc/mediatek/early_init: Fix function return type
......................................................................
Patch Set 2:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/63190/comment/000fd2b9_848c7df6
PS1, Line 7: soc/mediatek: Fix function type and initialize structure to zero
> soc/mediatek/early_init: Fix function return type
Done
https://review.coreboot.org/c/coreboot/+/63190/comment/026c92d3_a93216cc
PS1, Line 9: function type
> return type of early_init_get_elapsed_time_us()
Done
https://review.coreboot.org/c/coreboot/+/63190/comment/ee5ef75d_5c5175bd
PS1, Line 9: , and
: initialize structure to zero to replace memset.
> Move to a separate paragraph. […]
Done
File src/soc/mediatek/common/early_init.c:
https://review.coreboot.org/c/coreboot/+/63190/comment/1556367d_7902b03a
PS1, Line 34: early_init_get_elapsed_time_us
> What about the caller of this (perst_time_us and min_perst_time_us in soc/mediatek/common/pcie. […]
Right, Thanks!
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I'd like you to reexamine a change. Please visit
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Change subject: soc/mediatek/early_init: Fix function return type
......................................................................
soc/mediatek/early_init: Fix function return type
Fix return type of early_init_get_elapsed_time_us() to comply with the
data type of return value.
Also replace memset() with struct initializer.
Signed-off-by: Jianjun Wang <jianjun.wang(a)mediatek.com>
Fixes: commit 41faa22 (soc/mediatek: Add early_init for passing data
across stages)
Change-Id: I7c361828362c2dfec91358ad8a420f5360243da0
---
M src/soc/mediatek/common/early_init.c
M src/soc/mediatek/common/include/soc/early_init.h
M src/soc/mediatek/common/pcie.c
3 files changed, 5 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/63190/2
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Change subject: mb/google/brya/variants/baseboard/brask: Turn off NFC power in S0ix
......................................................................
mb/google/brya/variants/baseboard/brask: Turn off NFC power in S0ix
Turn off the NFC power which is controlled by GPP_D3 to save power in
S0ix states. For an USB device, the S0ix hook is needed for the on/off
operations to take place.
BUG=b:202737385
BRANCH=firmware-brya-14505.B
TEST=measure the voltage of GPP_D3 in S0ix states
Signed-off-by: Alan Huang <alan-huang(a)quanta.corp-partner.google.com>
Change-Id: I69588c82dfde1744c45c7aff3ac05b80bb16a8f3
---
M src/mainboard/google/brya/variants/brask/include/variant/gpio.h
M src/mainboard/google/brya/variants/brask/variant.c
2 files changed, 13 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/63191/2
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Jianjun Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56789 )
Change subject: libpayload/pci: Split PCI interfaces as common and chip related
......................................................................
Patch Set 37:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/56789/comment/488a0380_67129793
PS37, Line 7: libpayload/pci: Split PCI interfaces as common and chip related
> libpayload/pci: Add support for MMIO
Can we use "Add support for map bus"? It's more like we are adding map bus feature in this change.
MMIO sounds more like the ECAM that accesses the configuration space through MMIO space.
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Change subject: soc/mediatek: Fix function type and initialize structure to zero
......................................................................
Patch Set 1:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/63190/comment/c6c99fd6_d96ef2d2
PS1, Line 7: soc/mediatek: Fix function type and initialize structure to zero
soc/mediatek/early_init: Fix function return type
https://review.coreboot.org/c/coreboot/+/63190/comment/559807ca_8174aa6d
PS1, Line 9: function type
return type of early_init_get_elapsed_time_us()
https://review.coreboot.org/c/coreboot/+/63190/comment/438672b9_4b22a867
PS1, Line 9: , and
: initialize structure to zero to replace memset.
Move to a separate paragraph.
Also replace memset() with struct initializer.
File src/soc/mediatek/common/early_init.c:
https://review.coreboot.org/c/coreboot/+/63190/comment/a85e6ee9_ed494624
PS1, Line 34: early_init_get_elapsed_time_us
What about the caller of this (perst_time_us and min_perst_time_us in soc/mediatek/common/pcie.c)?
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