coreboot-gerrit March 2022

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Change in coreboot[master]: mb/google/brya/variants/baseboard/brask: Turn off NFC power in S0ix
by build bot (Jenkins) (Code Review) 30 Mar '22

30 Mar '22

Attention is currently required from: Tim Wawrzynczak, Eric Lai. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63191 ) Change subject: mb/google/brya/variants/baseboard/brask: Turn off NFC power in S0ix ...................................................................... Patch Set 1: (2 comments) File src/mainboard/google/brya/variants/brask/variant.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144974): https://review.coreboot.org/c/coreboot/+/63191/comment/670d100d_70f2dee4 PS1, Line 18: if (entry == S0IX_ENTRY) { braces {} are not necessary for single statement blocks Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144974): https://review.coreboot.org/c/coreboot/+/63191/comment/68a2dd10_79b79de9 PS1, Line 21: if (entry == S0IX_EXIT) { braces {} are not necessary for single statement blocks -- To view, visit https://review.coreboot.org/c/coreboot/+/63191 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I69588c82dfde1744c45c7aff3ac05b80bb16a8f3 Gerrit-Change-Number: 63191 Gerrit-PatchSet: 1 Gerrit-Owner: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Wed, 30 Mar 2022 01:57:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/variants/baseboard/brask: Turn off NFC power in S0ix
by Alan Huang (Code Review) 30 Mar '22

30 Mar '22

Alan Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63191 ) Change subject: mb/google/brya/variants/baseboard/brask: Turn off NFC power in S0ix ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/63191 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I69588c82dfde1744c45c7aff3ac05b80bb16a8f3 Gerrit-Change-Number: 63191 Gerrit-PatchSet: 1 Gerrit-Owner: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Wed, 30 Mar 2022 01:56:39 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/qualcomm/sc7280: Override SPI gpios drive strength
by Shelley Chen (Code Review) 30 Mar '22

30 Mar '22

Shelley Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63192 ) Change subject: soc/qualcomm/sc7280: Override SPI gpios drive strength ...................................................................... soc/qualcomm/sc7280: Override SPI gpios drive strength BUG=b:198627043 BRANCH=None TEST=Create a binary and EE helped verify Change-Id: Ic887a7eef74f1063f7284db042c5fbd2e1d5bd4c Signed-off-by: Shelley Chen <shchen(a)google.com> --- M src/soc/qualcomm/sc7280/bootblock.c 1 file changed, 11 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/63192/1 diff --git a/src/soc/qualcomm/sc7280/bootblock.c b/src/soc/qualcomm/sc7280/bootblock.c index 365b7d4..4d056c3 100644 --- a/src/soc/qualcomm/sc7280/bootblock.c +++ b/src/soc/qualcomm/sc7280/bootblock.c @@ -5,9 +5,20 @@ #include <soc/qspi_common.h> #include <soc/qupv3_config_common.h> +static void sc7280_override_gpios(void) +{ + gpio_configure(QSPI_DATA_0, GPIO_FUNC_QSPI_DATA_0, + GPIO_NO_PULL, GPIO_8MA, GPIO_OUTPUT); + + gpio_configure(QSPI_DATA_1, GPIO_FUNC_QSPI_DATA_1, + GPIO_NO_PULL, GPIO_8MA, GPIO_OUTPUT); + +} + void bootblock_soc_init(void) { clock_init(); quadspi_init(37500 * KHz); + sc7280_override_gpios(); qupv3_fw_init(); } -- To view, visit https://review.coreboot.org/c/coreboot/+/63192 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic887a7eef74f1063f7284db042c5fbd2e1d5bd4c Gerrit-Change-Number: 63192 Gerrit-PatchSet: 1 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/cherry: Add PCIe domain support for dojo
by Yu-Ping Wu (Code Review) 30 Mar '22

30 Mar '22

Attention is currently required from: Hung-Te Lin, Shelley Chen, Paul Menzel, Angel Pons, Jianjun Wang. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62360 ) Change subject: mb/google/cherry: Add PCIe domain support for dojo ...................................................................... Patch Set 27: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/62360 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifb02960504177fe488e6784b954c16b2c8d94972 Gerrit-Change-Number: 62360 Gerrit-PatchSet: 27 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Comment-Date: Wed, 30 Mar 2022 01:53:23 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in blobs[master]: Revert "soc/mediatek/mt8186: Update SPM firmware to pcm_suspend_v0215...
by Hung-Te Lin (Code Review) 30 Mar '22

30 Mar '22

Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/blobs/+/63097 ) Change subject: Revert "soc/mediatek/mt8186: Update SPM firmware to pcm_suspend_v0215_v10" ...................................................................... Patch Set 5: (1 comment) Patchset: PS5: > @paul, any suggestion? I'd assume the decision should be fine, especially no devices were shipped yet so we should not worry about users getting wrong blob. -- To view, visit https://review.coreboot.org/c/blobs/+/63097 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: blobs Gerrit-Branch: master Gerrit-Change-Id: I63923188b814f0b44690784b55bcec9aff9b3d23 Gerrit-Change-Number: 63097 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Wed, 30 Mar 2022 01:52:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

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Change in blobs[master]: Revert "soc/mediatek/mt8186: Update SPM firmware to pcm_suspend_v0215...
by Hung-Te Lin (Code Review) 30 Mar '22

30 Mar '22

Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/blobs/+/63097 ) Change subject: Revert "soc/mediatek/mt8186: Update SPM firmware to pcm_suspend_v0215_v10" ...................................................................... Revert "soc/mediatek/mt8186: Update SPM firmware to pcm_suspend_v0215_v10" This reverts commit d13ba18eb0daaa6d6cd708bb981ee0a562ac4789. Revert reason: CB:62327 was created to fix a suspend failure issue, where we disable 26M clock to bypass pmic wrap when suspending. However, it turns out that the root cause of the suspend issue is an incorrect pmif setting, which is fixed in CB:63089. Therefore, revert CB:62327 to enable 26M clock. BUG=b:215639203 TEST=test of suspend and resume pass. Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: I63923188b814f0b44690784b55bcec9aff9b3d23 --- M soc/mediatek/mt8186/spm_firmware.bin M soc/mediatek/mt8186/spm_firmware.bin.md5 M soc/mediatek/mt8186/spm_release_notes.txt 3 files changed, 1 insertion(+), 4 deletions(-) Approvals: Rex-BC Chen: Looks good to me, but someone else must approve Yu-Ping Wu: Verified; Looks good to me, approved diff --git a/soc/mediatek/mt8186/spm_firmware.bin b/soc/mediatek/mt8186/spm_firmware.bin index c1b2804..7e0ca8d 100644 --- a/soc/mediatek/mt8186/spm_firmware.bin +++ b/soc/mediatek/mt8186/spm_firmware.bin Binary files differ diff --git a/soc/mediatek/mt8186/spm_firmware.bin.md5 b/soc/mediatek/mt8186/spm_firmware.bin.md5 index 7d43cf2..910cf06 100644 --- a/soc/mediatek/mt8186/spm_firmware.bin.md5 +++ b/soc/mediatek/mt8186/spm_firmware.bin.md5 @@ -1 +1 @@ -265ce2c876ca4d6d7febe9cbcc2dd005 *spm_firmware.bin +7db456c2374b3a76daa9e6f0f2b4fd71 *spm_firmware.bin diff --git a/soc/mediatek/mt8186/spm_release_notes.txt b/soc/mediatek/mt8186/spm_release_notes.txt index 568e414..7d72463 100644 --- a/soc/mediatek/mt8186/spm_release_notes.txt +++ b/soc/mediatek/mt8186/spm_release_notes.txt @@ -1,7 +1,4 @@ ** Build from MediaTek Internal ** -# pcm_suspend_v0215_v10 -1. Disable 26MHz clock while suspending. - # pcm_suspend_mp_v1109 1. SPM suspend can turn 26M clock off when system goes into suspend. -- To view, visit https://review.coreboot.org/c/blobs/+/63097 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: blobs Gerrit-Branch: master Gerrit-Change-Id: I63923188b814f0b44690784b55bcec9aff9b3d23 Gerrit-Change-Number: 63097 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in blobs[master]: Revert "soc/mediatek/mt8186: Update SPM firmware to pcm_suspend_v0215...
by Hung-Te Lin (Code Review) 30 Mar '22

30 Mar '22

Attention is currently required from: Paul Menzel, Yu-Ping Wu. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/blobs/+/63097 ) Change subject: Revert "soc/mediatek/mt8186: Update SPM firmware to pcm_suspend_v0215_v10" ...................................................................... Patch Set 5: -Code-Review -- To view, visit https://review.coreboot.org/c/blobs/+/63097 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: blobs Gerrit-Branch: master Gerrit-Change-Id: I63923188b814f0b44690784b55bcec9aff9b3d23 Gerrit-Change-Number: 63097 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 30 Mar 2022 01:50:49 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: libpayload/pci: Split PCI interfaces as common and chip related
by Yu-Ping Wu (Code Review) 30 Mar '22

30 Mar '22

1 0

Change in coreboot[master]: libpayload/pci: Split PCI interfaces as common and chip related
by Yu-Ping Wu (Code Review) 30 Mar '22

30 Mar '22

1 0

Change in coreboot[master]: libpayload/pci: Split PCI interfaces as common and chip related
by Yu-Ping Wu (Code Review) 30 Mar '22

30 Mar '22

Attention is currently required from: Shelley Chen, Hung-Te Lin, Angel Pons, Jianjun Wang. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56789 ) Change subject: libpayload/pci: Split PCI interfaces as common and chip related ...................................................................... Patch Set 37: (11 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/56789/comment/faa111ac_f71bfaf2 PS2, Line 7: Split PCI interfaces as common and chip related Shelly, could you take over to review this? In CB:53903, Furquan suggested using a pci_ops struct handle the differences between PCI_IO (for x86) and PCI_MMIO (for qc & mtk). This patch does a (slightly) different thing (by having different implementations of pci_{read,write}_config{8,16,32} functions), but I don't see significant problems with this approach. > Normally for embedded platform, the base address of PCIe hardware might be different, so I also provide a 'pci_update_hw_base()' function for users(e.g. depthcharge) to set its hardware base address, is that ok? Let's discuss that in CB:56794. File payloads/libpayload/Kconfig: https://review.coreboot.org/c/coreboot/+/56789/comment/1c30a501_01745c1d PS12, Line 418: > Sorry, wrong CL link, it should be: […] Ack File payloads/libpayload/Kconfig: https://review.coreboot.org/c/coreboot/+/56789/comment/dcf0abf1_a917f721 PS36, Line 405: PCI_COMMON The config name should remain "PCI" in my opinion. https://review.coreboot.org/c/coreboot/+/56789/comment/3c69ee14_3568d2b8 PS36, Line 411: select PCI_COMMON : default n If one of PCI_MAP_BUS and PCI_IO_OPS must be set, then we don't need this extra config. We can use ifeq ($(CONFIG_XXX),y) in Makefile if needed. https://review.coreboot.org/c/coreboot/+/56789/comment/555a0879_63c1179b PS36, Line 414: PCI_X86 PCI_IO_OPS https://review.coreboot.org/c/coreboot/+/56789/comment/08911ed5_ebeabd7a PS36, Line 417: select PCI_COMMON Shouldn't we use "depends on PCI" here? File payloads/libpayload/drivers/pci_io_ops.c: https://review.coreboot.org/c/coreboot/+/56789/comment/e6690196_461aaee8 PS35, Line 33: device Take the chance to change this to "dev" for consistency. File payloads/libpayload/drivers/pci_map_bus_ops.c: PS12: > I think `pci_mmio_ops.c` corresponds to ECAM. Yes ECAM is mmio, but IIUC pci_map_bus() is also mmio with custom mapping. Anyway, since ECAM is not supported in libpayload (yet?), I'm fine with the current file name. File payloads/libpayload/drivers/pci_map_bus_ops.c: https://review.coreboot.org/c/coreboot/+/56789/comment/3c2b6359_faea6901 PS35, Line 38: | Is the address always aligned? I mean, should we write "+" here? https://review.coreboot.org/c/coreboot/+/56789/comment/0ccab213_644ed8eb PS35, Line 38: addr void *addr = ... And no blank line above. We can even simplify this to return read8((void *)(...)); File payloads/libpayload/include/pci.h: https://review.coreboot.org/c/coreboot/+/56789/comment/37b4270a_cffcf378 PS35, Line 105: u32 device Take the chance to change this to "pcidev_t dev" for consistency. -- To view, visit https://review.coreboot.org/c/coreboot/+/56789 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie74801bd4f3de51cbb574e86cd9bb09931152554 Gerrit-Change-Number: 56789 Gerrit-PatchSet: 37 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Comment-Date: Wed, 30 Mar 2022 01:44:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Comment-In-Reply-To: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-MessageType: comment

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coreboot-gerrit March 2022