coreboot-gerrit March 2022

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Change in coreboot[master]: mb/google/brya/var/agah: Fix GPU GPIOs
by Felix Held (Code Review) 30 Mar '22

30 Mar '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62383 ) Change subject: mb/google/brya/var/agah: Fix GPU GPIOs ...................................................................... mb/google/brya/var/agah: Fix GPU GPIOs While adding this train of patches to program the dGPU power sequences, I noticed some of the GPU GPIOs are incorrectly programmed in ramstage, so this patch fixes the settings. Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Change-Id: I622b1f5cfba84727bb31792358ca4162c7fa9f52 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62383 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Subrata Banik <subratabanik(a)google.com> --- M src/mainboard/google/brya/variants/agah/gpio.c 1 file changed, 7 insertions(+), 7 deletions(-) Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/agah/gpio.c b/src/mainboard/google/brya/variants/agah/gpio.c index 1423be9..81c9724 100644 --- a/src/mainboard/google/brya/variants/agah/gpio.c +++ b/src/mainboard/google/brya/variants/agah/gpio.c @@ -18,7 +18,7 @@ /* A15 : USB_OC2# ==> USB_C2_OC_ODL */ PAD_CFG_NF(GPP_A15, NONE, DEEP, NF1), /* A17 : DISP_MISCC ==> EN_GPU_PPVAR_GPU_NVVDD_X_PCH */ - PAD_CFG_GPO(GPP_A17, 1, DEEP), + PAD_CFG_GPI(GPP_A17, NONE, DEEP), /* A19 : DDSP_HPD1 ==> EN_PCH_PPVAR_GPU_FBVDDQ_X_L */ PAD_CFG_GPO(GPP_A19, 0, DEEP), /* A20 : DDSP_HPD2 ==> NC */ @@ -29,7 +29,7 @@ PAD_CFG_GPI(GPP_A22, NONE, DEEP), /* B3 : PROC_GP2 ==> GPU_PERST_L */ - PAD_CFG_GPO_LOCK(GPP_B3, 1, LOCK_CONFIG), + PAD_CFG_GPO(GPP_B3, 1, DEEP), /* B5 : ISH_I2C0_SDA ==> PCH_I2C_NVDD_GPU_SDA */ PAD_CFG_NF_LOCK(GPP_B5, NONE, NF2, LOCK_CONFIG), /* B6 : ISH_I2C0_SDA ==> PCH_I2C_NVDD_GPU_SCL */ @@ -65,7 +65,7 @@ /* D5 : SRCCLKREQ0# ==> GPU_CLKREQ_ODL */ PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1), /* D9 : ISH_SPI_CS# ==> GPU_THERM_INT_ODL */ - PAD_CFG_GPI_LOCK(GPP_D9, NONE, LOCK_CONFIG), + PAD_CFG_GPI(GPP_D9, NONE, DEEP), /* D10 : ISH_SPI_CLK ==> GPP_D10_STRAP */ PAD_NC_LOCK(GPP_D10, NONE, LOCK_CONFIG), /* D13 : ISH_UART0_RXD ==> NC */ @@ -80,9 +80,9 @@ /* E3 : PROC_GP0 ==> NC */ PAD_NC(GPP_E3, NONE), /* E4 : SATA_DEVSLP0 ==> PG_PPVAR_GPU_FBVDDQ_X_OD */ - PAD_CFG_GPO(GPP_E4, 0, DEEP), + PAD_CFG_GPI(GPP_E4, NONE, DEEP), /* E5 : SATA_DEVSLP1 ==> PG_GPU_ALLRAILS */ - PAD_CFG_GPI(GPP_E5, NONE, DEEP), + PAD_CFG_GPO(GPP_E5, 0, DEEP), /* E7 : PROC_GP1 ==> NC */ PAD_NC(GPP_E7, NONE), /* E9 : USB_OC0# ==> USB_A2_OC_ODL */ @@ -90,9 +90,9 @@ /* E10 : THC0_SPI1_CS# ==> EN_PP0950_GPU_X */ PAD_CFG_GPO_LOCK(GPP_E10, 0, LOCK_CONFIG), /* E16 : RSVD_TP ==> PG_PPVAR_GPU_NVVDD_X_OD */ - PAD_CFG_GPO(GPP_E16, 0, DEEP), + PAD_CFG_GPI(GPP_E16, NONE, DEEP), /* E17 : RSVD_TP ==> PG_PP0950_GPU_X_OD */ - PAD_CFG_GPI_LOCK(GPP_E17, NONE, LOCK_CONFIG), + PAD_CFG_GPI(GPP_E17, NONE, DEEP), /* E18 : DDP1_CTRLCLK ==> EN_PP1800_GPU_X */ PAD_CFG_GPO(GPP_E18, 0, DEEP), /* E19 : DDP1_CTRLDATA ==> GPP_E19_STRAP */ -- To view, visit https://review.coreboot.org/c/coreboot/+/62383 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I622b1f5cfba84727bb31792358ca4162c7fa9f52 Gerrit-Change-Number: 62383 Gerrit-PatchSet: 3 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: Documentation: gpio: Provide minor fixes to the table
by Eric Lai (Code Review) 30 Mar '22

30 Mar '22

Attention is currently required from: Subrata Banik. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63177 ) Change subject: Documentation: gpio: Provide minor fixes to the table ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63177 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifd8265b92b5ef0dcabb754371591477ca19c39be Gerrit-Change-Number: 63177 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Wed, 30 Mar 2022 00:04:10 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush/var/dewatt: Update telemetry value
by Felix Held (Code Review) 30 Mar '22

30 Mar '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63136 ) Change subject: mb/google/guybrush/var/dewatt: Update telemetry value ...................................................................... mb/google/guybrush/var/dewatt: Update telemetry value AMD SDLE testing had been done and apply the following telemetry settings for dewatt EVT: vdd scale: 91288 vdd offset: 279 soc scale: 29785 soc offset: 461 BUG=b:219626910 TEST=1. emerge-guybrush coreboot 2. pass AMD SDLE test Change-Id: I4456ffddbf9963f1202a349abe52df2bbb726468 Signed-off-by: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63136 Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> Reviewed-by: Rob Barnes <robbarnes(a)google.com> Reviewed-by: Karthik Ramasubramanian <kramasub(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/guybrush/variants/dewatt/overridetree.cb 1 file changed, 4 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Karthik Ramasubramanian: Looks good to me, approved Kenneth Chan: Looks good to me, but someone else must approve Rob Barnes: Looks good to me, approved diff --git a/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb b/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb index 6cb8293..866aee5 100644 --- a/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb +++ b/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb @@ -22,10 +22,10 @@ register "thermctl_limit_degreeC" = "100" #Update values based on final stardust SDLE test report. - register "telemetry_vddcrvddfull_scale_current_mA" = "95359" #mA - register "telemetry_vddcrvddoffset" = "449" - register "telemetry_vddcrsocfull_scale_current_mA" = "31481" #mA - register "telemetry_vddcrsocoffset" = "193" + register "telemetry_vddcrvddfull_scale_current_mA" = "91288" #mA + register "telemetry_vddcrvddoffset" = "279" + register "telemetry_vddcrsocfull_scale_current_mA" = "29785" #mA + register "telemetry_vddcrsocoffset" = "461" #USB 2/3 phy config register "usb_phy" = "{ -- To view, visit https://review.coreboot.org/c/coreboot/+/63136 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4456ffddbf9963f1202a349abe52df2bbb726468 Gerrit-Change-Number: 63136 Gerrit-PatchSet: 5 Gerrit-Owner: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: libpayload: Parse the ACPI RSDP table entry
by Felix Held (Code Review) 30 Mar '22

30 Mar '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62576 ) Change subject: libpayload: Parse the ACPI RSDP table entry ...................................................................... libpayload: Parse the ACPI RSDP table entry Change-Id: I583cda63c3f0b58f8d198ed5ecea7c4619c7a897 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62576 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> --- M payloads/libpayload/include/coreboot_tables.h M payloads/libpayload/include/sysinfo.h M payloads/libpayload/libc/coreboot.c 3 files changed, 21 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved diff --git a/payloads/libpayload/include/coreboot_tables.h b/payloads/libpayload/include/coreboot_tables.h index 3fd3fc8..bd23d34 100644 --- a/payloads/libpayload/include/coreboot_tables.h +++ b/payloads/libpayload/include/coreboot_tables.h @@ -83,6 +83,7 @@ CB_TAG_BOARD_CONFIG = 0x0040, CB_TAG_ACPI_CNVS = 0x0041, CB_TAG_TYPE_C_INFO = 0x0042, + CB_TAG_ACPI_RSDP = 0x0043, CB_TAG_CMOS_OPTION_TABLE = 0x00c8, CB_TAG_OPTION = 0x00c9, CB_TAG_OPTION_ENUM = 0x00ca, @@ -422,6 +423,16 @@ u32 type; }; +/* + * Handoff the ACPI RSDP + */ +struct cb_acpi_rsdp { + uint32_t tag; + uint32_t size; + struct cbuint64 rsdp_pointer; /* Address of the ACPI RSDP */ +}; + + /* Helpful inlines */ static inline u64 cb_unpack64(struct cbuint64 val) diff --git a/payloads/libpayload/include/sysinfo.h b/payloads/libpayload/include/sysinfo.h index eba4b892..c8c1052 100644 --- a/payloads/libpayload/include/sysinfo.h +++ b/payloads/libpayload/include/sysinfo.h @@ -111,6 +111,7 @@ uintptr_t mrc_cache; uintptr_t acpi_gnvs; uintptr_t acpi_cnvs; + uintptr_t acpi_rsdp; #define UNDEFINED_STRAPPING_ID (~0) #define UNDEFINED_FW_CONFIG ~((uint64_t)0) diff --git a/payloads/libpayload/libc/coreboot.c b/payloads/libpayload/libc/coreboot.c index f5695d6..2474df9 100644 --- a/payloads/libpayload/libc/coreboot.c +++ b/payloads/libpayload/libc/coreboot.c @@ -268,6 +268,12 @@ } } +static void cb_parse_rsdp(void *ptr, struct sysinfo_t *info) +{ + const struct cb_acpi_rsdp *cb_acpi_rsdp = ptr; + info->acpi_rsdp = cb_unpack64(cb_acpi_rsdp->rsdp_pointer); +} + int cb_parse_header(void *addr, int len, struct sysinfo_t *info) { struct cb_header *header; @@ -408,6 +414,9 @@ cb_parse_tsc_info(ptr, info); break; #endif + case CB_TAG_ACPI_RSDP: + cb_parse_rsdp(ptr, info); + break; default: cb_parse_arch_specific(rec, info); break; -- To view, visit https://review.coreboot.org/c/coreboot/+/62576 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I583cda63c3f0b58f8d198ed5ecea7c4619c7a897 Gerrit-Change-Number: 62576 Gerrit-PatchSet: 8 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: device/pci_device.c: Return if the scan parameter is invalid
by Felix Held (Code Review) 30 Mar '22

30 Mar '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63038 ) Change subject: device/pci_device.c: Return if the scan parameter is invalid ...................................................................... device/pci_device.c: Return if the scan parameter is invalid Clang is unhappy about codepath of an invalid parameter because variables remain unset. Change-Id: I1ba392a48cf3f81a29d9645e5cf220b122d588af Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63038 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/device/pci_device.c 1 file changed, 2 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/device/pci_device.c b/src/device/pci_device.c index 22ccf59..90b26c1 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -1518,6 +1518,8 @@ primary = parent->secondary; secondary = link->secondary; subordinate = link->subordinate; + } else { + return; } if (state == PCI_ROUTE_SCAN) { -- To view, visit https://review.coreboot.org/c/coreboot/+/63038 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1ba392a48cf3f81a29d9645e5cf220b122d588af Gerrit-Change-Number: 63038 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: src/console/Kconfig: Add option to disable loglevel prefix
by Felix Held (Code Review) 30 Mar '22

30 Mar '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63144 ) Change subject: src/console/Kconfig: Add option to disable loglevel prefix ...................................................................... src/console/Kconfig: Add option to disable loglevel prefix This patch adds an option to disable loglevel prefixes. This patch helps to achieve clear messages when low loglevel is used and very few messages are displayed on a terminal. This option also allows to maintain compatibility with log readers and continuous integration systems that depend on fixed log content. If the code contains: printk(BIOS_DEBUG, "This is a debug message!\n") it will show as: [DEBUG] This is a debug message! but if the Kconfig contains: CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=n the same message will show up as This is a debug message! Signed-off-by: Igor Bagnucki <igor.bagnucki(a)3mdeb.com> Change-Id: I911bb601cf1933a4c6498b2ae1e4cb4d4bc85621 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63144 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Julius Werner <jwerner(a)chromium.org> --- M src/console/Kconfig M src/console/printk.c 2 files changed, 11 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Julius Werner: Looks good to me, approved diff --git a/src/console/Kconfig b/src/console/Kconfig index 37d8fef..6152592 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -395,6 +395,15 @@ endif +config CONSOLE_USE_LOGLEVEL_PREFIX + bool "Use loglevel prefix to indicate line loglevel" + default y + help + When enabled, if the code contains a: + `printk(BIOS_DEBUG, "This is a debug message!\n")`, + it will show up as: + `[DEBUG] This is a debug message!` + config CONSOLE_USE_ANSI_ESCAPES bool "Use ANSI escape sequences for console highlighting" default y diff --git a/src/console/printk.c b/src/console/printk.c index eb35c53..1ce2fad 100644 --- a/src/console/printk.c +++ b/src/console/printk.c @@ -96,7 +96,8 @@ and potentially an escape sequence for highlighting. */ if (CONFIG(CONSOLE_USE_ANSI_ESCAPES)) wrap_interactive_printf(BIOS_LOG_ESCAPE_PATTERN, bios_log_escape[state.level]); - wrap_interactive_printf(BIOS_LOG_PREFIX_PATTERN, bios_log_prefix[state.level]); + if (CONFIG(CONSOLE_USE_LOGLEVEL_PREFIX)) + wrap_interactive_printf(BIOS_LOG_PREFIX_PATTERN, bios_log_prefix[state.level]); } static void line_end(union log_state state) -- To view, visit https://review.coreboot.org/c/coreboot/+/63144 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I911bb601cf1933a4c6498b2ae1e4cb4d4bc85621 Gerrit-Change-Number: 63144 Gerrit-PatchSet: 6 Gerrit-Owner: Igor Bagnucki Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Igor Bagnucki <igor.bagnucki(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/intel/common: Abstract the common TCSS functions
by John Zhao (Code Review) 30 Mar '22

30 Mar '22

Attention is currently required from: Subrata Banik, John Zhao, Tim Wawrzynczak, Paul Menzel, Eric Lai, Angel Pons, Patrick Rudolph, EricR Lai. Hello build bot (Jenkins), Wonkyu Kim, Subrata Banik, Tim Wawrzynczak, Eric Lai, Angel Pons, Patrick Rudolph, EricR Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/62723 to look at the new patch set (#15). Change subject: soc/intel/common: Abstract the common TCSS functions ...................................................................... soc/intel/common: Abstract the common TCSS functions This change abstracts the common TCSS functions for pad configuration and Thunderbolt authentication. BUG=b:213574324 TEST=Build platforms coreboot images successfully. Change-Id: I3302aabfb5f540c41da6359f11376b4202c6310b Signed-off-by: John Zhao <john.zhao(a)intel.com> --- M src/soc/intel/alderlake/Kconfig M src/soc/intel/alderlake/Makefile.inc A src/soc/intel/alderlake/tcss.c M src/soc/intel/common/block/include/intelblocks/tcss.h M src/soc/intel/common/block/tcss/Kconfig M src/soc/intel/common/block/tcss/tcss.c M src/soc/intel/common/block/usb4/usb4.c M src/soc/intel/tigerlake/Kconfig M src/soc/intel/tigerlake/Makefile.inc A src/soc/intel/tigerlake/tcss.c 10 files changed, 36 insertions(+), 38 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/62723/15 -- To view, visit https://review.coreboot.org/c/coreboot/+/62723 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3302aabfb5f540c41da6359f11376b4202c6310b Gerrit-Change-Number: 62723 Gerrit-PatchSet: 15 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: John Zhao <john.zhao(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/cherry: Add PCIe domain support for dojo
by Yu-Ping Wu (Code Review) 30 Mar '22

30 Mar '22

Attention is currently required from: Hung-Te Lin, Shelley Chen, Paul Menzel, Angel Pons, Jianjun Wang. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62360 ) Change subject: mb/google/cherry: Add PCIe domain support for dojo ...................................................................... Patch Set 26: Code-Review+2 (1 comment) Patchset: PS26: Please rebase. -- To view, visit https://review.coreboot.org/c/coreboot/+/62360 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifb02960504177fe488e6784b954c16b2c8d94972 Gerrit-Change-Number: 62360 Gerrit-PatchSet: 26 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Comment-Date: Tue, 29 Mar 2022 23:45:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/sabrina/makefile: use Sabrina as SoC name in amdfwtool call
by build bot (Jenkins) (Code Review) 30 Mar '22

30 Mar '22

Attention is currently required from: Jason Glenesk, Marshall Dawson, Fred Reitberger, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63189 ) Change subject: soc/amd/sabrina/makefile: use Sabrina as SoC name in amdfwtool call ...................................................................... Patch Set 2: Verified+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/63189 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I53a8de222e39bd2b92c07661b6c52a02fb651609 Gerrit-Change-Number: 63189 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 29 Mar 2022 23:34:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Abstract the common TCSS functions
by John Zhao (Code Review) 30 Mar '22

30 Mar '22

Attention is currently required from: Subrata Banik, Tim Wawrzynczak, Paul Menzel, Eric Lai, Angel Pons, Patrick Rudolph, EricR Lai. John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62723 ) Change subject: soc/intel/common: Abstract the common TCSS functions ...................................................................... Patch Set 14: (1 comment) File src/soc/intel/common/block/include/intelblocks/cfg.h: https://review.coreboot.org/c/coreboot/+/62723/comment/23874772_a9898aab PS13, Line 30: struct soc_tcss_ops tcss_ops; > You could then add […] Option #1 It seems compiler does not like the following setting, though the "#include <interblocks/cfg.h" is explicitly added into the chipset.cb. register "common_soc_config.tcss_ops" = "{ .configure_aux_bias_pads = tcss_configure_aux_bias_pads_regbar, .valid_tbt_auth = tcss_valid_tbt_auth, }" Errors with "undefined reference to tcss_configure_aux_biads_pads_regbar" and "tcss_valid_tbt_auth". There is an update with option #2. -- To view, visit https://review.coreboot.org/c/coreboot/+/62723 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3302aabfb5f540c41da6359f11376b4202c6310b Gerrit-Change-Number: 62723 Gerrit-PatchSet: 14 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Tue, 29 Mar 2022 23:32:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: John Zhao <john.zhao(a)intel.com> Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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coreboot-gerrit March 2022