coreboot-gerrit February 2022

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Change in coreboot[master]: drivers/i2c/designware/dw_i2c: limit scope of dw_i2c_transfer
by Felix Held (Code Review) 01 Feb '22

01 Feb '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61514 ) Change subject: drivers/i2c/designware/dw_i2c: limit scope of dw_i2c_transfer ...................................................................... drivers/i2c/designware/dw_i2c: limit scope of dw_i2c_transfer Outside of the designware I2C driver the generic platform_i2c_transfer function should be used instead, so don't make dw_i2c_transfer available outside of this file. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Ib8b6a08b6aa2cd63adc2ef69b828661fa0ed154a Reviewed-on: https://review.coreboot.org/c/coreboot/+/61514 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> --- M src/drivers/i2c/designware/dw_i2c.c M src/drivers/i2c/designware/dw_i2c.h 2 files changed, 1 insertion(+), 8 deletions(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved diff --git a/src/drivers/i2c/designware/dw_i2c.c b/src/drivers/i2c/designware/dw_i2c.c index 011b38b..bfb5971 100644 --- a/src/drivers/i2c/designware/dw_i2c.c +++ b/src/drivers/i2c/designware/dw_i2c.c @@ -453,7 +453,7 @@ return ret; } -enum cb_err dw_i2c_transfer(unsigned int bus, const struct i2c_msg *msg, size_t count) +static enum cb_err dw_i2c_transfer(unsigned int bus, const struct i2c_msg *msg, size_t count) { const struct i2c_msg *orig_msg = msg; size_t i; diff --git a/src/drivers/i2c/designware/dw_i2c.h b/src/drivers/i2c/designware/dw_i2c.h index 847b6c3..3d8e663 100644 --- a/src/drivers/i2c/designware/dw_i2c.h +++ b/src/drivers/i2c/designware/dw_i2c.h @@ -110,13 +110,6 @@ struct dw_i2c_speed_config *config); /* - * Process given I2C segments in a single transfer - */ -enum cb_err dw_i2c_transfer(unsigned int bus, - const struct i2c_msg *segments, - size_t count); - -/* * Map an i2c host controller device to a logical bus number. * Return value: * -1 = failure -- To view, visit https://review.coreboot.org/c/coreboot/+/61514 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib8b6a08b6aa2cd63adc2ef69b828661fa0ed154a Gerrit-Change-Number: 61514 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: drivers/i2c/designware/dw_i2c: return enum cb_err from dw_i2c_transfer
by Felix Held (Code Review) 01 Feb '22

01 Feb '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61513 ) Change subject: drivers/i2c/designware/dw_i2c: return enum cb_err from dw_i2c_transfer ...................................................................... drivers/i2c/designware/dw_i2c: return enum cb_err from dw_i2c_transfer Using enum cb_err as return type instead of int improves the readability of the code. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Ic1812c4d8d2b4d9ad331a787bd302a4f0707c1fe Reviewed-on: https://review.coreboot.org/c/coreboot/+/61513 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> --- M src/drivers/i2c/designware/dw_i2c.c M src/drivers/i2c/designware/dw_i2c.h 2 files changed, 5 insertions(+), 8 deletions(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved diff --git a/src/drivers/i2c/designware/dw_i2c.c b/src/drivers/i2c/designware/dw_i2c.c index e29d54f..011b38b 100644 --- a/src/drivers/i2c/designware/dw_i2c.c +++ b/src/drivers/i2c/designware/dw_i2c.c @@ -453,7 +453,7 @@ return ret; } -int dw_i2c_transfer(unsigned int bus, const struct i2c_msg *msg, size_t count) +enum cb_err dw_i2c_transfer(unsigned int bus, const struct i2c_msg *msg, size_t count) { const struct i2c_msg *orig_msg = msg; size_t i; @@ -469,19 +469,19 @@ for (i = 0, start = 0; i < count; i++, msg++) { if (addr != msg->slave) { if (_dw_i2c_transfer(bus, &orig_msg[start], i - start) != CB_SUCCESS) - return -1; + return CB_ERR; start = i; addr = msg->slave; } } - return _dw_i2c_transfer(bus, &orig_msg[start], count - start) == CB_SUCCESS ? 0 : -1; + return _dw_i2c_transfer(bus, &orig_msg[start], count - start); } /* Global I2C bus handler, defined in include/device/i2c_simple.h */ int platform_i2c_transfer(unsigned int bus, struct i2c_msg *msg, int count) { - return dw_i2c_transfer(bus, msg, count < 0 ? 0 : count); + return dw_i2c_transfer(bus, msg, count < 0 ? 0 : count) == CB_SUCCESS ? 0 : -1; } static enum cb_err dw_i2c_set_speed_config(unsigned int bus, diff --git a/src/drivers/i2c/designware/dw_i2c.h b/src/drivers/i2c/designware/dw_i2c.h index 64e27c0..847b6c3 100644 --- a/src/drivers/i2c/designware/dw_i2c.h +++ b/src/drivers/i2c/designware/dw_i2c.h @@ -111,11 +111,8 @@ /* * Process given I2C segments in a single transfer - * Return value: - * -1 = failure - * 0 = success */ -int dw_i2c_transfer(unsigned int bus, +enum cb_err dw_i2c_transfer(unsigned int bus, const struct i2c_msg *segments, size_t count); -- To view, visit https://review.coreboot.org/c/coreboot/+/61513 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic1812c4d8d2b4d9ad331a787bd302a4f0707c1fe Gerrit-Change-Number: 61513 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/intel/apollolake: Use PCR write to disable HECI1
by Lean Sheng Tan (Code Review) 01 Feb '22

01 Feb '22

Attention is currently required from: Subrata Banik, Maulik V Vaghela, Tim Wawrzynczak, Angel Pons, Sridhar Siricilla, Werner Zeh, Andrey Petrov, Patrick Rudolph, EricR Lai. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61444 ) Change subject: soc/intel/apollolake: Use PCR write to disable HECI1 ...................................................................... Patch Set 9: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/61444 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8df9544296f0bea095c5415805a596cb5b36885e Gerrit-Change-Number: 61444 Gerrit-PatchSet: 9 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Tue, 01 Feb 2022 17:54:05 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/skylake: Use PCR write to disable HECI1
by Lean Sheng Tan (Code Review) 01 Feb '22

01 Feb '22

Attention is currently required from: Subrata Banik, Matt DeVillier, Tim Wawrzynczak, Sridhar Siricilla, Angel Pons, Nick Vaccaro, Patrick Rudolph, EricR Lai. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61433 ) Change subject: soc/intel/skylake: Use PCR write to disable HECI1 ...................................................................... Patch Set 10: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/61433 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib6bfa7c48660a6df8d0944de675a4f30fe248d1b Gerrit-Change-Number: 61433 Gerrit-PatchSet: 10 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Tue, 01 Feb 2022 17:53:49 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/i2c/designware/dw_i2c: return enum cb_err from dw_i2c_init
by Felix Held (Code Review) 01 Feb '22

01 Feb '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61511 ) Change subject: drivers/i2c/designware/dw_i2c: return enum cb_err from dw_i2c_init ...................................................................... drivers/i2c/designware/dw_i2c: return enum cb_err from dw_i2c_init Using enum cb_err as return type instead of int improves the readability of the code. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I55e6d93ca141b687871ceaa763bbbbe966c4b4a3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61511 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> Reviewed-by: Jason Glenesk <jason.glenesk(a)gmail.com> --- M src/drivers/i2c/designware/dw_i2c.c M src/drivers/i2c/designware/dw_i2c.h M src/soc/amd/common/block/i2c/i2c.c M src/soc/intel/common/block/i2c/i2c.c 4 files changed, 10 insertions(+), 13 deletions(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved Jason Glenesk: Looks good to me, but someone else must approve diff --git a/src/drivers/i2c/designware/dw_i2c.c b/src/drivers/i2c/designware/dw_i2c.c index ec34f42..e29d54f 100644 --- a/src/drivers/i2c/designware/dw_i2c.c +++ b/src/drivers/i2c/designware/dw_i2c.c @@ -687,33 +687,33 @@ * The bus speed can be passed in Hz or using values from device/i2c.h and * will default to I2C_SPEED_FAST if it is not provided. */ -int dw_i2c_init(unsigned int bus, const struct dw_i2c_bus_config *bcfg) +enum cb_err dw_i2c_init(unsigned int bus, const struct dw_i2c_bus_config *bcfg) { struct dw_i2c_regs *regs; enum i2c_speed speed; if (!bcfg) - return -1; + return CB_ERR; speed = bcfg->speed ? : I2C_SPEED_FAST; regs = (struct dw_i2c_regs *)dw_i2c_base_address(bus); if (!regs) { printk(BIOS_ERR, "I2C bus %u base address not found\n", bus); - return -1; + return CB_ERR; } if (read32(&regs->comp_type) != DW_I2C_COMP_TYPE) { printk(BIOS_ERR, "I2C bus %u has unknown type 0x%x.\n", bus, read32(&regs->comp_type)); - return -1; + return CB_ERR; } printk(BIOS_DEBUG, "I2C bus %u version 0x%x\n", bus, read32(&regs->comp_version)); if (dw_i2c_disable(regs) != CB_SUCCESS) { printk(BIOS_ERR, "I2C timeout disabling bus %u\n", bus); - return -1; + return CB_ERR; } /* Put controller in master mode with restart enabled */ @@ -723,7 +723,7 @@ /* Set bus speed to FAST by default */ if (dw_i2c_set_speed(bus, speed, bcfg) != CB_SUCCESS) { printk(BIOS_ERR, "I2C failed to set speed for bus %u\n", bus); - return -1; + return CB_ERR; } /* Set RX/TX thresholds to smallest values */ @@ -736,7 +736,7 @@ printk(BIOS_INFO, "DW I2C bus %u at %p (%u KHz)\n", bus, regs, speed / KHz); - return 0; + return CB_SUCCESS; } /* diff --git a/src/drivers/i2c/designware/dw_i2c.h b/src/drivers/i2c/designware/dw_i2c.h index c010b11..64e27c0 100644 --- a/src/drivers/i2c/designware/dw_i2c.h +++ b/src/drivers/i2c/designware/dw_i2c.h @@ -95,11 +95,8 @@ /* * Initialize this bus controller and set the speed - * Return value: - * -1 = failure - * 0 = success */ -int dw_i2c_init(unsigned int bus, const struct dw_i2c_bus_config *bcfg); +enum cb_err dw_i2c_init(unsigned int bus, const struct dw_i2c_bus_config *bcfg); /* * Generate speed config based on clock diff --git a/src/soc/amd/common/block/i2c/i2c.c b/src/soc/amd/common/block/i2c/i2c.c index a70645c..733ad88 100644 --- a/src/soc/amd/common/block/i2c/i2c.c +++ b/src/soc/amd/common/block/i2c/i2c.c @@ -96,7 +96,7 @@ cfg->early_init != is_early_init) continue; - if (dw_i2c_init(bus, cfg)) { + if (dw_i2c_init(bus, cfg) != CB_SUCCESS) { printk(BIOS_ERR, "Failed to init i2c bus %u\n", bus); continue; } diff --git a/src/soc/intel/common/block/i2c/i2c.c b/src/soc/intel/common/block/i2c/i2c.c index acc23ab..7fdf818 100644 --- a/src/soc/intel/common/block/i2c/i2c.c +++ b/src/soc/intel/common/block/i2c/i2c.c @@ -72,7 +72,7 @@ lpss_set_power_state(dev, STATE_D0); /* Initialize the controller */ - if (dw_i2c_init(bus, config) < 0) { + if (dw_i2c_init(bus, config) != CB_SUCCESS) { printk(BIOS_ERR, "I2C%u failed to initialize\n", bus); return -1; } -- To view, visit https://review.coreboot.org/c/coreboot/+/61511 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I55e6d93ca141b687871ceaa763bbbbe966c4b4a3 Gerrit-Change-Number: 61511 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/intel/common/block/notify: Implement coreboot notify native driver
by Lean Sheng Tan (Code Review) 01 Feb '22

01 Feb '22

Attention is currently required from: Arthur Heymans, Felix Singer, Subrata Banik, Tim Wawrzynczak, Sridhar Siricilla, Angel Pons, Werner Zeh, Patrick Rudolph, EricR Lai. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60405 ) Change subject: soc/intel/common/block/notify: Implement coreboot notify native driver ...................................................................... Patch Set 19: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/60405/comment/4fb2177c_28506c25 PS19, Line 7: soc/intel/common/block/notify: Implement coreboot notify native driver > > May I know motivation to port notify API to coreboot? Is it not redundant maintain the function (o […] The design philosophy behind coreboot is straightforward - to empower user with control and choices. There is always a kconfig to choose if you prefer the fsp way :) -- To view, visit https://review.coreboot.org/c/coreboot/+/60405 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I70bde33f77026e8be165ff082defe3cab6686ec7 Gerrit-Change-Number: 60405 Gerrit-PatchSet: 19 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Tue, 01 Feb 2022 17:51:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur.heymans(a)9elements.com> Comment-In-Reply-To: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/i2c/designware/dw_i2c: use enum cb_err for static functions
by Felix Held (Code Review) 01 Feb '22

01 Feb '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61510 ) Change subject: drivers/i2c/designware/dw_i2c: use enum cb_err for static functions ...................................................................... drivers/i2c/designware/dw_i2c: use enum cb_err for static functions Using enum cb_err as return type instead of int improves the readability of the code. This commit only changes the return value of the static functions in this file keeping the external interface identical. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I80300e0b24591fc660c3134139b9257e002cdbbb Reviewed-on: https://review.coreboot.org/c/coreboot/+/61510 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> --- M src/drivers/i2c/designware/dw_i2c.c 1 file changed, 45 insertions(+), 44 deletions(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved diff --git a/src/drivers/i2c/designware/dw_i2c.c b/src/drivers/i2c/designware/dw_i2c.c index 1f7433e..ec34f42 100644 --- a/src/drivers/i2c/designware/dw_i2c.c +++ b/src/drivers/i2c/designware/dw_i2c.c @@ -265,7 +265,7 @@ } /* Disable this I2C controller */ -static int dw_i2c_disable(struct dw_i2c_regs *regs) +static enum cb_err dw_i2c_disable(struct dw_i2c_regs *regs) { uint32_t enable = read32(&regs->enable); @@ -278,14 +278,14 @@ stopwatch_init_usecs_expire(&sw, DW_I2C_TIMEOUT_US); while (read32(&regs->enable_status) & ENABLE_CONTROLLER) if (stopwatch_expired(&sw)) - return -1; + return CB_ERR; } - return 0; + return CB_SUCCESS; } /* Wait for this I2C controller to go idle for transmit */ -static int dw_i2c_wait_for_bus_idle(struct dw_i2c_regs *regs) +static enum cb_err dw_i2c_wait_for_bus_idle(struct dw_i2c_regs *regs) { struct stopwatch sw; @@ -301,17 +301,17 @@ /* Check for TX FIFO empty to indicate TX idle */ if (status & STATUS_TX_FIFO_EMPTY) - return 0; + return CB_SUCCESS; } /* Timed out while waiting for bus to go idle */ - return -1; + return CB_ERR; } /* Transfer one byte of one segment, sending stop bit if requested */ -static int dw_i2c_transfer_byte(struct dw_i2c_regs *regs, - const struct i2c_msg *segment, - size_t byte, int send_stop) +static enum cb_err dw_i2c_transfer_byte(struct dw_i2c_regs *regs, + const struct i2c_msg *segment, + size_t byte, int send_stop) { struct stopwatch sw; uint32_t cmd = CMD_DATA_CMD; /* Read op */ @@ -323,7 +323,7 @@ while (!(read32(&regs->status) & STATUS_TX_FIFO_NOT_FULL)) { if (stopwatch_expired(&sw)) { printk(BIOS_ERR, "I2C transmit timeout\n"); - return -1; + return CB_ERR; } } cmd = segment->buf[byte]; @@ -340,27 +340,27 @@ while (!(read32(&regs->status) & STATUS_RX_FIFO_NOT_EMPTY)) { if (stopwatch_expired(&sw)) { printk(BIOS_ERR, "I2C receive timeout\n"); - return -1; + return CB_ERR; } } segment->buf[byte] = read32(&regs->cmd_data); } - return 0; + return CB_SUCCESS; } -static int _dw_i2c_transfer(unsigned int bus, const struct i2c_msg *segments, - size_t count) +static enum cb_err _dw_i2c_transfer(unsigned int bus, const struct i2c_msg *segments, + size_t count) { struct stopwatch sw; struct dw_i2c_regs *regs; size_t byte; - int ret = -1; + enum cb_err ret = CB_ERR; regs = (struct dw_i2c_regs *)dw_i2c_base_address(bus); if (!regs) { printk(BIOS_ERR, "I2C bus %u base address not found\n", bus); - return -1; + return CB_ERR; } /* The assumption is that the host controller is disabled -- either @@ -388,8 +388,8 @@ * Repeated start will be automatically generated * by the controller on R->W or W->R switch. */ - if (dw_i2c_transfer_byte(regs, segments, byte, - count == 0) < 0) { + if (dw_i2c_transfer_byte(regs, segments, byte, count == 0) != + CB_SUCCESS) { printk(BIOS_ERR, "I2C %s failed: bus %u " "addr 0x%02x\n", (segments->flags & I2C_M_RD) ? @@ -430,7 +430,7 @@ } /* Wait for the bus to go idle */ - if (dw_i2c_wait_for_bus_idle(regs)) { + if (dw_i2c_wait_for_bus_idle(regs) != CB_SUCCESS) { printk(BIOS_ERR, "I2C timeout waiting for bus %u idle\n", bus); goto out; } @@ -445,7 +445,7 @@ read32(&regs->cmd_data); } - ret = 0; + ret = CB_SUCCESS; out: read32(&regs->clear_intr); @@ -468,14 +468,14 @@ for (i = 0, start = 0; i < count; i++, msg++) { if (addr != msg->slave) { - if (_dw_i2c_transfer(bus, &orig_msg[start], i - start)) + if (_dw_i2c_transfer(bus, &orig_msg[start], i - start) != CB_SUCCESS) return -1; start = i; addr = msg->slave; } } - return _dw_i2c_transfer(bus, &orig_msg[start], count - start); + return _dw_i2c_transfer(bus, &orig_msg[start], count - start) == CB_SUCCESS ? 0 : -1; } /* Global I2C bus handler, defined in include/device/i2c_simple.h */ @@ -484,19 +484,19 @@ return dw_i2c_transfer(bus, msg, count < 0 ? 0 : count); } -static int dw_i2c_set_speed_config(unsigned int bus, - const struct dw_i2c_speed_config *config) +static enum cb_err dw_i2c_set_speed_config(unsigned int bus, + const struct dw_i2c_speed_config *config) { struct dw_i2c_regs *regs; void *hcnt_reg, *lcnt_reg; regs = (struct dw_i2c_regs *)dw_i2c_base_address(bus); if (!regs || !config) - return -1; + return CB_ERR; /* Nothing to do if no values are set */ if (!config->scl_lcnt && !config->scl_hcnt && !config->sda_hold) - return 0; + return CB_SUCCESS; if (config->speed >= I2C_SPEED_HIGH) { /* High and Fast Ultra speed */ @@ -522,14 +522,14 @@ if (config->sda_hold) write32(&regs->sda_hold, config->sda_hold); - return 0; + return CB_SUCCESS; } -static int dw_i2c_gen_config_rise_fall_time(struct dw_i2c_regs *regs, - enum i2c_speed speed, - const struct dw_i2c_bus_config *bcfg, - int ic_clk, - struct dw_i2c_speed_config *config) +static enum cb_err dw_i2c_gen_config_rise_fall_time(struct dw_i2c_regs *regs, + enum i2c_speed speed, + const struct dw_i2c_bus_config *bcfg, + int ic_clk, + struct dw_i2c_speed_config *config) { const struct i2c_descriptor *bus; const struct soc_clock *soc; @@ -542,13 +542,13 @@ if (bus == NULL) { printk(BIOS_ERR, "dw_i2c: invalid bus speed %d\n", speed); - return -1; + return CB_ERR; } if (soc == NULL) { printk(BIOS_ERR, "dw_i2c: invalid SoC clock speed %d MHz\n", ic_clk); - return -1; + return CB_ERR; } /* Get the proper spike suppression count based on target speed. */ @@ -583,7 +583,7 @@ if (hcnt < 0 || lcnt < 0) { printk(BIOS_ERR, "dw_i2c: bad counts. hcnt = %d lcnt = %d\n", hcnt, lcnt); - return -1; + return CB_ERR; } /* Now add things back up to ensure the period is hit. If off, @@ -612,7 +612,7 @@ printk(DW_I2C_DEBUG, "dw_i2c: hcnt = %d lcnt = %d sda hold = %d\n", hcnt, lcnt, config->sda_hold); - return 0; + return CB_SUCCESS; } int dw_i2c_gen_speed_config(uintptr_t dw_i2c_addr, @@ -638,11 +638,12 @@ } /* Use the time calculation. */ - return dw_i2c_gen_config_rise_fall_time(regs, speed, bcfg, ic_clk, config); + return dw_i2c_gen_config_rise_fall_time(regs, speed, bcfg, ic_clk, config) == + CB_SUCCESS ? 0 : -1; } -static int dw_i2c_set_speed(unsigned int bus, enum i2c_speed speed, - const struct dw_i2c_bus_config *bcfg) +static enum cb_err dw_i2c_set_speed(unsigned int bus, enum i2c_speed speed, + const struct dw_i2c_bus_config *bcfg) { struct dw_i2c_regs *regs; struct dw_i2c_speed_config config; @@ -651,7 +652,7 @@ /* Clock must be provided by Kconfig */ regs = (struct dw_i2c_regs *)dw_i2c_base_address(bus); if (!regs || !speed) - return -1; + return CB_ERR; control = read32(&regs->control); control &= ~CONTROL_SPEED_MASK; @@ -669,7 +670,7 @@ /* Generate speed config based on clock */ if (dw_i2c_gen_speed_config((uintptr_t)regs, speed, bcfg, &config) < 0) - return -1; + return CB_ERR; /* Select this speed in the control register */ write32(&regs->control, control); @@ -677,7 +678,7 @@ /* Write the speed config that was generated earlier */ dw_i2c_set_speed_config(bus, &config); - return 0; + return CB_SUCCESS; } /* @@ -710,7 +711,7 @@ printk(BIOS_DEBUG, "I2C bus %u version 0x%x\n", bus, read32(&regs->comp_version)); - if (dw_i2c_disable(regs) < 0) { + if (dw_i2c_disable(regs) != CB_SUCCESS) { printk(BIOS_ERR, "I2C timeout disabling bus %u\n", bus); return -1; } @@ -720,7 +721,7 @@ CONTROL_RESTART_ENABLE); /* Set bus speed to FAST by default */ - if (dw_i2c_set_speed(bus, speed, bcfg) < 0) { + if (dw_i2c_set_speed(bus, speed, bcfg) != CB_SUCCESS) { printk(BIOS_ERR, "I2C failed to set speed for bus %u\n", bus); return -1; } -- To view, visit https://review.coreboot.org/c/coreboot/+/61510 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I80300e0b24591fc660c3134139b9257e002cdbbb Gerrit-Change-Number: 61510 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: drivers/i2c/designware/dw_i2c.h: include types.h instead of stdint.h
by Felix Held (Code Review) 01 Feb '22

01 Feb '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61509 ) Change subject: drivers/i2c/designware/dw_i2c.h: include types.h instead of stdint.h ...................................................................... drivers/i2c/designware/dw_i2c.h: include types.h instead of stdint.h size_t is defined in stddef.h and not stdint.h, so include types.h to get both. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I3782d3a949b72d1530ebd8078c46bc695f76dc4f Reviewed-on: https://review.coreboot.org/c/coreboot/+/61509 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> --- M src/drivers/i2c/designware/dw_i2c.h 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved diff --git a/src/drivers/i2c/designware/dw_i2c.h b/src/drivers/i2c/designware/dw_i2c.h index e20a5d1..c010b11 100644 --- a/src/drivers/i2c/designware/dw_i2c.h +++ b/src/drivers/i2c/designware/dw_i2c.h @@ -5,7 +5,7 @@ #include <device/device.h> #include <device/i2c.h> -#include <stdint.h> +#include <types.h> #if CONFIG(DRIVERS_I2C_DESIGNWARE_DEBUG) #define DW_I2C_DEBUG BIOS_DEBUG -- To view, visit https://review.coreboot.org/c/coreboot/+/61509 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3782d3a949b72d1530ebd8078c46bc695f76dc4f Gerrit-Change-Number: 61509 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: drivers/i2c/designware/dw_i2c: add missing types.h include
by Felix Held (Code Review) 01 Feb '22

01 Feb '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61508 ) Change subject: drivers/i2c/designware/dw_i2c: add missing types.h include ...................................................................... drivers/i2c/designware/dw_i2c: add missing types.h include This will provide the definitions for size_t, uint32_t and uintptr_t. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Icda8d458565bf981545d720d612cbdace04bedd4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61508 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> --- M src/drivers/i2c/designware/dw_i2c.c 1 file changed, 1 insertion(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved diff --git a/src/drivers/i2c/designware/dw_i2c.c b/src/drivers/i2c/designware/dw_i2c.c index a6498fb..1f7433e 100644 --- a/src/drivers/i2c/designware/dw_i2c.c +++ b/src/drivers/i2c/designware/dw_i2c.c @@ -8,6 +8,7 @@ #include <device/i2c_simple.h> #include <string.h> #include <timer.h> +#include <types.h> #include "dw_i2c.h" /* Use a ~10ms timeout for various operations */ -- To view, visit https://review.coreboot.org/c/coreboot/+/61508 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icda8d458565bf981545d720d612cbdace04bedd4 Gerrit-Change-Number: 61508 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/intel/common/block/notify: Implement coreboot notify native driver
by Arthur Heymans (Code Review) 01 Feb '22

01 Feb '22

Attention is currently required from: Felix Singer, Subrata Banik, Tim Wawrzynczak, Sridhar Siricilla, Angel Pons, Werner Zeh, Patrick Rudolph, EricR Lai. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60405 ) Change subject: soc/intel/common/block/notify: Implement coreboot notify native driver ...................................................................... Patch Set 19: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/60405/comment/eff8c406_94eb3364 PS19, Line 7: soc/intel/common/block/notify: Implement coreboot notify native driver > May I know motivation to port notify API to coreboot? Is it not redundant maintain the function (one by CB and other one by SoC team)? Unless coreboot adds more to FSP notify, then I feel worth to port. WDYT? There already is overlap between FSP and coreboot in different places. That's why some codepaths in FSP are optional. Coreboot is open source and FSP is not. Having functionality natively in coreboot should not need motivation when the alternative is a closed source binary... -- To view, visit https://review.coreboot.org/c/coreboot/+/60405 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I70bde33f77026e8be165ff082defe3cab6686ec7 Gerrit-Change-Number: 60405 Gerrit-PatchSet: 19 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Tue, 01 Feb 2022 17:47:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: comment

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