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Sudheer Amrabadi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61279 )
Change subject: herobrine: update SPI-NOR config options
......................................................................
Patch Set 7:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/61279/comment/60acdc54_593a3104
PS2, Line 7: herobrine: update SPI-NOR config options
> Add Macronix and Winbind SPI-NOR config options
The new patchset changes made to be generic not specific, hope this should not required, Can you please review the new patch-set chagnes.
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Change subject: util/ifdtool: Add additional regions for platforms that support them
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Patch Set 12: Code-Review+2
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Change subject: util/ifdtool: Add additional regions for platforms that support them
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Patch Set 12: Code-Review+1
(1 comment)
Patchset:
PS12:
This looks fine to me, but I'd like someone who actually knows something about the intel platforms to review it.
Are all of these fields public?
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Change subject: soc/intel/graphics: Create Kconfig for mapping graphic memory base
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soc/intel/graphics: Create Kconfig for mapping graphic memory base
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create SOC_INTEL_GFX_MEMBASE_OFFSET for platform to map graphic memory
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Change subject: qualcomm/sc7280: Add support for edp and mdp driver
......................................................................
Patch Set 9: Verified-1
(2 comments)
File src/mainboard/google/herobrine/mainboard.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-139905):
https://review.coreboot.org/c/coreboot/+/61342/comment/1bb28486_e6973a07
PS9, Line 61: if (display_init_required()) {
suspect code indent for conditional statements (8, 24)
File src/soc/qualcomm/sc7280/display/edp_ctrl.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-139905):
https://review.coreboot.org/c/coreboot/+/61342/comment/d845b1ca_cdc255b4
PS9, Line 863: ret = edp_start_link_train_2(ctrl,dpcd);
space required after that ',' (ctx:VxV)
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