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Change subject: [TESTME] soc/amd/common/include/ioapic: make IOAPIC IDs not depend on MAX_CPUS
......................................................................
Patch Set 5:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/55430/comment/9da593fa_13246975
PS5, Line 10: talk to each other via PCI, there is no longer the requirement that the
s/PCI/system bus (does AMD call anything FSB?)
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Change subject: soc/amd/sabrina/include/amd_pci_int_defs.h: remove PIRQ_SATA
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Change subject: soc/amd/sabrina/Kconfig: remove SOC_AMD_COMMON_BLOCK_DATA_FABRIC TODO
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Change subject: cpu/x86/lapic: Unconditionally use CPUID leaf 0xb if available
......................................................................
Patch Set 6:
(1 comment)
Patchset:
PS2:
> This was not related to X2APIC_ONLY choice problem.
CB:60213 solved X2APIC_ONLY for me with denverton_ns
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Change subject: cpu/x86/lapic: Unconditionally use CPUID leaf 0xb if available
......................................................................
Patch Set 6:
(2 comments)
File src/cpu/x86/smm/smm_stub.S:
https://review.coreboot.org/c/coreboot/+/58386/comment/0507d036_303a6fa0
PS4, Line 108: jc 1f
> the carry flag and zero flag are set as if `%eax - $0xb` is performed, so if the highest leaf is < 0 […]
Ack
https://review.coreboot.org/c/coreboot/+/58386/comment/6141b606_a1e2c523
PS4, Line 124: cmp (%ebx, %ecx, 2), %ax
> This is an idea for a follow-up, right?
Ack
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Change subject: drivers/wifi/generic: Add support for UntrustedDevice ACPI property
......................................................................
Patch Set 1:
(1 comment)
This change is ready for review.
Patchset:
PS1:
Rajat verified these patches and this is as solid as the name is going to be at this point. There is
a small chance it will change before landing upstream, but that is easy to correct.
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Change subject: soc/amd/sabrina/Kconfig: remove SOC_AMD_COMMON_BLOCK_DATA_FABRIC TODO
......................................................................
soc/amd/sabrina/Kconfig: remove SOC_AMD_COMMON_BLOCK_DATA_FABRIC TODO
The common AMD data fabric register access code is valid for Sabrina.
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Change-Id: I97fb2c6006c09297584845a83342e75058d35713
---
M src/soc/amd/sabrina/Kconfig
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/61600/1
diff --git a/src/soc/amd/sabrina/Kconfig b/src/soc/amd/sabrina/Kconfig
index 5044f8d..b0804c7 100644
--- a/src/soc/amd/sabrina/Kconfig
+++ b/src/soc/amd/sabrina/Kconfig
@@ -48,7 +48,7 @@
select SOC_AMD_COMMON_BLOCK_AOAC
select SOC_AMD_COMMON_BLOCK_APOB # TODO: Check if this is still correct
select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS # TODO: Check if this is still correct
- select SOC_AMD_COMMON_BLOCK_DATA_FABRIC # TODO: Check if this is still correct
+ select SOC_AMD_COMMON_BLOCK_DATA_FABRIC
select SOC_AMD_COMMON_BLOCK_GRAPHICS # TODO: Check if this is still correct
select SOC_AMD_COMMON_BLOCK_HAS_ESPI # TODO: Check if this is still correct
select SOC_AMD_COMMON_BLOCK_I2C
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