coreboot-gerrit February 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/alderlake: Update USB2_PORT_MAX macro
by Paul Menzel (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Tim Wawrzynczak, Sridhar Siricilla, Patrick Rudolph. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61623 ) Change subject: soc/intel/alderlake: Update USB2_PORT_MAX macro ...................................................................... Patch Set 1: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/61623/comment/f1e33d63_42f060c4 PS1, Line 7: soc/intel/alderlake: Update USB2_PORT_MAX macro Maybe: > Add Type-C support to USB2_PORT_MAX macro https://review.coreboot.org/c/coreboot/+/61623/comment/f475e739_64a56683 PS1, Line 9: USB2_PORT_MAX Can USB 2 have Type-C? -- To view, visit https://review.coreboot.org/c/coreboot/+/61623 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I464f139d8e367907191c04f9170ac53d327776ee Gerrit-Change-Number: 61623 Gerrit-PatchSet: 1 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 04 Feb 2022 20:09:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/cyan: Fixup variant GPIOs
by Paul Menzel (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Matt DeVillier. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61585 ) Change subject: mb/google/cyan: Fixup variant GPIOs ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/61585/comment/64d990ca_f13911f8 PS1, Line 7: Fixup Fix up -- To view, visit https://review.coreboot.org/c/coreboot/+/61585 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I50d4b3516eba8906042bb8dea768b229afcf11ea Gerrit-Change-Number: 61585 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: CoolStar Organization <coolstarorganization(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Fri, 04 Feb 2022 20:07:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/fizz: update VBT for karma variant
by Paul Menzel (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Matt DeVillier. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61579 ) Change subject: mb/google/fizz: update VBT for karma variant ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/61579/comment/cf30fb21_064b2b02 PS1, Line 11: Any idea what the difference is, or what is fixed? From what version was the current VBT? -- To view, visit https://review.coreboot.org/c/coreboot/+/61579 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic4165523a9114f748174c272ee206dfea80f4541 Gerrit-Change-Number: 61579 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Fri, 04 Feb 2022 20:01:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: src/driver/wifi: Add _DSM method for DDRRFIM
by Tim Wawrzynczak (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Varshit B Pandya, Subrata Banik, Maulik V Vaghela, Rizwan Qureshi, Sugnan Prabhu S, Tim Wawrzynczak. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61020 ) Change subject: src/driver/wifi: Add _DSM method for DDRRFIM ...................................................................... Patch Set 11: (2 comments) Patchset: PS11: I think we should take a slightly different approach here. The problem we need to solve is the drivers/wifi/generic driver needs to know whether or not DDR RFIM is enabled for the CNVi device. Right now that is enabled via an SoC config, which means that, as is, this code would have to reach into the SoC chip, which is not really what we want here. Instead, I think we can reverse where the CnviDdrRfim option lives; we can move it here, in this chip driver, and then the SoC code can go ask this code whether or not it's enabled, since the SoC is the one that knows whether or not it will have a CNVi device. Here is a WIP patch about what I am thinking: https://review.coreboot.org/c/coreboot/+/61638 this should make it easier to implement this and also will work for future platforms File src/drivers/wifi/generic/acpi.c: https://review.coreboot.org/c/coreboot/+/61020/comment/22a5c36b_5d866f42 PS11, Line 152: static void wifi_dsm_ddrrfim_func3_cb(void *ptr) > I believe this code need little more generalisation (refer to src/drivers//uart/acpi/acpi. […] I have an idea of how this property can be better organized, I pushed a WIP patch here: https://review.coreboot.org/c/coreboot/+/61638 -- To view, visit https://review.coreboot.org/c/coreboot/+/61020 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I217b736df3d4224a6732d1941a160abcddbd8f37 Gerrit-Change-Number: 61020 Gerrit-PatchSet: 11 Gerrit-Owner: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-CC: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Comment-Date: Fri, 04 Feb 2022 19:53:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/cse: Add function to perform CSE lock configuration
by Subrata Banik (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Tim Wawrzynczak, Sridhar Siricilla, Werner Zeh, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61520 ) Change subject: soc/intel/common/cse: Add function to perform CSE lock configuration ...................................................................... Patch Set 6: (1 comment) File src/soc/intel/common/block/cse/cse.c: https://review.coreboot.org/c/coreboot/+/61520/comment/78450195_77fd17be PS6, Line 1018: (cse_is_hfs1_com_normal() || cse_is_hfs1_com_soft_temp_disable()) > Only BIOS should have capability to trigger global reset and sending GLOBAL RESET MEI message. > Recommendations as follow: > > 1. BIOS should send GLOBAL RESET MEI command if CSE is not in error state and not sent EOP command before. This is to avoid the synchronization issues between host and CSE. > > 2. If CSE is in error state, *BIOS* should trigger global reset by setting PCH register(I/O 0xCF9 write of 06h or 0Eh command with PMC PWRM offset 1048h register bit [20] CF9GR). > > 3. If FWSTS1[4] (non-production environment) is set, allow OS to trigger global reset by setting the PCH register(as said in Point#2) . In this scenario, BIOS shouldn't lock global reset config. I don't agree that it scoped any where saying *just BIOS* as you have highlighted (please point me to exact section in ME BWG). IMO, there are 2 ways to manage the global reset 1. Using PMC 2. CSE MEI command When CSE is always in bad state then how can one follow #2 so the only way is #1 hence, we should avoid locking the PMC cf9. Kindly check with FSP POC if my understanding is not correct, I can see FSP also assumes since many generation now the same what I just said above. -- To view, visit https://review.coreboot.org/c/coreboot/+/61520 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3894b2cd8b90dc033f475384486815ab2fadf381 Gerrit-Change-Number: 61520 Gerrit-PatchSet: 6 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 04 Feb 2022 19:04:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8173/dramc_pi_calibration_api.c: Remove duplicated "ER...
by HAOUAS Elyes (Code Review) 04 Feb '22

04 Feb '22

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/61637 ) Change subject: soc/mediatek/mt8173/dramc_pi_calibration_api.c: Remove duplicated "ERROR" in log message ...................................................................... soc/mediatek/mt8173/dramc_pi_calibration_api.c: Remove duplicated "ERROR" in log message Change-Id: I846c21bd690372ec416fb3d3b3954bf181b0204c Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/mediatek/mt8173/dramc_pi_calibration_api.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/61637/1 diff --git a/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c b/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c index 0145c4e..537c6ac 100644 --- a/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c +++ b/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c @@ -591,7 +591,7 @@ if (hold == 0) { /* like this: (mean this bit is error) */ /* xxxxxxxxxxxxxxxxxxxxx|xxxxxxxxxxxxxxxxxxxxxxxxx */ - printk(BIOS_ERR, "ERROR, error bit %d, " + printk(BIOS_ERR, "error bit %d, " "setup_time = hold_time = 0!!\n", bit); fail = 1; } -- To view, visit https://review.coreboot.org/c/coreboot/+/61637 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I846c21bd690372ec416fb3d3b3954bf181b0204c Gerrit-Change-Number: 61637 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/quark/storage_test.c: Remove duplicated "ERROR" in log message
by HAOUAS Elyes (Code Review) 04 Feb '22

04 Feb '22

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/61636 ) Change subject: soc/intel/quark/storage_test.c: Remove duplicated "ERROR" in log message ...................................................................... soc/intel/quark/storage_test.c: Remove duplicated "ERROR" in log message Change-Id: I7697512a63b58ca7d7200c74a409822389db0762 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/intel/quark/storage_test.c 1 file changed, 1 insertion(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/61636/1 diff --git a/src/soc/intel/quark/storage_test.c b/src/soc/intel/quark/storage_test.c index e7e4646..04c6736 100644 --- a/src/soc/intel/quark/storage_test.c +++ b/src/soc/intel/quark/storage_test.c @@ -184,8 +184,7 @@ err = sdhci_controller_init(sdhci_ctrlr, (void *)bar); if (err) { display_log(); - printk(BIOS_ERR, - "ERROR - Controller failed to initialize, err = %d\n", + printk(BIOS_ERR, "Controller failed to initialize, err = %d\n", err); return; } -- To view, visit https://review.coreboot.org/c/coreboot/+/61636 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7697512a63b58ca7d7200c74a409822389db0762 Gerrit-Change-Number: 61636 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/amd/sabrina/Kconfig: remove TODO from SOC_AMD_COMMON_BLOCK_IOMMU
by Raul Rangel (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61633 ) Change subject: soc/amd/sabrina/Kconfig: remove TODO from SOC_AMD_COMMON_BLOCK_IOMMU ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/61633 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4c2e8553fde9467ca1b5e9085e36c33d138b7156 Gerrit-Change-Number: 61633 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 04 Feb 2022 18:59:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: nb/amd/pi/00730F01/iommu: call pci_dev_set_resources directly
by Raul Rangel (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61632 ) Change subject: nb/amd/pi/00730F01/iommu: call pci_dev_set_resources directly ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/61632 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I59c20e61a36fcc11b59d786139b4745ff662e560 Gerrit-Change-Number: 61632 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 04 Feb 2022 18:59:30 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: nb,soc/amd/*/iommu: fix comment about IOMMU MMIO resource
by Raul Rangel (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61631 ) Change subject: nb,soc/amd/*/iommu: fix comment about IOMMU MMIO resource ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/61631 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2e1e3a46b839b9e58b836932c1bc9b41b1b1dc02 Gerrit-Change-Number: 61631 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 04 Feb 2022 18:59:15 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit February 2022