coreboot-gerrit November 2022

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[master]: [test]mb/google/brya/marasov: Add memory config for marasov
by Frank Chu (Code Review) 03 Nov '22

03 Nov '22

Attention is currently required from: Tarun Tuli, Frank Chu. Hello build bot (Jenkins), Tarun Tuli, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69149 to look at the new patch set (#6). Change subject: [test]mb/google/brya/marasov: Add memory config for marasov ...................................................................... [test]mb/google/brya/marasov: Add memory config for marasov Configure the rcomp, dqs and dq tables based on the schematic. BUG=b:254365935 BRANCH=None TEST=Built successfully Signed-off-by: Frank Chu <Frank_Chu(a)pegatron.corp-partner.google.com> Change-Id: I8c9541006828deae83e2ae4a860f40d7433662d4 --- A src/mainboard/google/brya/variants/marasov/Makefile.inc A src/mainboard/google/brya/variants/marasov/memory.c 2 files changed, 131 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/69149/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/69149 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8c9541006828deae83e2ae4a860f40d7433662d4 Gerrit-Change-Number: 69149 Gerrit-PatchSet: 6 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: [test]mb/google/brya/marasov: Add memory config for marasov
by Frank Chu (Code Review) 03 Nov '22

03 Nov '22

Attention is currently required from: Tarun Tuli, Frank Chu. Hello build bot (Jenkins), Tarun Tuli, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69149 to look at the new patch set (#5). Change subject: [test]mb/google/brya/marasov: Add memory config for marasov ...................................................................... [test]mb/google/brya/marasov: Add memory config for marasov Configure the rcomp, dqs and dq tables based on the schematic. BUG=b:254365935 TEST=Built successfully Signed-off-by: Frank Chu <Frank_Chu(a)pegatron.corp-partner.google.com> Change-Id: I8c9541006828deae83e2ae4a860f40d7433662d4 --- A src/mainboard/google/brya/variants/marasov/Makefile.inc A src/mainboard/google/brya/variants/marasov/memory.c 2 files changed, 130 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/69149/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/69149 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8c9541006828deae83e2ae4a860f40d7433662d4 Gerrit-Change-Number: 69149 Gerrit-PatchSet: 5 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: soc/intel/alderlake: Add IBECC
by Subrata Banik (Code Review) 03 Nov '22

03 Nov '22

Attention is currently required from: Tarun Tuli, Paul Menzel, Christian Walter, Tim Wawrzynczak, Maximilian Brune, David Milosevic. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68756 ) Change subject: soc/intel/alderlake: Add IBECC ...................................................................... Patch Set 7: (2 comments) File src/soc/intel/alderlake/romstage/fsp_params.c: https://review.coreboot.org/c/coreboot/+/68756/comment/d6d5958f_1376c86f PS7, Line 382: printk(BIOS_DEBUG, "Enable IBECC\n"); I don't think this is meaningful https://review.coreboot.org/c/coreboot/+/68756/comment/a6e095c0_8c3f4694 PS7, Line 369: : /* In-Band ECC configuration */ : if (config->ibecc.enable) { : m_cfg->Ibecc = config->ibecc.enable; : m_cfg->IbeccOperationMode = config->ibecc.mode; : if (m_cfg->IbeccOperationMode == IBECC_MODE_PER_REGION) { : FSP_ARRAY_LOAD(m_cfg->IbeccProtectedRangeEnable, : config->ibecc.range_enable); : FSP_ARRAY_LOAD(m_cfg->IbeccProtectedRangeBase, : config->ibecc.range_base); : FSP_ARRAY_LOAD(m_cfg->IbeccProtectedRangeMask, : config->ibecc.range_mask); : } : printk(BIOS_DEBUG, "Enable IBECC\n"); : } please help to create a small helper routine and call into it from line #364 -- To view, visit https://review.coreboot.org/c/coreboot/+/68756 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9cc2ed6defa1223aa422b9b0d8145f8f8b3dd12e Gerrit-Change-Number: 68756 Gerrit-PatchSet: 7 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Milosevic <David.Milosevic(a)9elements.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: David Milosevic <David.Milosevic(a)9elements.com> Gerrit-Comment-Date: Thu, 03 Nov 2022 08:30:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: common/acpi/dptc: Implement DTTS Proposal
by EricKY Cheng (Code Review) 03 Nov '22

03 Nov '22

Attention is currently required from: Raul Rangel, EricKY Cheng, Matt DeVillier, Paul Menzel, Tim Van Patten, Eric Peers, Jason Glenesk, Caveh Jalali, Tim Wawrzynczak, Fred Reitberger, Karthikeyan Ramasubramanian, Boris Mittelberg, Felix Held. EricKY Cheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68471 ) Change subject: common/acpi/dptc: Implement DTTS Proposal ...................................................................... Patch Set 25: (1 comment) File src/soc/amd/common/acpi/dptc.asl: https://review.coreboot.org/c/coreboot/+/68471/comment/3d3f71a3_6ad8cf3f PS12, Line 44: TIN4 > This was not done. Raul is asking for this code to be moved out of the common `dptc. […] As your and Raul suggestions, you mean move all these change out of dptc.asl? For more detail, you mean keeping dptc.asl as original and building another asl code under winterhold variant for ec.asl calling in the host event? -- To view, visit https://review.coreboot.org/c/coreboot/+/68471 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I866e5e497e2936984e713029b5f0b6d54cbc9622 Gerrit-Change-Number: 68471 Gerrit-PatchSet: 25 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 03 Nov 2022 08:28:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Comment-In-Reply-To: Tim Van Patten <timvp(a)google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: drivers/i2c/generic: Tweak error text for missing HID
by 9elements QA (Code Review) 03 Nov '22

03 Nov '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69062 ) Change subject: drivers/i2c/generic: Tweak error text for missing HID ...................................................................... Patch Set 3: Automatic boot test returned (PASS/FAIL/TOTAL): 14 / 2 / 16 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/133085 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/133084 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/133083 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/133082 FAIL: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/133081 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/133080 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/133079 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/133078 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/133077 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/133076 FAIL: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/133075 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/133074 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/133073 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/133072 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/133071 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/133070 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/69062 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1795aee240a5383b21108c697e930a2e4972a0b4 Gerrit-Change-Number: 69062 Gerrit-PatchSet: 3 Gerrit-Owner: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Thu, 03 Nov 2022 08:28:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: device/xhci: Factor out common PORTSC code
by Subrata Banik (Code Review) 03 Nov '22

03 Nov '22

Attention is currently required from: Robert Zieba, Tarun Tuli, Nick Vaccaro, Angel Pons, Martin Roth. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67933 ) Change subject: device/xhci: Factor out common PORTSC code ...................................................................... Patch Set 7: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/67933 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I045405ed224aa8f48f6f628b7d49ec6bafb450d7 Gerrit-Change-Number: 67933 Gerrit-PatchSet: 7 Gerrit-Owner: Robert Zieba <robertzieba(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Robert Zieba <robertzieba(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Comment-Date: Thu, 03 Nov 2022 08:27:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/intel/meteorlake: Provide mitigation support for CNVi RFI
by Subrata Banik (Code Review) 03 Nov '22

03 Nov '22

Attention is currently required from: Tarun Tuli, John Zhao, Kapil Porwal, Tim Wawrzynczak, Sumeet R Pawnikar. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67789 ) Change subject: soc/intel/meteorlake: Provide mitigation support for CNVi RFI ...................................................................... Patch Set 6: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/67789/comment/9be717e1_131a449e PS6, Line 18: This CL has the back port of ADL commit : 6f73a202d3df000fb2fd83080e0b148add344485. : please move this line outside `TEST` and use commit hash as below example: Backport changes from commit hash 84532dae1 (soc/intel/alderlake: Change VBOOT_HASH_BLOCK_SIZE to 4 KiB). -- To view, visit https://review.coreboot.org/c/coreboot/+/67789 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I87110bc10b98a27a8f274680597b15a1df488824 Gerrit-Change-Number: 67789 Gerrit-PatchSet: 6 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: John Zhao <john.zhao(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Comment-Date: Thu, 03 Nov 2022 08:26:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/intel/meteorlake: Provide mitigation support for CNVi RFI
by Subrata Banik (Code Review) 03 Nov '22

03 Nov '22

Attention is currently required from: Tarun Tuli, John Zhao, Kapil Porwal, Tim Wawrzynczak, Sumeet R Pawnikar. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67789 ) Change subject: soc/intel/meteorlake: Provide mitigation support for CNVi RFI ...................................................................... Patch Set 6: (1 comment) File src/soc/intel/meteorlake/romstage/fsp_params.c: https://review.coreboot.org/c/coreboot/+/67789/comment/1b59eeb1_a4c467c3 PS6, Line 286: fill_fspm_audio_params, : fill_fspm_cnvi_params, : fill_fspm_cpu_params, : fill_fspm_igd_params, : fill_fspm_ipu_params, : fill_fspm_ish_params, : fill_fspm_misc_params, : fill_fspm_mrc_params, : fill_fspm_pcie_rp_params, : fill_fspm_security_params, : fill_fspm_smbus_params, : fill_fspm_tcss_params, : fill_fspm_trace_params, : fill_fspm_uart_params, thanks for settings the order but I would either recommend that to migrate into an another CL or explicitly mentioning the same in the commit msg -- To view, visit https://review.coreboot.org/c/coreboot/+/67789 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I87110bc10b98a27a8f274680597b15a1df488824 Gerrit-Change-Number: 67789 Gerrit-PatchSet: 6 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: John Zhao <john.zhao(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Comment-Date: Thu, 03 Nov 2022 08:24:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/brya: Create marasov variant
by Subrata Banik (Code Review) 03 Nov '22

03 Nov '22

Attention is currently required from: Frank Chu. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69052 ) Change subject: mb/google/brya: Create marasov variant ...................................................................... Patch Set 8: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69052 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe2dc442480f6a73877b40625e228cdb2038aa4d Gerrit-Change-Number: 69052 Gerrit-PatchSet: 8 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Kyle Lin <kylelinck(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Comment-Date: Thu, 03 Nov 2022 08:22:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/rex: Fix fw_config probe for UFC and WFC
by Subrata Banik (Code Review) 03 Nov '22

03 Nov '22

Attention is currently required from: Tarun Tuli, Kapil Porwal. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69152 ) Change subject: mb/google/rex: Fix fw_config probe for UFC and WFC ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69152 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5103e7da04004414d96f42057c105cf9fbf51b25 Gerrit-Change-Number: 69152 Gerrit-PatchSet: 1 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Thu, 03 Nov 2022 08:21:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit November 2022