coreboot-gerrit November 2022

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: soc/mediatek/mt8188: Disable input-gating for big-core SRAM
by Rex-BC Chen (Code Review) 03 Nov '22

03 Nov '22

Attention is currently required from: Hung-Te Lin, Liju-Clr Chen. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69089 ) Change subject: soc/mediatek/mt8188: Disable input-gating for big-core SRAM ...................................................................... Patch Set 12: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/69089 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifd68fe9362587955cdb8598c4cc5c2d0eefe53ca Gerrit-Change-Number: 69089 Gerrit-PatchSet: 12 Gerrit-Owner: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Thu, 03 Nov 2022 08:17:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/mediatek/mt8188: Fix AP hang when enabling cpufreq-hw driver
by Rex-BC Chen (Code Review) 03 Nov '22

03 Nov '22

Attention is currently required from: Hung-Te Lin, Liju-Clr Chen, Paul Menzel. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69088 ) Change subject: soc/mediatek/mt8188: Fix AP hang when enabling cpufreq-hw driver ...................................................................... Patch Set 12: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/69088 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I67b08c38a31a7eae1bc59543a5148a78b61456d6 Gerrit-Change-Number: 69088 Gerrit-PatchSet: 12 Gerrit-Owner: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Thu, 03 Nov 2022 08:16:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/brask/var/kuldax: Update PsysPL2 and PsysPmax
by Derek Huang (Code Review) 03 Nov '22

03 Nov '22

Attention is currently required from: David Wu, Tarun Tuli, Ren Kuo, Nick Vaccaro. Derek Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69155 ) Change subject: mb/google/brask/var/kuldax: Update PsysPL2 and PsysPmax ...................................................................... Patch Set 2: (1 comment) File src/mainboard/google/brya/variants/kuldax/ramstage.c: https://review.coreboot.org/c/coreboot/+/69155/comment/155d103d_4c625125 PS2, Line 23: 83 how is the number calculated? -- To view, visit https://review.coreboot.org/c/coreboot/+/69155 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0ffad751e8a99b282a5d05563a60745ee09e892c Gerrit-Change-Number: 69155 Gerrit-PatchSet: 2 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Thu, 03 Nov 2022 08:09:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: common/acpi/dptc: Implement DTTS Proposal
by EricKY Cheng (Code Review) 03 Nov '22

03 Nov '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Caveh Jalali, Paul Menzel, Tim Wawrzynczak, Tim Van Patten, Eric Peers, Fred Reitberger, Karthikeyan Ramasubramanian, Boris Mittelberg, Felix Held. EricKY Cheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68471 ) Change subject: common/acpi/dptc: Implement DTTS Proposal ...................................................................... Patch Set 25: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/68471/comment/34eba79a_2267c923 PS21, Line 9: Thermal table switches to different modes to meet 6 : user experience. > nit: Implement dynamic thermal table switching flow chart. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/68471 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I866e5e497e2936984e713029b5f0b6d54cbc9622 Gerrit-Change-Number: 68471 Gerrit-PatchSet: 25 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 03 Nov 2022 07:53:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Van Patten <timvp(a)google.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: common/acpi/dptc: Implement DTTS Proposal
by EricKY Cheng (Code Review) 03 Nov '22

03 Nov '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Caveh Jalali, Paul Menzel, Tim Wawrzynczak, Tim Van Patten, Eric Peers, Fred Reitberger, Karthikeyan Ramasubramanian, Boris Mittelberg, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Caveh Jalali, Matt DeVillier, Tim Wawrzynczak, Eric Peers, Tim Van Patten, Fred Reitberger, Karthikeyan Ramasubramanian, Boris Mittelberg, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68471 to look at the new patch set (#25). Change subject: common/acpi/dptc: Implement DTTS Proposal ...................................................................... common/acpi/dptc: Implement DTTS Proposal DTTS indicated Dynamic Thermal Table Switching. The proposal would like to develop the schematic for switching 6 thermal table by lid status, machine body mode and temperature. After entering the OS, the thermal table would be table A. If the “Motion” or “Lid-status changement” is detected. The thermal table would switch to laptop mode or lid-close mode. Once the higher environment temperatures are detected, the thermal table would switch to the corresponding power throttle table(B, D or F). Based on these table switching mechanisms, no matter how the end-user uses Chromebook, they could enjoy more humanized thermal designs. Release Over Over Release Temp. Temp. Temp. Temp. -------------------------------------------------------- Desktop mode Table A Table B 50C 45C Lid open (Default) -------------------------------------------------------- Desktop mode Table C Table D 55C 50C Lid close -------------------------------------------------------- Laptop mode Table E Table F 45C 40C -------------------------------------------------------- On the proposal, the transmission rules are list below: 1. Table A is the default table after booting. 2. A, C, E can switch to each other. 3. B, D, F can switch to each other. 4. A and B, C and D, E and F can switch to each other. 5. Assume Table A is current table. When the temperature reach 50C, than the table is switched from A to B. 6. Based on 4. The current table is B. When the temperature is downgrade below 45C, the table is switched form B to A. 7. Based on 4 an 5, the same rule is for C and D, E and F. BRANCH=none BUG=b:232946420 TEST=emerge-skyrim coreboot Signed-off-by: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Change-Id: I866e5e497e2936984e713029b5f0b6d54cbc9622 --- M src/ec/google/chromeec/acpi/ec.asl M src/soc/amd/common/acpi/dptc.asl 2 files changed, 126 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/68471/25 -- To view, visit https://review.coreboot.org/c/coreboot/+/68471 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I866e5e497e2936984e713029b5f0b6d54cbc9622 Gerrit-Change-Number: 68471 Gerrit-PatchSet: 25 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: nb/intel/gm45: Make polling loops more explicit
by 9elements QA (Code Review) 03 Nov '22

03 Nov '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69077 ) Change subject: nb/intel/gm45: Make polling loops more explicit ...................................................................... Patch Set 3: Automatic boot test returned (PASS/FAIL/TOTAL): 14 / 2 / 16 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/133068 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/133067 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/133066 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/133065 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/133064 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/133063 FAIL: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/133062 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/133061 FAIL: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/133060 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/133059 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/133058 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/133057 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/133056 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/133055 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/133054 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/133053 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/69077 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifbf3cf072f8b817b2fdeece4ef89bae0822bb6e6 Gerrit-Change-Number: 69077 Gerrit-PatchSet: 3 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Thu, 03 Nov 2022 07:43:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/intel: Include <cpu/cpu.h> instead of <arch/cpu.h>
by Elyes Haouas (Code Review) 03 Nov '22

03 Nov '22

Attention is currently required from: Tarun Tuli, Kapil Porwal, Lean Sheng Tan, Werner Zeh. Hello build bot (Jenkins), Sean Rhodes, Tarun Tuli, Subrata Banik, Kapil Porwal, Lean Sheng Tan, Werner Zeh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69032 to look at the new patch set (#2). Change subject: soc/intel: Include <cpu/cpu.h> instead of <arch/cpu.h> ...................................................................... soc/intel: Include <cpu/cpu.h> instead of <arch/cpu.h> Also sort includes. Change-Id: I7da9c672ee230dfaebd943247639b78d675957e4 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/soc/intel/alderlake/bootblock/report_platform.c M src/soc/intel/alderlake/bootblock/update_descriptor.c M src/soc/intel/apollolake/report_platform.c M src/soc/intel/baytrail/ramstage.c M src/soc/intel/braswell/ramstage.c M src/soc/intel/broadwell/report_platform.c M src/soc/intel/cannonlake/bootblock/report_platform.c M src/soc/intel/common/block/acpi/acpi.c M src/soc/intel/common/block/acpi/sgx.c M src/soc/intel/common/block/cpu/cpulib.c M src/soc/intel/common/block/cse/cse_lite.c M src/soc/intel/common/block/timer/timer.c M src/soc/intel/elkhartlake/bootblock/report_platform.c M src/soc/intel/icelake/bootblock/report_platform.c M src/soc/intel/jasperlake/bootblock/report_platform.c M src/soc/intel/meteorlake/bootblock/report_platform.c M src/soc/intel/meteorlake/cpu.c M src/soc/intel/quark/include/soc/ramstage.h M src/soc/intel/quark/romstage/report_platform.c M src/soc/intel/skylake/acpi.c M src/soc/intel/skylake/bootblock/report_platform.c M src/soc/intel/tigerlake/bootblock/report_platform.c M src/soc/intel/tigerlake/lpm.c 23 files changed, 69 insertions(+), 58 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/69032/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69032 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7da9c672ee230dfaebd943247639b78d675957e4 Gerrit-Change-Number: 69032 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: soc/intel: Include <cpu/cpu.h> instead of <arch/cpu.h>
by Elyes Haouas (Code Review) 03 Nov '22

03 Nov '22

Attention is currently required from: Tarun Tuli, Kapil Porwal, Lean Sheng Tan, Werner Zeh. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69032 ) Change subject: soc/intel: Include <cpu/cpu.h> instead of <arch/cpu.h> ...................................................................... Patch Set 1: (2 comments) Patchset: PS1: Thank you File src/soc/intel/common/block/cse/cse_lite.c: https://review.coreboot.org/c/coreboot/+/69032/comment/fa337a03_00e1c84f PS1, Line 11: #include <intelblocks/cse_layout.h> : #include <intelblocks/cse.h> > nit: I would leave this two ion their original order, looks somehow weird this way...But up to you. Done. -- To view, visit https://review.coreboot.org/c/coreboot/+/69032 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7da9c672ee230dfaebd943247639b78d675957e4 Gerrit-Change-Number: 69032 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Thu, 03 Nov 2022 07:12:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/clevo/l140cu: work around PECI staying high when idle, blocking s0ix
by 9elements QA (Code Review) 03 Nov '22

03 Nov '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68793 ) Change subject: mb/clevo/l140cu: work around PECI staying high when idle, blocking s0ix ...................................................................... Patch Set 12: Automatic boot test returned (PASS/FAIL/TOTAL): 15 / 1 / 16 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/133050 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/133049 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/133048 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/133047 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/133046 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/133045 FAIL: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/133044 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/133043 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/133042 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/133041 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/133040 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/133039 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/133038 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/133037 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/133036 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/133035 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/68793 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib5a6b0ad3553c2cf795037d6a1982102bcb04644 Gerrit-Change-Number: 68793 Gerrit-PatchSet: 12 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Thu, 03 Nov 2022 07:02:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/brya/variants/crota:Configure TDC current for VR domains.
by Johnny Li (Code Review) 03 Nov '22

03 Nov '22

Attention is currently required from: Tim Wawrzynczak. Johnny Li has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69135 ) Change subject: mb/google/brya/variants/crota:Configure TDC current for VR domains. ...................................................................... Patch Set 8: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/69135/comment/3ddedd06_34bc44e9 PS7, Line 7: : > extra : still here Done -- To view, visit https://review.coreboot.org/c/coreboot/+/69135 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ife36655f077bae567bff3c3e33f779c990cf5ed9 Gerrit-Change-Number: 69135 Gerrit-PatchSet: 8 Gerrit-Owner: Johnny Li <johnny_li(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Peter Chi <peter_chi(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Comment-Date: Thu, 03 Nov 2022 06:41:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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