coreboot-gerrit January 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: drivers/intel/fsp: Map FSP debug level to coreboot console level
by Subrata Banik (Code Review) 01 Jan '22

01 Jan '22

Attention is currently required from: Subrata Banik, Paul Menzel, Tim Wawrzynczak, Angel Pons, Andrey Petrov, Patrick Rudolph, EricR Lai. Hello build bot (Jenkins), Nico Huber, Tim Wawrzynczak, Angel Pons, Andrey Petrov, Patrick Rudolph, EricR Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60471 to look at the new patch set (#5). Change subject: drivers/intel/fsp: Map FSP debug level to coreboot console level ...................................................................... drivers/intel/fsp: Map FSP debug level to coreboot console level This patch maps coreboot console level to FSP debug level. This is useful to suppress MRC (FSP-M) debug logs. Callers have to select HAVE_DEBUG_RAM_SETUP config to get verbose MRC debug log, Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I398d576fad68a0d0fc931c175bbc04fcbc2e54ec --- M src/drivers/intel/fsp2_0/debug.c M src/drivers/intel/fsp2_0/include/fsp/debug.h 2 files changed, 47 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/60471/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/60471 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I398d576fad68a0d0fc931c175bbc04fcbc2e54ec Gerrit-Change-Number: 60471 Gerrit-PatchSet: 5 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: console: Make get_log_level a public function
by Subrata Banik (Code Review) 01 Jan '22

01 Jan '22

Attention is currently required from: Nico Huber, Tim Wawrzynczak, Angel Pons, EricR Lai. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60470 ) Change subject: console: Make get_log_level a public function ...................................................................... Patch Set 3: (1 comment) File src/console/init.c: https://review.coreboot.org/c/coreboot/+/60470/comment/3feee7f9_96df25ac PS2, Line 55: return get_log_level(); > My initial thought was to have a function that complements the existing […] Ack and sure. Thanks Angel and Nico for feedback -- To view, visit https://review.coreboot.org/c/coreboot/+/60470 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I56349f22c71c9db757b2be8eeb2dbfe959f80397 Gerrit-Change-Number: 60470 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Sat, 01 Jan 2022 20:47:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: console: Make get_log_level a public function
by Subrata Banik (Code Review) 01 Jan '22

01 Jan '22

Attention is currently required from: Subrata Banik, Tim Wawrzynczak, Angel Pons, EricR Lai. Hello build bot (Jenkins), Nico Huber, Tim Wawrzynczak, Angel Pons, EricR Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60470 to look at the new patch set (#4). Change subject: console: Make get_log_level a public function ...................................................................... console: Make get_log_level a public function Other drivers may need to know the coreboot log level hence, export this function rather marking it static. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I56349f22c71c9db757b2be8eeb2dbfe959f80397 --- M src/console/init.c M src/include/console/console.h 2 files changed, 3 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/60470/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/60470 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I56349f22c71c9db757b2be8eeb2dbfe959f80397 Gerrit-Change-Number: 60470 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: Add provision to enable SoC debug interface
by Subrata Banik (Code Review) 01 Jan '22

01 Jan '22

Subrata Banik has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/60536 ) Change subject: soc/intel/alderlake: Add provision to enable SoC debug interface ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/60536 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I259c8069414de5b045a59279a3e4a62bc392588f Gerrit-Change-Number: 60536 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: soc/intel/alderlake: Add provision to enable SoC debug interface
by Subrata Banik (Code Review) 01 Jan '22

01 Jan '22

Attention is currently required from: Nico Huber, Tim Wawrzynczak, Angel Pons, Patrick Rudolph, EricR Lai. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60536 ) Change subject: soc/intel/alderlake: Add provision to enable SoC debug interface ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > I'm a bit confused by this. It seems only useful if one wants to debug > raminit. Yes. I think I have mixed two things together. A. enable to have verbose MRC prints B. Enable SoC debug interface. This might not right to combine into one high-level Kconfig. > "The top level switch" sounds like something one would want > always enabled for debugging, OTOH. If it's just what you need right > now for convenience, you could also add something to site-local/? I have used the word `switch` to cover the mix up between log and debug interface. Ideally there may not be any need to enable DCI like interface when someone just need detailed MRC MSG. I think, better I will mark this CL as WIP or delete it. selecting DEBUG_RAM_SETUP won't be too much of task for mb users hopefully. -- To view, visit https://review.coreboot.org/c/coreboot/+/60536 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I259c8069414de5b045a59279a3e4a62bc392588f Gerrit-Change-Number: 60536 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Sat, 01 Jan 2022 20:27:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in coreboot[master]: util/inteltool: Add support for Tiger Lake chips detection and GPIOs
by Michael Niewöhner (Code Review) 01 Jan '22

01 Jan '22

Attention is currently required from: Felix Singer, Wonkyu Kim, Michał Żygowski, Ravishankar Sarawadi, Stefan Reinauer, Angel Pons. Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56171 ) Change subject: util/inteltool: Add support for Tiger Lake chips detection and GPIOs ...................................................................... Patch Set 4: (2 comments) File util/inteltool/gpio_names/tigerlake.h: PS4: > Hmmm, shouldn't this have a license? Looks like other headers in gpio_names don't have a license eit […] I don't think this would be copyrightable/licensable anyway https://review.coreboot.org/c/coreboot/+/56171/comment/7c5b344c_2fc8087f PS4, Line 300: /* : * GPP_A group does not start right after GPP_T group and GPP_T group does not : * start right after GPP_B. Fill the holes with Reserved on both sides. : */ > Well, to me it looks like some GPP_T GPIOs are undocumented. Yep. I'd stumbled upon that, too. Either most T/U gpios have no pin or they reside on some "RSVD" pins... -- To view, visit https://review.coreboot.org/c/coreboot/+/56171 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6071a999be9e8a372997db0369218f297e579d08 Gerrit-Change-Number: 56171 Gerrit-PatchSet: 4 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Wonkyu Kim Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Wonkyu Kim Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sat, 01 Jan 2022 20:25:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/cse: Implement HECI notify
by Subrata Banik (Code Review) 01 Jan '22

01 Jan '22

Attention is currently required from: Arthur Heymans, Felix Singer, Tim Wawrzynczak, Angel Pons, Patrick Rudolph, EricR Lai. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60405 ) Change subject: soc/intel/common/cse: Implement HECI notify ...................................................................... Patch Set 8: (1 comment) File src/soc/intel/common/block/cse/cse_eop.c: https://review.coreboot.org/c/coreboot/+/60405/comment/a13103d4_1ae132fe PS7, Line 279: HeciEnabled > Ah, the HECI device can be enabled and initialised in coreboot, but hidden before booting an OS. So, if I understand correctly, there are multiple cases: Yes, you can assume that HECI is default enabled and you can't disable the HECI in the regular operational mode. The only possibility is to make it function disable prior booting to the OS. > > 1. HECI device disabled: I think this happens when CSE is in an abnormal state (e.g. because of some error or because it has been disabled). This situation should be detected at runtime and dealt with accordingly. Yes, Mostly like EOP failure scenarios. > > 2. HECI device enabled, and left visible: This is the simplest thing to do when the CSE is running normally, but I'm not sure if there are any drawbacks. I know Windows Device Manager shows a "yellow bang" for the HECI device when its drivers aren't installed, but it's not a serious problem. You've correctly pointed out. When you don't have a HECI driver installed then ideally it's like Yellow bang or in linux, it tries to bind a generic PCI driver. There was an issue reported starting with SKL or KBL (I forgot the platform name) where the system was unable to enter into S0ix due to HECI. The debug data we had at that time was pointing to any access to HECI device PCI configuration space causing the non-entering to S0ix issue. Later we had to find a way to make HECI function disable when we don't have a driver in Chrome OS. This was the case mostly till CML, hence, you may find most of the Chrome platform prior to TGL had HeciEnabled set to `0` and post TGL it's set to `1` . Now I don't think we need to use `HeciEnabled` for any platform going forward. > > 3. HECI device enabled, but hidden before booting an OS: I think this is to avoid the Windows Device Manager "yellow bang" thing when the drivers aren't installed, and I think it also saves a bit of power by keeping the HECI device in D0i3. Other than that, I'm not sure if there are any other reasons to do this. Yes, I have mentioned the issue in detail, why we had to come up with HeciEnabled config variable. > > Case 1 would be handled as part of the CSE error handling flows, so we don't need to worry about it in this commit. Cases 2 and 3 are with CSE running normally. This makes me wonder: are there any reasons to prefer case 2 over case 3, or viceversa? If so, which ones? I hope now you have context as well, reading the issue descriptor above. > > If there's no (mainboard-specific) reason for a particular mainboard to require either case 2 or case 3, I was thinking of having a user-configurable Kconfig option to control hiding the HECI device. This still allows mainboards to override the default setting, and also allows non-mainboard code to do so. For instance, if Chrome OS needs case 3, one would only need to override the default once with `if CHROMEOS` or similar. I think we can take a few actions as below based on our discussion 1. Retire HeciEnabled from all SOC and MB.2. Replace the functionality that HeciEnable was achieving with DT CSE PCI device on/off. Typically this can manage Case #2 above.3. SoC code to make CSE hidden (almost case #3 above) when both DT CSE PCI device is off and the user selects HECI_DISABLE_USING_SMM config.This can also provide flexibility in the hand of mb user to choose if they wish to pick between case #2 or #3. WDYT? > > Thoughts? -- To view, visit https://review.coreboot.org/c/coreboot/+/60405 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I70bde33f77026e8be165ff082defe3cab6686ec7 Gerrit-Change-Number: 60405 Gerrit-PatchSet: 8 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Sat, 01 Jan 2022 20:20:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Add provision to enable SoC debug interface
by Nico Huber (Code Review) 01 Jan '22

01 Jan '22

Attention is currently required from: Subrata Banik, Tim Wawrzynczak, Angel Pons, Patrick Rudolph, EricR Lai. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60536 ) Change subject: soc/intel/alderlake: Add provision to enable SoC debug interface ...................................................................... Patch Set 2: (2 comments) Patchset: PS2: I'm a bit confused by this. It seems only useful if one wants to debug raminit. "The top level switch" sounds like something one would want always enabled for debugging, OTOH. If it's just what you need right now for convenience, you could also add something to site-local/? File src/soc/intel/alderlake/Kconfig: https://review.coreboot.org/c/coreboot/+/60536/comment/319a3f60_b20c4b32 PS2, Line 114: The top level switch to enable soc debug interface This should give a hint about what it does, e.g. very verbose debug output. -- To view, visit https://review.coreboot.org/c/coreboot/+/60536 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I259c8069414de5b045a59279a3e4a62bc392588f Gerrit-Change-Number: 60536 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Sat, 01 Jan 2022 20:05:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Add option to make MRC log silent
by Nico Huber (Code Review) 01 Jan '22

01 Jan '22

Attention is currently required from: Felix Singer, Subrata Banik, Paul Menzel, Tim Wawrzynczak, Angel Pons, Arthur Heymans, Nick Vaccaro, Andrey Petrov, Patrick Rudolph. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60441 ) Change subject: soc/intel/alderlake: Add option to make MRC log silent ...................................................................... Patch Set 6: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/60441 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iea3b32feca0893a83fdf700798b0883d26ccc718 Gerrit-Change-Number: 60441 Gerrit-PatchSet: 6 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Sat, 01 Jan 2022 19:58:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/fsp: Map FSP debug level to coreboot console level
by Nico Huber (Code Review) 01 Jan '22

01 Jan '22

Attention is currently required from: Subrata Banik, Paul Menzel, Tim Wawrzynczak, Angel Pons, Andrey Petrov, Patrick Rudolph, EricR Lai. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60471 ) Change subject: drivers/intel/fsp: Map FSP debug level to coreboot console level ...................................................................... Patch Set 4: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/60471 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I398d576fad68a0d0fc931c175bbc04fcbc2e54ec Gerrit-Change-Number: 60471 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Sat, 01 Jan 2022 19:57:44 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit January 2022