coreboot-gerrit January 2022

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Change in coreboot[master]: util: Allow overriding install options
by Paul Menzel (Code Review) 01 Jan '22

01 Jan '22

Attention is currently required from: Tim Crawford. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60540 ) Change subject: util: Allow overriding install options ...................................................................... Patch Set 1: (1 comment) File util/ectool/Makefile: https://review.coreboot.org/c/coreboot/+/60540/comment/0d0219af_c393b501 PS1, Line 8: PREFIX ?= /usr/local Actually that is a GNU extension, and not really needed [1], as it can be overridden by: make PREFIX=/usr or PREFIX=/usr make -e [1]: https://lists.suckless.org/dev/2112/index.html#msg34568 -- To view, visit https://review.coreboot.org/c/coreboot/+/60540 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3a31ea0fde9922731e1621dcc8f94b2c1326c93c Gerrit-Change-Number: 60540 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Comment-Date: Sat, 01 Jan 2022 09:58:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: src/soc/mediatek: Remove unused <timer.h>
by Hung-Te Lin (Code Review) 31 Dec '21

31 Dec '21

Attention is currently required from: Yu-Ping Wu, HAOUAS Elyes. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60612 ) Change subject: src/soc/mediatek: Remove unused <timer.h> ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: re-assign to yupingso@ -- To view, visit https://review.coreboot.org/c/coreboot/+/60612 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic87e41a9b317cc7d0b36ece5ffd1d32068e6a33a Gerrit-Change-Number: 60612 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Comment-Date: Sat, 01 Jan 2022 03:37:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8186: Increase size of CBFS_MCACHE
by Hung-Te Lin (Code Review) 31 Dec '21

31 Dec '21

Attention is currently required from: Rex-BC Chen. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60529 ) Change subject: soc/mediatek/mt8186: Increase size of CBFS_MCACHE ...................................................................... Patch Set 5: (1 comment) File src/soc/mediatek/mt8186/include/soc/memlayout.ld: https://review.coreboot.org/c/coreboot/+/60529/comment/5a051899_07182518 PS5, Line 28: STACK(0x0010B000, 7K) : TPM_TCPA_LOG(0x0010CC00, 2K) : FMAP_CACHE(0x0010D400, 2K) : WATCHDOG_TOMBSTONE(0x0010DC00, 4) : CBFS_MCACHE(0x0010DC04, 8K - 4) : TIMESTAMP(0x0010FC00, 1K) I think we want to prevent unaligned regions. Can we re-order to VB2_WORK (12k) TTB (28k) - 40 DMA_COHERENT (4k) - 44k TPM_TCPA_LOG (2k) - 46k FMAP_CACHE (4k) - 48k WATCHDOG_TOMBSTONE (4) CBFS_MCACHE (8k-4) 56k STACK (7k) - 63k TIMESTAMP (1k) - 64k -- To view, visit https://review.coreboot.org/c/coreboot/+/60529 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e627ede3774665575006f752f89101e3c5bde9f Gerrit-Change-Number: 60529 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Comment-Date: Sat, 01 Jan 2022 03:34:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/corsola: Initialize krabby display
by Hung-Te Lin (Code Review) 31 Dec '21

31 Dec '21

Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/60447 ) Change subject: mb/google/corsola: Initialize krabby display ...................................................................... mb/google/corsola: Initialize krabby display PS8640 is used on Krabby board as the eDP bridge IC. Enable PS8640 and configure display in mainboard_init() to support display in firmware screen. BUG=b:210806060 TEST=saw firmware display on eDP panel of krabby and kingler. Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: I314d5407c40429bb7bc50f36fece58e396b27548 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60447 Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/corsola/Kconfig M src/mainboard/google/corsola/display.c M src/mainboard/google/corsola/display.h 3 files changed, 89 insertions(+), 25 deletions(-) Approvals: build bot (Jenkins): Verified Yu-Ping Wu: Looks good to me, approved Rex-BC Chen: Looks good to me, but someone else must approve diff --git a/src/mainboard/google/corsola/Kconfig b/src/mainboard/google/corsola/Kconfig index f6be164..88b390d 100644 --- a/src/mainboard/google/corsola/Kconfig +++ b/src/mainboard/google/corsola/Kconfig @@ -38,6 +38,7 @@ select MAINBOARD_HAS_NATIVE_VGA_INIT select HAVE_LINEAR_FRAMEBUFFER select DRIVER_ANALOGIX_ANX7625 + select DRIVER_PARADE_PS8640 config MAINBOARD_DIR string diff --git a/src/mainboard/google/corsola/display.c b/src/mainboard/google/corsola/display.c index 6e4cbe5..fd269ec 100644 --- a/src/mainboard/google/corsola/display.c +++ b/src/mainboard/google/corsola/display.c @@ -1,28 +1,60 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <assert.h> #include <console/console.h> #include <delay.h> #include <drivers/analogix/anx7625/anx7625.h> -#include <edid.h> +#include <drivers/parade/ps8640/ps8640.h> #include <gpio.h> #include <soc/ddp.h> #include <soc/dsi.h> #include <soc/gpio_common.h> +#include <soc/regulator.h> #include <soc/i2c.h> #include <soc/mtcmos.h> #include "display.h" #include "gpio.h" -/* Set up backlight control pins as output pin and power-off by default */ -static void configure_backlight_and_bridge(void) +/* Bridge functions */ +static void bridge_ps8640_power_on(void) { - /* Disable backlight before turning on bridge */ - gpio_output(GPIO_AP_EDP_BKLTEN, 0); - gpio_output(GPIO_BL_PWM_1V8, 0); - gpio_output(GPIO_EN_PP3300_DISP_X, 1); + /* Set VRF12 to 1.2V and VCN33 to 3.3V */ + mainboard_set_regulator_vol(MTK_REGULATOR_VRF12, 1200000); + mainboard_set_regulator_vol(MTK_REGULATOR_VCN33, 3300000); + udelay(200); /* Turn on bridge */ + gpio_output(GPIO_EDPBRDG_PWREN, 1); + gpio_output(GPIO_EDPBRDG_RST_L, 0); + mdelay(2); + gpio_output(GPIO_EDPBRDG_RST_L, 1); +} + +static int bridge_ps8640_get_edid(u8 i2c_bus, struct edid *edid) +{ + const u8 chip = 0x8; + + if (ps8640_init(i2c_bus, chip) < 0) { + printk(BIOS_ERR, "%s: Can't init PS8640 bridge\n", __func__); + return -1; + } + if (ps8640_get_edid(i2c_bus, chip, edid) < 0) { + printk(BIOS_ERR, "%s: Can't get panel's edid\n", __func__); + return -1; + } + return 0; +} + +static int bridge_ps8640_post_power_on(u8 i2c_bus, struct edid *edid) +{ + /* Do nothing */ + return 0; +} + +static void bridge_anx7625_power_on(void) +{ + /* Turn on bridge */ gpio_output(GPIO_EDPBRDG_RST_L, 0); gpio_output(GPIO_EN_PP1000_EDPBRDG, 1); gpio_output(GPIO_EN_PP1800_EDPBRDG, 1); @@ -33,7 +65,7 @@ gpio_output(GPIO_EDPBRDG_RST_L, 1); } -static int anx7625_setup(u8 i2c_bus, struct edid *edid) +static int bridge_anx7625_get_edid(u8 i2c_bus, struct edid *edid) { if (anx7625_init(i2c_bus) < 0) { printk(BIOS_ERR, "%s: Can't init ANX7625 bridge\n", __func__); @@ -46,36 +78,59 @@ return 0; } -static int bridge_setup(u8 i2c_bus, struct edid *edid) +static int bridge_anx7625_post_power_on(u8 i2c_bus, struct edid *edid) { - if (CONFIG(BOARD_GOOGLE_KINGLER_COMMON)) - return anx7625_setup(i2c_bus, edid); - else - printk(BIOS_ERR, "%s: There is no bridge IC supported\n", __func__); - - return -1; + return anx7625_dp_start(i2c_bus, edid); } -static int bridge_post_poweron(u8 i2c_bus, struct edid *edid) +/* Display function */ +static void backlight_control(void) { - if (CONFIG(BOARD_GOOGLE_KINGLER_COMMON)) - return anx7625_dp_start(i2c_bus, edid); - - return 0; + /* Disable backlight before turning on bridge */ + gpio_output(GPIO_AP_EDP_BKLTEN, 0); + gpio_output(GPIO_BL_PWM_1V8, 0); + gpio_output(GPIO_EN_PP3300_DISP_X, 1); } +static const struct edp_bridge anx7625_bridge = { + .power_on = bridge_anx7625_power_on, + .get_edid = bridge_anx7625_get_edid, + .post_power_on = bridge_anx7625_post_power_on, +}; + +static const struct edp_bridge ps8640_bridge = { + .power_on = bridge_ps8640_power_on, + .get_edid = bridge_ps8640_get_edid, + .post_power_on = bridge_ps8640_post_power_on, +}; + +_Static_assert(CONFIG(BOARD_GOOGLE_KINGLER_COMMON) + CONFIG(BOARD_GOOGLE_KRABBY_COMMON) == 1, + "Exactly one of KINGLER and KRABBY must be set"); + int configure_display(void) { struct edid edid; const u8 i2c_bus = I2C0; + const struct edp_bridge *bridge; + + if (CONFIG(BOARD_GOOGLE_KINGLER_COMMON)) + bridge = &anx7625_bridge; + else /* BOARD_GOOGLE_KRABBY_COMMON */ + bridge = &ps8640_bridge; printk(BIOS_INFO, "%s: Starting display init\n", __func__); - configure_backlight_and_bridge(); mtk_i2c_bus_init(i2c_bus, I2C_SPEED_FAST); - if (bridge_setup(i2c_bus, &edid) < 0) { - printk(BIOS_ERR, "%s: Failed to set bridge\n", __func__); + /* Set up backlight control pins as output pin and power-off by default */ + backlight_control(); + + assert(bridge->power_on); + bridge->power_on(); + + assert(bridge->get_edid); + if (bridge->get_edid(i2c_bus, &edid) < 0) { + printk(BIOS_ERR, "%s: Failed to get edid\n", __func__); return -1; } @@ -101,8 +156,8 @@ return -1; } - if (bridge_post_poweron(i2c_bus, &edid) < 0) { - printk(BIOS_ERR, "%s: Failed to post poweron bridge\n", __func__); + if (bridge->post_power_on(i2c_bus, &edid) < 0) { + printk(BIOS_ERR, "%s: Failed to post power on bridge\n", __func__); return -1; } diff --git a/src/mainboard/google/corsola/display.h b/src/mainboard/google/corsola/display.h index 525422b..4e883f2 100644 --- a/src/mainboard/google/corsola/display.h +++ b/src/mainboard/google/corsola/display.h @@ -3,6 +3,14 @@ #ifndef __MAINBOARD_GOOGLE_CORSOLA_DISPLAY_H__ #define __MAINBOARD_GOOGLE_CORSOLA_DISPLAY_H__ +#include <edid.h> + +struct edp_bridge { + void (*power_on)(void); + int (*get_edid)(u8 i2c_bus, struct edid *edid); + int (*post_power_on)(u8 i2c_bus, struct edid *edid); +}; + int configure_display(void); #endif -- To view, visit https://review.coreboot.org/c/coreboot/+/60447 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I314d5407c40429bb7bc50f36fece58e396b27548 Gerrit-Change-Number: 60447 Gerrit-PatchSet: 9 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/corsola: Remove 'corsola' from Kconfig board names
by Hung-Te Lin (Code Review) 31 Dec '21

31 Dec '21

Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/60515 ) Change subject: mb/google/corsola: Remove 'corsola' from Kconfig board names ...................................................................... mb/google/corsola: Remove 'corsola' from Kconfig board names The 'Corsola' (MT8186 Chromebooks) family has two reference designs (Krabby and Kingler) and all real implementations should follow either one of the two. To prevent confusion, we should remove the 'corsola' configuration from Kconfig board names. BUG=b:210806060 TEST=emerge-corsola coreboot Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: Ib354054e358c0783f6221c2e2a1730b5c6ddba33 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60515 Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/corsola/Kconfig M src/mainboard/google/corsola/Kconfig.name 2 files changed, 0 insertions(+), 7 deletions(-) Approvals: build bot (Jenkins): Verified Yu-Ping Wu: Looks good to me, approved Rex-BC Chen: Looks good to me, but someone else must approve diff --git a/src/mainboard/google/corsola/Kconfig b/src/mainboard/google/corsola/Kconfig index 702c3fc..f6be164 100644 --- a/src/mainboard/google/corsola/Kconfig +++ b/src/mainboard/google/corsola/Kconfig @@ -45,7 +45,6 @@ config MAINBOARD_PART_NUMBER string - default "Corsola" if BOARD_GOOGLE_CORSOLA default "Kingler" if BOARD_GOOGLE_KINGLER default "Krabby" if BOARD_GOOGLE_KRABBY diff --git a/src/mainboard/google/corsola/Kconfig.name b/src/mainboard/google/corsola/Kconfig.name index 0953220..85cb41e 100644 --- a/src/mainboard/google/corsola/Kconfig.name +++ b/src/mainboard/google/corsola/Kconfig.name @@ -1,9 +1,3 @@ -comment "Corsola" - -config BOARD_GOOGLE_CORSOLA - bool "-> Corsola" - select BOARD_GOOGLE_CORSOLA_COMMON - comment "Kingler" config BOARD_GOOGLE_KINGLER -- To view, visit https://review.coreboot.org/c/coreboot/+/60515 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib354054e358c0783f6221c2e2a1730b5c6ddba33 Gerrit-Change-Number: 60515 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/mediatek/mt8186: Add support for regulator VRF12/VCN33
by Hung-Te Lin (Code Review) 31 Dec '21

31 Dec '21

Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/60446 ) Change subject: soc/mediatek/mt8186: Add support for regulator VRF12/VCN33 ...................................................................... soc/mediatek/mt8186: Add support for regulator VRF12/VCN33 To provide power to PS8640, the eDP bridge IC on krabby, add control of VRF12 and VCN33 to set voltage from MT6366. TEST=measure 1.2V from VRF12 and 3.3V from VCN33. BUG=b:210806060 Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: I55a9ca16e1e335e9355d0a1b30c278a9969db197 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60446 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> --- M src/mainboard/google/corsola/regulator.c M src/soc/mediatek/common/include/soc/regulator.h M src/soc/mediatek/mt8186/include/soc/mt6366.h M src/soc/mediatek/mt8186/mt6366.c 4 files changed, 83 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Yu-Ping Wu: Looks good to me, approved Rex-BC Chen: Looks good to me, but someone else must approve diff --git a/src/mainboard/google/corsola/regulator.c b/src/mainboard/google/corsola/regulator.c index 1dd26d3..d607497 100644 --- a/src/mainboard/google/corsola/regulator.c +++ b/src/mainboard/google/corsola/regulator.c @@ -20,6 +20,8 @@ [MTK_REGULATOR_VMC] = MT6366_VMC, [MTK_REGULATOR_VPROC12] = MT6366_VPROC12, [MTK_REGULATOR_VSRAM_PROC12] = MT6366_VSRAM_PROC12, + [MTK_REGULATOR_VRF12] = MT6366_VRF12, + [MTK_REGULATOR_VCN33] = MT6366_VCN33, }; _Static_assert(ARRAY_SIZE(regulator_id) == MTK_REGULATOR_NUM, "regulator_id size error"); diff --git a/src/soc/mediatek/common/include/soc/regulator.h b/src/soc/mediatek/common/include/soc/regulator.h index 5068f50..84bb364 100644 --- a/src/soc/mediatek/common/include/soc/regulator.h +++ b/src/soc/mediatek/common/include/soc/regulator.h @@ -18,6 +18,8 @@ MTK_REGULATOR_VMC, MTK_REGULATOR_VPROC12, MTK_REGULATOR_VSRAM_PROC12, + MTK_REGULATOR_VRF12, + MTK_REGULATOR_VCN33, MTK_REGULATOR_NUM, }; diff --git a/src/soc/mediatek/mt8186/include/soc/mt6366.h b/src/soc/mediatek/mt8186/include/soc/mt6366.h index af77da2..2315a24 100644 --- a/src/soc/mediatek/mt8186/include/soc/mt6366.h +++ b/src/soc/mediatek/mt8186/include/soc/mt6366.h @@ -43,10 +43,14 @@ PMIC_VSRAM_PROC12_OP_EN = 0x1b90, PMIC_VSRAM_PROC12_DBG0 = 0x1ba2, PMIC_VSRAM_PROC12_VOSEL = 0x1bf0, + PMIC_LDO_VRF12_CON0 = 0x1c30, + PMIC_LDO_VRF12_OP_EN = 0x1c32, PMIC_LDO_VMC_CON0 = 0x1cc4, PMIC_LDO_VMC_OP_EN = 0x1cc6, PMIC_LDO_VMCH_CON0 = 0x1cd8, PMIC_LDO_VMCH_OP_EN = 0x1cda, + PMIC_LDO_VCN33_CON0_0 = 0x1d1c, + PMIC_VCN33_ANA_CON0 = 0x1e28, PMIC_VSIM2_ANA_CON0 = 0x1e30, PMIC_VMCH_ANA_CON0 = 0x1e48, PMIC_VMC_ANA_CON0 = 0x1e4c, @@ -61,6 +65,8 @@ MT6366_VMC, MT6366_VPROC12, MT6366_VSRAM_PROC12, + MT6366_VRF12, + MT6366_VCN33, MT6366_REGULATOR_NUM, }; diff --git a/src/soc/mediatek/mt8186/mt6366.c b/src/soc/mediatek/mt8186/mt6366.c index 5cec47a..9ca7c05 100644 --- a/src/soc/mediatek/mt8186/mt6366.c +++ b/src/soc/mediatek/mt8186/mt6366.c @@ -705,6 +705,68 @@ pwrap_write_field(PMIC_LDO_VMC_CON0, 1, 0xFF, 0); } +static u32 pmic_get_vrf12_vol(void) +{ + return (pwrap_read_field(PMIC_LDO_VRF12_CON0, 0x3, 0) & + pwrap_read_field(PMIC_LDO_VRF12_OP_EN, 0x3, 0)) ? 1200000 : 0; +} + +static void pmic_enable_vrf12(void) +{ + pwrap_write_field(PMIC_LDO_VRF12_CON0, 1, 0x3, 0); + pwrap_write_field(PMIC_LDO_VRF12_OP_EN, 1, 0x3, 0); +} + +static u32 pmic_get_vcn33_vol(void) +{ + u32 ret; + u16 vol_reg; + + vol_reg = pwrap_read_field(PMIC_VCN33_ANA_CON0, 0x3, 8); + + switch (vol_reg) { + case 0x1: + ret = 3300000; + break; + case 0x2: + ret = 3400000; + break; + case 0x3: + ret = 3500000; + break; + default: + printk(BIOS_ERR, "ERROR[%s] VCN33 read fail: %d\n", __func__, vol_reg); + ret = 0; + break; + } + return ret; +} + +static void pmic_set_vcn33_vol(u32 vcn33_uv) +{ + u16 val = 0; + + switch (vcn33_uv) { + case 3300000: + val = 0x1; + break; + case 3400000: + val = 0x2; + break; + case 3500000: + val = 0x3; + break; + default: + die("ERROR[%s]: VCN33 voltage %u is not support.\n", __func__, vcn33_uv); + return; + } + + pwrap_write_field(PMIC_VCN33_ANA_CON0, val, 0x3, 8); + + /* Force SW to turn on */ + pwrap_write_field(PMIC_LDO_VCN33_CON0_0, 1, 0x1, 0); +} + static void pmic_wdt_set(void) { /* [5]=1, RG_WDTRSTB_DEB */ @@ -824,6 +886,13 @@ case MT6366_VSRAM_PROC12: pmic_set_vsram_proc12_vol(voltage_uv); break; + case MT6366_VRF12: + /* VRF12 only provides 1.2V, so we just need to enable it */ + pmic_enable_vrf12(); + break; + case MT6366_VCN33: + pmic_set_vcn33_vol(voltage_uv); + break; default: printk(BIOS_ERR, "%s: PMIC %d is not supported\n", __func__, id); break; @@ -847,6 +916,10 @@ return pmic_get_vproc12_vol(); case MT6366_VSRAM_PROC12: return pmic_get_vsram_proc12_vol(); + case MT6366_VRF12: + return pmic_get_vrf12_vol(); + case MT6366_VCN33: + return pmic_get_vcn33_vol(); default: printk(BIOS_ERR, "%s: PMIC %d is not supported\n", __func__, id); break; 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/coreboot/+/60446 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I55a9ca16e1e335e9355d0a1b30c278a9969db197 Gerrit-Change-Number: 60446 Gerrit-PatchSet: 3 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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coreboot-gerrit January 2022