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Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60401 )
Change subject: soc/intel/alderlake: Check clkreq overlap
......................................................................
Patch Set 5:
(5 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/60401/comment/b62c97f2_24cb72aa
PS4, Line 13: pop up
> `shows`
Done
https://review.coreboot.org/c/coreboot/+/60401/comment/cd5af1f3_71c9b751
PS4, Line 13: add
> `adds`
Done
Patchset:
PS4:
> Not very sure about the usefulness of this code, but looks good to me. […]
thanks, i actually have a project have duplicated clkreq assignment and it really have to enable fsp log to find out the duplication.
Sometimes it's hard to observe duplication btwn baseboard dev tree and override dev tree since they are in different file.
Patchset:
PS5:
thanks Tim and Subrata.
File src/soc/intel/alderlake/romstage/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/60401/comment/2fee94eb_f5c51582
PS4, Line 55: uint16_t
> You say a 32-bit mapping in the comment above but this is a uint16_t. […]
Done
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Hello build bot (Jenkins), Subrata Banik, Tim Wawrzynczak, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/60401
to look at the new patch set (#5).
Change subject: soc/intel/alderlake: Check clkreq overlap
......................................................................
soc/intel/alderlake: Check clkreq overlap
In some cases, partner may assign same clkreq on more than one devices.
This could happen when one device is in baseboard dev tree and another
one is in override dev tree.
This change adds a clkreq overlap check and shows a warning message
TEST=On brya, assigned one clkreq to 2 devices and found the warning
message
Change-Id: I2f701a19118f4702c227b17e43b6551591d9b344
Signed-off-by: Kane Chen <kane.chen(a)intel.corp-partner.google.com>
---
M src/soc/intel/alderlake/romstage/fsp_params.c
1 file changed, 8 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/60401/5
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Change subject: mb/google/brya/var/vell: Add AMP driver setting
......................................................................
Patch Set 9:
(1 comment)
Patchset:
PS9:
> sure, we'll inform vendor to be aware of this, thank you for the advice.
Thanks Kevin!
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Change subject: mb/google/brya/var/vell: Add AMP driver setting
......................................................................
Patch Set 9:
(1 comment)
Patchset:
PS9:
> Its okay that you have abandon this CL, but in future while re-landing CS35L53 I2C driver please con […]
sure, we'll inform vendor to be aware of this, thank you for the advice.
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Change subject: mb/google/brya/var/vell: Add AMP driver setting
......................................................................
Patch Set 9:
(1 comment)
Patchset:
PS9:
> cs35l53 i2c amp driver should be owned by vendor, please abandon this one.
Its okay that you have abandon this CL, but in future while re-landing CS35L53 I2C driver please consider those review comments.
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Change subject: mb/google/brya/var/vell: Add AMP driver setting
......................................................................
Patch Set 9: Code-Review-1
(1 comment)
Patchset:
PS9:
cs35l53 i2c amp driver should be owned by vendor, please abandon this one.
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I'd like you to reexamine a change. Please visit
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Change subject: mb/google/brya: Enable CNVi DDR RFIM for base board brya
......................................................................
mb/google/brya: Enable CNVi DDR RFIM for base board brya
This patch set CnviDdrRfim UPD and Enable CNVI DDR RFIM
for all brya varients.
BUG=b:201724512
BRANCH=None
TEST=Build and boot with debug FSP and verify CnviDdrRfim UPD value.
Change-Id: I6ad826d0039e400f219c2d407c51762c1751a909
Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com>
---
M src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/60740/3
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I'd like you to reexamine a change. Please visit
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to look at the new patch set (#2).
Change subject: mb/google/brya: Enable CNVi DDR RFIM for base board brya
......................................................................
mb/google/brya: Enable CNVi DDR RFIM for base board brya
This patch set CnviDdrRfim UPD and Enable CNVI DDR RFIM
for all brya varients.
BUG=b:201724512
BRANCH=None
TEST=Build and boot brya with debug FSP and verify CnviDdrRfim UPD value.
Change-Id: I6ad826d0039e400f219c2d407c51762c1751a909
Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com>
---
M src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/60740/2
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Change subject: mb/google/brya/var/vell: Add AMP driver setting
......................................................................
Patch Set 9:
(3 comments)
File src/drivers/i2c/cs35l53/cs35l53.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-137140):
https://review.coreboot.org/c/coreboot/+/60331/comment/610d407a_16e9d209
PS9, Line 70: if ((config->boost_peak_milliamp > 4500) ||(config->boost_peak_milliamp < 1600) ||
spaces required around that '||' (ctx:WxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-137140):
https://review.coreboot.org/c/coreboot/+/60331/comment/13243793_d71e9805
PS9, Line 71: (config->boost_peak_milliamp % 50)){
space required before the open brace '{'
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-137140):
https://review.coreboot.org/c/coreboot/+/60331/comment/e3594c2d_fcf4ff08
PS9, Line 89: acpi_dp_add_integer(dsd, "cirrus,gpio2-output-enable", config->gpio2_output_enable ? 1 : 0);
line over 96 characters
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