coreboot-gerrit September 2021

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Change in coreboot[master]: soc/intel/adl: Drop SGPM, RGPM and EGPM methods
by Meera Ravindranath (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Furquan Shaikh, Maulik V Vaghela, Meera Ravindranath, Subrata Banik, Patrick Rudolph. Hello build bot (Jenkins), Furquan Shaikh, Maulik V Vaghela, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57209 to look at the new patch set (#4). Change subject: soc/intel/adl: Drop SGPM, RGPM and EGPM methods ...................................................................... soc/intel/adl: Drop SGPM, RGPM and EGPM methods These methods can now be dropped as Dynamic GPIO PM is enabled. Signed-off-by: Meera Ravindranath <meera.ravindranath(a)intel.com> Change-Id: I0c7b67b5414d8c80775ab7678ce7b12181af7882 --- M src/soc/intel/alderlake/acpi/gpio.asl 1 file changed, 0 insertions(+), 41 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/57209/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/57209 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0c7b67b5414d8c80775ab7678ce7b12181af7882 Gerrit-Change-Number: 57209 Gerrit-PatchSet: 4 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/brya/variants/primus: update gpio and overridetree for evt
by Malik Hsu (Code Review) 02 Sep '21

02 Sep '21

Malik Hsu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/57331 ) Change subject: mb/google/brya/variants/primus: update gpio and overridetree for evt ...................................................................... mb/google/brya/variants/primus: update gpio and overridetree for evt BUG= BRANCH=none TEST=build coreboot Signed-off-by: Malik_Hsu <malik_hsu(a)wistron.corp-partner.google.com> Change-Id: I14907faeb631193715b1e0e451e427fb79a68279 --- M src/mainboard/google/brya/variants/primus/fw_config.c M src/mainboard/google/brya/variants/primus/gpio.c 2 files changed, 46 insertions(+), 24 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/57331/1 diff --git a/src/mainboard/google/brya/variants/primus/fw_config.c b/src/mainboard/google/brya/variants/primus/fw_config.c index fe74a46..0beedc7 100644 --- a/src/mainboard/google/brya/variants/primus/fw_config.c +++ b/src/mainboard/google/brya/variants/primus/fw_config.c @@ -6,14 +6,17 @@ #include <gpio.h> static const struct pad_config dmic_enable_pads[] = { - PAD_CFG_NF(GPP_S2, NONE, DEEP, NF2), /* DMIC_CLK0_R */ - PAD_CFG_NF(GPP_S3, NONE, DEEP, NF2), /* DMIC_DATA0_R */ - + PAD_CFG_NF(GPP_R4, NONE, DEEP, NF3), /* DMIC_CLK0_R */ + PAD_CFG_NF(GPP_R5, NONE, DEEP, NF3), /* DMIC_DATA0_R */ + PAD_CFG_NF(GPP_R6, NONE, DEEP, NF3), /* DMIC_CLK1_R */ + PAD_CFG_NF(GPP_R7, NONE, DEEP, NF3), /* DMIC_DATA1_R */ }; static const struct pad_config dmic_disable_pads[] = { - PAD_NC(GPP_S2, NONE), - PAD_NC(GPP_S3, NONE), + PAD_NC(GPP_R4, NONE), + PAD_NC(GPP_R5, NONE), + PAD_NC(GPP_R6, NONE), + PAD_NC(GPP_R7, NONE), }; static const struct pad_config i2s_enable_pads[] = { @@ -21,10 +24,10 @@ PAD_CFG_NF(GPP_R1, NONE, DEEP, NF2), /* I2S_HP_SFRM_R */ PAD_CFG_NF(GPP_R2, DN_20K, DEEP, NF2), /* I2S_PCH_TX_HP_RX_STRAP */ PAD_CFG_NF(GPP_R3, NONE, DEEP, NF2), /* I2S_PCH_RX_HP_TX */ - PAD_CFG_NF(GPP_R4, NONE, DEEP, NF2), /* I2S_SPKR_SCLK_R */ - PAD_CFG_NF(GPP_R5, NONE, DEEP, NF2), /* I2S_SPKR_SFRM_R */ - PAD_CFG_NF(GPP_R6, NONE, DEEP, NF2), /* I2S_PCH_TX_SPKR_RX_R */ - PAD_CFG_NF(GPP_R7, NONE, DEEP, NF2), /* I2S_PCH_RX_SPKR_TX */ + PAD_CFG_NF(GPP_S0, NONE, DEEP, NF4), /* I2S_SPKR_SCLK_R */ + PAD_CFG_NF(GPP_S1, NONE, DEEP, NF4), /* I2S_SPKR_SFRM_R */ + PAD_CFG_NF(GPP_S2, NONE, DEEP, NF4), /* I2S_PCH_TX_SPKR_RX_R */ + PAD_CFG_NF(GPP_S3, NONE, DEEP, NF4), /* I2S_PCH_RX_SPKR_TX */ }; static const struct pad_config i2s_disable_pads[] = { @@ -32,25 +35,50 @@ PAD_NC(GPP_R1, NONE), PAD_NC(GPP_R2, NONE), PAD_NC(GPP_R3, NONE), - PAD_NC(GPP_R4, NONE), - PAD_NC(GPP_R5, NONE), - PAD_NC(GPP_R6, NONE), - PAD_NC(GPP_R7, NONE), + PAD_NC(GPP_S0, NONE), + PAD_NC(GPP_S1, NONE), + PAD_NC(GPP_S2, NONE), + PAD_NC(GPP_S3, NONE), }; +static const struct pad_config bt_i2s_enable_pads[] = { + PAD_CFG_NF(GPP_VGPIO_30, NONE, DEEP, NF3), /* BT_I2S_BCLK */ + PAD_CFG_NF(GPP_VGPIO_31, NONE, DEEP, NF3), /* BT_I2S_SYNC */ + PAD_CFG_NF(GPP_VGPIO_32, NONE, DEEP, NF3), /* BT_I2S_SDO */ + PAD_CFG_NF(GPP_VGPIO_33, NONE, DEEP, NF3), /* BT_I2S_SDI */ + PAD_CFG_NF(GPP_VGPIO_34, NONE, DEEP, NF1), /* SSP2_SCLK */ + PAD_CFG_NF(GPP_VGPIO_35, NONE, DEEP, NF1), /* SSP2_SFRM */ + PAD_CFG_NF(GPP_VGPIO_36, NONE, DEEP, NF1), /* SSP_TXD */ + PAD_CFG_NF(GPP_VGPIO_37, NONE, DEEP, NF1), /* SSP_RXD */ +}; + +static const struct pad_config bt_i2s_disable_pads[] = { + PAD_NC(GPP_VGPIO_30, NONE), + PAD_NC(GPP_VGPIO_31, NONE), + PAD_NC(GPP_VGPIO_32, NONE), + PAD_NC(GPP_VGPIO_33, NONE), + PAD_NC(GPP_VGPIO_34, NONE), + PAD_NC(GPP_VGPIO_35, NONE), + PAD_NC(GPP_VGPIO_36, NONE), + PAD_NC(GPP_VGPIO_37, NONE), +}; + + static void fw_config_handle(void *unused) { if (!fw_config_is_provisioned() || fw_config_probe(FW_CONFIG(AUDIO, AUDIO_UNKNOWN))) { printk(BIOS_INFO, "Disable audio related GPIO pins.\n"); gpio_configure_pads(i2s_disable_pads, ARRAY_SIZE(i2s_disable_pads)); gpio_configure_pads(dmic_disable_pads, ARRAY_SIZE(dmic_disable_pads)); + gpio_configure_pads(bt_i2s_disable_pads, ARRAY_SIZE(bt_i2s_disable_pads)); return; } if (fw_config_probe(FW_CONFIG(AUDIO, MAX98360_ALC5682I_I2S))) { - printk(BIOS_INFO, "Configure audio over I2S with MAX98357 ALC5682I.\n"); + printk(BIOS_INFO, "Configure audio over I2S with MAX98360 ALC5682I.\n"); gpio_configure_pads(dmic_enable_pads, ARRAY_SIZE(dmic_enable_pads)); gpio_configure_pads(i2s_enable_pads, ARRAY_SIZE(i2s_enable_pads)); + gpio_configure_pads(bt_i2s_enable_pads, ARRAY_SIZE(bt_i2s_enable_pads)); } } BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL); diff --git a/src/mainboard/google/brya/variants/primus/gpio.c b/src/mainboard/google/brya/variants/primus/gpio.c index 8e92447..2091168 100644 --- a/src/mainboard/google/brya/variants/primus/gpio.c +++ b/src/mainboard/google/brya/variants/primus/gpio.c @@ -10,6 +10,8 @@ static const struct pad_config override_gpio_table[] = { /* A6 : ESPI_ALERT1# ==> NC */ PAD_NC(GPP_A6, NONE), + /* A7 : SRCCLK_OE7# ==> NC */ + PAD_NC(GPP_A7, NONE), /* A14 : USB_OC1# ==> NC */ PAD_NC(GPP_A14, NONE), /* A15 : USB_OC2# ==> NC */ @@ -44,14 +46,8 @@ PAD_NC(GPP_E3, NONE), /* E7 : PROC_GP1 ==> NC */ PAD_NC(GPP_E7, NONE), - /* E10 : THC0_SPI1_CS# ==> NC */ - PAD_NC(GPP_E10, NONE), - /* E17 : THC0_SPI1_INT# ==> NC */ - PAD_NC(GPP_E17, NONE), /* E20 : USB_C1_LSX_SOC_TX ==> EN_PP3300_eMMC */ PAD_CFG_GPO(GPP_E20, 1, DEEP), - /* E21 : USB_C1_LSX_SOC_RX_STRAP ==> NC */ - PAD_NC(GPP_E21, NONE), /* F19 : SRCCLKREQ6# ==> EMMC_CLKREQ_ODL */ PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1), @@ -64,11 +60,9 @@ PAD_NC(GPP_H21, NONE), /* H22 : IMGCLKOUT3 ==> NC */ PAD_NC(GPP_H22, NONE), + /* H23 : SRCCLKREQ5# ==> NC */ + PAD_NC(GPP_H23, NONE), - /* S4 : SNDW2_CLK ==> NC */ - PAD_NC(GPP_S4, NONE), - /* S5 : SNDW2_DATA ==> NC */ - PAD_NC(GPP_S5, NONE), /* S6 : SNDW3_CLK ==> NC */ PAD_NC(GPP_S6, NONE), /* S7 : SNDW3_DATA ==> NC */ -- To view, visit https://review.coreboot.org/c/coreboot/+/57331 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I14907faeb631193715b1e0e451e427fb79a68279 Gerrit-Change-Number: 57331 Gerrit-PatchSet: 1 Gerrit-Owner: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/brya: Fix Idle S0ix issue due to dynamic GPIO PM disabled
by Meera Ravindranath (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Furquan Shaikh, Maulik V Vaghela, Meera Ravindranath. Hello build bot (Jenkins), Maulik V Vaghela, Tim Wawrzynczak, Subrata Banik, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56926 to look at the new patch set (#8). Change subject: mb/google/brya: Fix Idle S0ix issue due to dynamic GPIO PM disabled ...................................................................... mb/google/brya: Fix Idle S0ix issue due to dynamic GPIO PM disabled GPIO PM was disabled for brya to evaluate if longer interrupt pulses are required for ADL. Since ADL requires 4us long pulses (EDS:626817), GPIO PM can be enabled. All devices currently tested on brya support 4us long pulses. This change drops the GPIO PM override and re-enables dynamic GPIO PM. TEST=Boot brya to OS, ensure no TPM errors. Signed-off-by: Meera Ravindranath <meera.ravindranath(a)intel.com> Change-Id: I0c7b66b5514d8b80775ab7578ce7b12181af7882 --- M src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb 1 file changed, 0 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/56926/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/56926 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0c7b66b5514d8b80775ab7578ce7b12181af7882 Gerrit-Change-Number: 56926 Gerrit-PatchSet: 8 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/dedede/var/cappy2: Add fw_config probe for ALC5682I-VS
by Henry Sun (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Furquan Shaikh, Sunwei Li, Paul Menzel, Weimin Wu, Karthik Ramasubramanian. Henry Sun has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57105 ) Change subject: mb/google/dedede/var/cappy2: Add fw_config probe for ALC5682I-VS ...................................................................... Patch Set 4: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/57105 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iac09663b095e758f1bc0cfaf7adb6e84d203788a Gerrit-Change-Number: 57105 Gerrit-PatchSet: 4 Gerrit-Owner: Sunwei Li <lisunwei(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Ginger Zhang <zhangqingchun(a)huaqin.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Sunwei Li <lisunwei(a)huaqin.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Thu, 02 Sep 2021 05:46:00 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/volteer: Create APIs for USB-C DP alternate mode support
by Curtis Chen (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak, Zhuohao Lee, Derek Huang, Brandon Breitenstein, Curtis Chen. Curtis Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57139 ) Change subject: mb/google/volteer: Create APIs for USB-C DP alternate mode support ...................................................................... Patch Set 9: (1 comment) File src/soc/intel/common/block/tcss/tcss.c: https://review.coreboot.org/c/coreboot/+/57139/comment/e3897858_9ad16c34 PS9, Line 296: WAIT_FOR_DISPLAYPORT_TIMEOUT > Does the waiting have to be done serially? can it be done in parallel? Yes, we have a draft idea at my 8/26 comment. The wait could be done in parallel. Also, not sure google needs to support 2 output or not. If yes, in google_chromeec_pd_get_amode(uint16_t svid) we could use "ret |= 1 << i" rather than return directly. (Based on my 8/26 comment) -- To view, visit https://review.coreboot.org/c/coreboot/+/57139 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia7e6dd952d3183ecb76de6d4887ee573ef89bb50 Gerrit-Change-Number: 57139 Gerrit-PatchSet: 9 Gerrit-Owner: Derek Huang <derek.huang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Curtis Chen <curtis.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Curtis Chen <curtis.chen(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: Derek Huang <derek.huang(a)intel.corp-partner.google.com> Gerrit-Attention: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Attention: Curtis Chen <curtis.chen(a)intel.corp-partner.google.com> Gerrit-Comment-Date: Thu, 02 Sep 2021 05:01:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Zhuohao Lee <zhuohao(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: nipperkin: Set eSPI alert as dedicated open drain
by Karthik Ramasubramanian (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Raul Rangel, Rob Barnes. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57313 ) Change subject: nipperkin: Set eSPI alert as dedicated open drain ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb: https://review.coreboot.org/c/coreboot/+/57313/comment/902bfb8c_7856d9c2 PS1, Line 37: alert_pin = ESPI_ALERT_PIN_OPEN_DRAIN, I think this is the only thing that changed. IF so, I think we can configure the alert_pin as dedicated and OPEN_DRAIN in baseboard/devicetree.cb. We can just override the alert_pin as IN_BAND in the guybrush/overridetree.cb as follows: register "common_config.espi_config.alert_pin" = "ESPI_ALERT_PIN_IN_BAND" This will avoid recurrent changes for new variants. This will also keep the change minimal in guybrush as well. Thoughts? -- To view, visit https://review.coreboot.org/c/coreboot/+/57313 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4b23bfc6a1167aebfde5acd524fda043b63163dc Gerrit-Change-Number: 57313 Gerrit-PatchSet: 1 Gerrit-Owner: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Comment-Date: Thu, 02 Sep 2021 04:56:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Enable SaGv support for baseboard
by Marx Wang (Code Review) 02 Sep '21

02 Sep '21

Marx Wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/57330 ) Change subject: mb/google/brya: Enable SaGv support for baseboard ...................................................................... mb/google/brya: Enable SaGv support for baseboard This patch enabled the SaGv support for ADL-P brya baseboard. TEST=Use RMT tool to verify the margins with FSP debug/RMT logs and also run "stressapptest" to check if any memory-related issue. Signed-off-by: Marx Wang <marx.wang(a)intel.com> Change-Id: If109915f2cd3d8df2d74f84fb85e1812e63cc11c --- M src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/57330/1 diff --git a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb index 25b81eb..2d758d6 100644 --- a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb @@ -1,6 +1,7 @@ chip soc/intel/alderlake register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}" + register "SaGv" = "SaGv_Enabled" # GPE configuration register "pmc_gpe0_dw0" = "GPP_A" -- To view, visit https://review.coreboot.org/c/coreboot/+/57330 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If109915f2cd3d8df2d74f84fb85e1812e63cc11c Gerrit-Change-Number: 57330 Gerrit-PatchSet: 1 Gerrit-Owner: Marx Wang <marx.wang(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: libpayload: Add MMIO support in PCI lib
by Prasad Malisetty (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Shelley Chen, Ravi kumar, Furquan Shaikh, Paul Menzel, Julius Werner, Arthur Heymans, Kyösti Mälkki, mturney mturney. Prasad Malisetty has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/53903 ) Change subject: libpayload: Add MMIO support in PCI lib ...................................................................... Patch Set 34: (1 comment) File payloads/libpayload/drivers/pci_ops.c: https://review.coreboot.org/c/coreboot/+/53903/comment/baf44567_f920f256 PS28, Line 37: u32 devfn = ((dev >> 3) & 0x1f) | (dev & 0x07); > > Similarly in Coreboot PCIe driver we have read/write_config function in which ATU configuration wi […] Hi Furquan, Thanks for the clarification. Sure, if we can have a infrastructure to map coreboot callbacks from libpayload, it would be easy to implement map_bus function for all available buses instead of specific bus case. Please let me know once the changes are ready. I will do the same for PCI library case. I have addressed all existing comments on this change. due to some unplanned activities, couldn't post the changes in time. I will share new version changes in day or 2. Thanks -Prasad -- To view, visit https://review.coreboot.org/c/coreboot/+/53903 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7cfb95e31b7ee984ee0c2e7586e6caeecd7deadd Gerrit-Change-Number: 53903 Gerrit-PatchSet: 34 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Prasad Malisetty <pmaliset(a)qualcomm.corp-partner.google.com> Gerrit-Reviewer: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Comment-Date: Thu, 02 Sep 2021 03:46:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Comment-In-Reply-To: Prasad Malisetty <pmaliset(a)qualcomm.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush/nipperkin: update DRAM table
by Kevin Chiu (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Martin Roth, Paul Menzel, Rob Barnes, Eric Peers, Karthik Ramasubramanian. Kevin Chiu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57197 ) Change subject: mb/google/guybrush/nipperkin: update DRAM table ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/57197/comment/4162b05c_109b6512 PS2, Line 7: nipperkin > This belongs into the prefix? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/57197 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I71ceaf0a2738584d316a5b7cc51539821b430128 Gerrit-Change-Number: 57197 Gerrit-PatchSet: 3 Gerrit-Owner: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Reviewer: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Thu, 02 Sep 2021 03:45:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush/nipperkin: update nipperkin config
by Kevin Chiu (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Martin Roth, Eric Peers, Rob Barnes, Karthik Ramasubramanian, Felix Held. Kevin Chiu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57263 ) Change subject: mb/google/guybrush/nipperkin: update nipperkin config ...................................................................... Patch Set 2: (1 comment) File src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb: https://review.coreboot.org/c/coreboot/+/57263/comment/a8b5d6af_1c5ef4d0 PS1, Line 26: option WWAN_FM350GL 2 > if not in use/intended to be used, recommend removal. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/57263 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I58a9b8393a965a9c793802d3e660829863b74375 Gerrit-Change-Number: 57263 Gerrit-PatchSet: 2 Gerrit-Owner: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Reviewer: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 02 Sep 2021 03:44:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Eric Peers <epeers(a)google.com> Gerrit-MessageType: comment

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coreboot-gerrit September 2021