coreboot-gerrit September 2021

coreboot-gerrit@coreboot.org

1 participants
6530 discussions

Change in coreboot[master]: mb/google/guybrush/nipperkin: update nipperkin config
by Kevin Chiu (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Kevin Chiu, Martin Roth, Rob Barnes, Karthik Ramasubramanian, Felix Held. Hello build bot (Jenkins), Martin Roth, Bhanu Prakash Maiya, Rob Barnes, Eric Peers, Karthik Ramasubramanian, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57263 to look at the new patch set (#2). Change subject: mb/google/guybrush/nipperkin: update nipperkin config ...................................................................... mb/google/guybrush/nipperkin: update nipperkin config copy config from guybrush reference board. BUG=b:194031783 BRANCH=guybrush TEST=emerge-guybrush coreboot chromeos-bootimage Signed-off-by: Kevin Chiu <kevin.chiu(a)quantatw.com> Change-Id: I58a9b8393a965a9c793802d3e660829863b74375 --- M src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb 1 file changed, 161 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/57263/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/57263 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I58a9b8393a965a9c793802d3e660829863b74375 Gerrit-Change-Number: 57263 Gerrit-PatchSet: 2 Gerrit-Owner: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Reviewer: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: mb/google/guybrush/nipperkin: update DRAM table
by Kevin Chiu (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Martin Roth, Rob Barnes, Eric Peers, Karthik Ramasubramanian. Hello build bot (Jenkins), Martin Roth, Bhanu Prakash Maiya, Rob Barnes, Eric Peers, Karthik Ramasubramanian, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57197 to look at the new patch set (#3). Change subject: mb/google/guybrush/nipperkin: update DRAM table ...................................................................... mb/google/guybrush/nipperkin: update DRAM table MT53E512M32D2NP-046 WT:E K4U6E3S4AA-MGCR H9HCNNNCPMMLXR-NEE K4UBE3D4AA-MGCR BUG=b:194031783 BRANCH=guybrush TEST=emerge-guybrush coreboot chromeos-bootimage Signed-off-by: Kevin Chiu <kevin.chiu(a)quantatw.com> Change-Id: I71ceaf0a2738584d316a5b7cc51539821b430128 --- M src/mainboard/google/guybrush/variants/nipperkin/memory/Makefile.inc M src/mainboard/google/guybrush/variants/nipperkin/memory/dram_id.generated.txt A src/mainboard/google/guybrush/variants/nipperkin/memory/mem_list_variant.txt D src/mainboard/google/guybrush/variants/nipperkin/memory/mem_parts_used.txt 4 files changed, 23 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/57197/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/57197 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I71ceaf0a2738584d316a5b7cc51539821b430128 Gerrit-Change-Number: 57197 Gerrit-PatchSet: 3 Gerrit-Owner: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Reviewer: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: soc/intel/alderlake: set power limits dynamically for thermal
by Sumeet R Pawnikar (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak, Sumeet R Pawnikar, Patrick Rudolph, Karthik Ramasubramanian. Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57035 ) Change subject: soc/intel/alderlake: set power limits dynamically for thermal ...................................................................... Patch Set 9: (17 comments) Patchset: PS2: > submitted another CL https://review.coreboot. […] ACK File src/soc/intel/alderlake/systemagent.c: https://review.coreboot.org/c/coreboot/+/57035/comment/cb342410_55aebcc8 PS1, Line 51: u8 get_cpu_tdp(void) > Ack ACK https://review.coreboot.org/c/coreboot/+/57035/comment/61943ec6_ea00aba8 PS1, Line 53: msr_t msr = rdmsr(MSR_PLATFORM_INFO); > Done ACK https://review.coreboot.org/c/coreboot/+/57035/comment/e8fff278_b8729ebb PS1, Line 107: soc_config = &config->power_limits_config[ADL_P_POWER_LIMITS_682_28W_CORE]; > line over 96 characters Please fix. https://review.coreboot.org/c/coreboot/+/57035/comment/ba0f7e9f_0b57ba56 PS1, Line 109: soc_config = &config->power_limits_config[ADL_P_POWER_LIMITS_682_45W_CORE]; > line over 96 characters Please fix. File src/soc/intel/alderlake/systemagent.c: https://review.coreboot.org/c/coreboot/+/57035/comment/f59d9c86_f47721c1 PS2, Line 89: soc_config = &config->power_limits_config[ADL_P_POWER_LIMITS_682_28W_CORE]; > line over 96 characters Please fix. https://review.coreboot.org/c/coreboot/+/57035/comment/cba8f0d0_834355f0 PS2, Line 91: soc_config = &config->power_limits_config[ADL_P_POWER_LIMITS_682_45W_CORE]; > line over 96 characters Please fix. File src/soc/intel/alderlake/systemagent.c: https://review.coreboot.org/c/coreboot/+/57035/comment/bd98b86f_51cef882 PS3, Line 76: tdp = get_cpu_tdp(); > I'm just thinking loud, what if tomorrow there is different TDP SKUs under ADL_P_ID_5/7, in that cas […] Done File src/soc/intel/alderlake/systemagent.c: https://review.coreboot.org/c/coreboot/+/57035/comment/a3c31c49_3139a4db PS4, Line 89: soc_config = > trailing whitespace Please fix. https://review.coreboot.org/c/coreboot/+/57035/comment/6408e3e9_96bdc173 PS4, Line 90: &config->power_limits_config[ADL_P_POWER_LIMITS_682_28W_CORE]; > please, no spaces at the start of a line Please fix. https://review.coreboot.org/c/coreboot/+/57035/comment/f248a143_9a717060 PS4, Line 90: &config->power_limits_config[ADL_P_POWER_LIMITS_682_28W_CORE]; > code indent should use tabs where possible Please fix. https://review.coreboot.org/c/coreboot/+/57035/comment/1eb3b9be_a10a2ca3 PS4, Line 90: &config->power_limits_config[ADL_P_POWER_LIMITS_682_28W_CORE]; > please, no space before tabs Please fix. https://review.coreboot.org/c/coreboot/+/57035/comment/f6d141c5_65efd7ac PS4, Line 92: soc_config = > trailing whitespace Please fix. https://review.coreboot.org/c/coreboot/+/57035/comment/cb31b2f6_24aee431 PS4, Line 93: &config->power_limits_config[ADL_P_POWER_LIMITS_682_45W_CORE]; > please, no spaces at the start of a line Please fix. https://review.coreboot.org/c/coreboot/+/57035/comment/15920bb5_7d280fea PS4, Line 93: &config->power_limits_config[ADL_P_POWER_LIMITS_682_45W_CORE]; > code indent should use tabs where possible Please fix. https://review.coreboot.org/c/coreboot/+/57035/comment/2feeb442_7ac6bc63 PS4, Line 93: &config->power_limits_config[ADL_P_POWER_LIMITS_682_45W_CORE]; > please, no space before tabs Please fix. File src/soc/intel/alderlake/systemagent.c: https://review.coreboot.org/c/coreboot/+/57035/comment/6f9d84c2_40845301 PS8, Line 90: ADL > ERROR Done -- To view, visit https://review.coreboot.org/c/coreboot/+/57035 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic331a3debb076ef08a312a31edc1468974fd4902 Gerrit-Change-Number: 57035 Gerrit-PatchSet: 9 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Thu, 02 Sep 2021 03:38:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/google/zork: correct MST probes
by Edward O'Callaghan (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Sam McNally, Peter Marheine, Felix Held. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57298 ) Change subject: mb/google/zork: correct MST probes ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/57298 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2a8feb544f3fc198fe6313b226ad8995aad31c3e Gerrit-Change-Number: 57298 Gerrit-PatchSet: 2 Gerrit-Owner: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Daniel Kurtz <djkurtz(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sam McNally <sammc(a)google.com> Gerrit-Attention: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 02 Sep 2021 03:36:51 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/alderlake: set power limits dynamically for thermal
by EricR Lai (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Furquan Shaikh, Sumeet R Pawnikar, Patrick Rudolph, Karthik Ramasubramanian. EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57035 ) Change subject: soc/intel/alderlake: set power limits dynamically for thermal ...................................................................... Patch Set 9: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/57035 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic331a3debb076ef08a312a31edc1468974fd4902 Gerrit-Change-Number: 57035 Gerrit-PatchSet: 9 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Thu, 02 Sep 2021 03:35:51 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/alderlake: set power limits dynamically for thermal
by Sumeet R Pawnikar (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Furquan Shaikh, Sumeet R Pawnikar, Patrick Rudolph, EricR Lai, Karthik Ramasubramanian. Hello build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Patrick Rudolph, EricR Lai, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57035 to look at the new patch set (#9). Change subject: soc/intel/alderlake: set power limits dynamically for thermal ...................................................................... soc/intel/alderlake: set power limits dynamically for thermal Set power limit values dynamically based on CPU TDP and PCI ID of SKU. BUG=b:194745919 BRANCH=None TEST=Build FW and test on brya0 board Change-Id: Ic331a3debb076ef08a312a31edc1468974fd4902 Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar(a)intel.com> --- M src/soc/intel/alderlake/chip.h M src/soc/intel/alderlake/chipset.cb M src/soc/intel/alderlake/systemagent.c 3 files changed, 57 insertions(+), 33 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/57035/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/57035 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic331a3debb076ef08a312a31edc1468974fd4902 Gerrit-Change-Number: 57035 Gerrit-PatchSet: 9 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: amdfwtool: Detect the flag multilevel to decide the actual value
by Bao Zheng (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Paul Menzel, Zheng Bao. Bao Zheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57063 ) Change subject: amdfwtool: Detect the flag multilevel to decide the actual value ...................................................................... Patch Set 5: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/57063/comment/68322b28_479a3bff PS4, Line 9: define > defined Done https://review.coreboot.org/c/coreboot/+/57063/comment/3a68fdbe_d682514a PS4, Line 12: > How much space is saved? Done. This patch is the precedent of the one which really saves the spaces. So the details is going to be added there. -- To view, visit https://review.coreboot.org/c/coreboot/+/57063 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe8cdd5c14225899352b02bb19aae6059d56d428 Gerrit-Change-Number: 57063 Gerrit-PatchSet: 5 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Zheng Bao Gerrit-Comment-Date: Thu, 02 Sep 2021 03:30:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: amdfwtool: Remove some duplicate binaries/entries in PSP table
by Bao Zheng (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Martin Roth, Paul Menzel. Bao Zheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57064 ) Change subject: amdfwtool: Remove some duplicate binaries/entries in PSP table ...................................................................... Patch Set 6: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/57064/comment/1a7af108_4274c39a PS5, Line 9: these > Which ones exactly? Done https://review.coreboot.org/c/coreboot/+/57064/comment/255e62da_a3250211 PS5, Line 12: goint > going Done https://review.coreboot.org/c/coreboot/+/57064/comment/b67d1cb5_fff62013 PS5, Line 22: Issue > issue Done -- To view, visit https://review.coreboot.org/c/coreboot/+/57064 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia81b8a85792d1565445803100bdb01c3436e5698 Gerrit-Change-Number: 57064 Gerrit-PatchSet: 6 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Peers <epeers(a)google.com> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-CC: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-CC: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Thu, 02 Sep 2021 03:30:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: amdfwtool: Remove some duplicate binaries/entries in PSP table
by Bao Zheng (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Bao Zheng, Martin Roth. Hello build bot (Jenkins), Zheng Bao, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57064 to look at the new patch set (#6). Change subject: amdfwtool: Remove some duplicate binaries/entries in PSP table ...................................................................... amdfwtool: Remove some duplicate binaries/entries in PSP table Based on test on Cezanne, these duplicated FWs can be removed from level 1 entry. Take the Cezanne as the example, the entries and the sizes are listed below: --------------------------------------------------------- File name/Entry size --------------------------------------------------------- TypeId0x08_SmuFirmware_CZN.csbin 137104 TypeId0x12_SmuFirmware2_CZN.csbin 69440 TypeId0x3C_VbiosBootLoader_CZN.sbin 426528 TypeId0x45_SecurePolicyL1_CZN.sbin 22592 TypeId0x30_AgesaBootloaderU_CZN_LPDDR4.csbin 7016 TypeId0x64_Appb_CZN_1D_Lpddr4_Imem.csbin 22992 TypeId0x65_Appb_CZN_1D_Lpddr4_Dmem.csbin 18112 TypeId0x64_Appb_CZN_2D_Lpddr4_Imem.csbin 896 TypeId0x65_Appb_CZN_2D_Lpddr4_Dmem.csbin 832 APOB 0x10000 SHARED_MEM 0x8000 BIOS_BIN 14752 ---------------------------------------------------------- The recovery bootloader and other recovery issue is going to be handled in later other patch series. Please refer the previous change, https://review.coreboot.org/c/coreboot/+/57063 which can make the Picasso platform, which only has one level, not change. BUG=b:195329409 Test=Majolica (Cezanne) & Mandolin (Picasso) Also tested on Guybrush (Cezanne) in issue tracker 187103438. Change-Id: Ia81b8a85792d1565445803100bdb01c3436e5698 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.c 1 file changed, 15 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/57064/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/57064 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia81b8a85792d1565445803100bdb01c3436e5698 Gerrit-Change-Number: 57064 Gerrit-PatchSet: 6 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Peers <epeers(a)google.com> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-CC: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-CC: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: amdfwtool: Detect the flag multilevel to decide the actual value
by Bao Zheng (Code Review) 02 Sep '21

02 Sep '21

Attention is currently required from: Bao Zheng, Zheng Bao. Hello build bot (Jenkins), Zheng Bao, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57063 to look at the new patch set (#5). Change subject: amdfwtool: Detect the flag multilevel to decide the actual value ...................................................................... amdfwtool: Detect the flag multilevel to decide the actual value To save the space for FW, some of the FWs are going to be defined as LVL2 entries. To be compatible to "flattened" layout, we still drop the LVL2 entry to level1 if there is only one level. Change-Id: Ibe8cdd5c14225899352b02bb19aae6059d56d428 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.c 1 file changed, 16 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/57063/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/57063 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe8cdd5c14225899352b02bb19aae6059d56d428 Gerrit-Change-Number: 57063 Gerrit-PatchSet: 5 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-MessageType: newpatchset

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit September 2021