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Change subject: soc/intel/alderlake: Enable Irms UPD for ADL
......................................................................
soc/intel/alderlake: Enable Irms UPD for ADL
This change will set Irms config in FSP.
It will result VR TDC Input current to be
treated as it is root mean square.
BRANCH=None
TEST=Build and boot brya with debug FSP and verify Irms UPD value
from logs
Change-Id: Ice5c775ef9560503109957a1ed994af1d287aafc
Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com>
---
M src/soc/intel/alderlake/fsp_params.c
1 file changed, 3 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/56330/9
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Hello V Sowmya, build bot (Jenkins), Maulik V Vaghela, Tim Wawrzynczak, Subrata Banik, Sridhar Siricilla, Balaji Manigandan, Kane Chen, Srinidhi N Kaushik, Patrick Rudolph,
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Change subject: soc/intel/alderlake: Irms UPD enable
......................................................................
soc/intel/alderlake: Irms UPD enable
This change will set Irms config in FSP.
It will result VR TDC Input current to be
treated as it is root mean square.
BRANCH=None
TEST=Build and boot brya with debug FSP and verify Irms UPD value
from logs
Change-Id: Ice5c775ef9560503109957a1ed994af1d287aafc
Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com>
---
M src/soc/intel/alderlake/fsp_params.c
1 file changed, 3 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/56330/8
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Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/57296 )
Change subject: util/cbftool: Fix the bug in parsing Uefipayload with extended header
......................................................................
util/cbftool: Fix the bug in parsing Uefipayload with extended header
The patch is to fix "Not a usable UEFI firmware volume" issue when
creating CBFS/flash image. This issue is caused by adding FvNameGuid
in UefiPayloadEntry.fdf in EDKII. There is an ext header between header
of Fv and header of PayloadEntry in Fv with FvNameGuid. The ext header
causes the UefiPayloadEntry to be found incorrectly when parsing Fv.
Commit in EDKII: 4bac086e8e007c7143e33f87bb96238326d1d6ba
Bugzila: https://bugzilla.tianocore.org/show_bug.cgi?id=3585
Signed-off-by: Dun Tan <dun.tan(a)intel.com>
Change-Id: Id063efb1c8e6c7a96ec2182e87b71c7e8b7b6423
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57296
Reviewed-by: Ray Ni <ray.ni(a)intel.com>
Reviewed-by: King Sumo <kingsumos(a)gmail.com>
Reviewed-by: Patrick Rudolph <siro(a)das-labor.org>
Reviewed-by: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M util/cbfstool/cbfs-mkpayload.c
M util/cbfstool/fv.h
2 files changed, 12 insertions(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Patrick Rudolph: Looks good to me, approved
Patrick Rudolph: Looks good to me, but someone else must approve
King Sumo: Looks good to me, but someone else must approve
Ray Ni: Looks good to me, but someone else must approve
diff --git a/util/cbfstool/cbfs-mkpayload.c b/util/cbfstool/cbfs-mkpayload.c
index ae875f3..5341337 100644
--- a/util/cbfstool/cbfs-mkpayload.c
+++ b/util/cbfstool/cbfs-mkpayload.c
@@ -283,6 +283,7 @@
struct cbfs_payload_segment segs[2] = { {0} };
int doffset, len = 0;
firmware_volume_header_t *fv;
+ firmware_volume_ext_header_t *fvh_ext;
ffs_file_header_t *fh;
common_section_header_t *cs;
dos_header_t *dh;
@@ -305,6 +306,12 @@
}
fh = (ffs_file_header_t *)(input->data + fv->header_length);
+ if (fv->ext_header_offs != 0) {
+ fvh_ext = (firmware_volume_ext_header_t *)((uintptr_t)fv + fv->ext_header_offs);
+ fh = (ffs_file_header_t *)((uintptr_t)fvh_ext + fvh_ext->ext_header_size);
+ fh = (ffs_file_header_t *)(((uintptr_t)fh + 7) & ~7);
+ }
+
while (fh->file_type == FILETYPE_PAD) {
unsigned long offset = (fh->size[2] << 16) | (fh->size[1] << 8) | fh->size[0];
DEBUG("skipping %lu bytes of FV padding\n", offset);
diff --git a/util/cbfstool/fv.h b/util/cbfstool/fv.h
index 21bd89f..0ad650f 100644
--- a/util/cbfstool/fv.h
+++ b/util/cbfstool/fv.h
@@ -32,3 +32,8 @@
uint8_t size[3];
uint8_t section_type;
} common_section_header_t;
+
+typedef struct {
+ uint8_t guid[16];
+ uint32_t ext_header_size;
+} firmware_volume_ext_header_t;
--
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/57044
to look at the new patch set (#13).
Change subject: ec/starlabs/it8987: Fix build warning
......................................................................
ec/starlabs/it8987: Fix build warning
Fix build warning that the EC binary wasn't included, even when it
shouldn't be. This warning was shown on KBL, which has a separate
SPI for the EC.
Signed-off-by: Sean Rhodes <sean(a)starlabs.systems>
Change-Id: Id16881fd7901a2eaafc6108676ff429fb71c3571
---
M src/ec/starlabs/it8987/Makefile.inc
M src/ec/starlabs/it8987/ec.c
M src/ec/starlabs/it8987/ec.h
3 files changed, 41 insertions(+), 40 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/57044/13
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Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57044 )
Change subject: ec/starlabs/it8987: Fix build warning
......................................................................
Patch Set 12:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/57044/comment/b99cae10_5b1481dc
PS11, Line 9: Fix build warning when EC binary not included when it shouldn't be
> Please add dot/period at the end.
Done
https://review.coreboot.org/c/coreboot/+/57044/comment/c737c3a1_78c7f659
PS11, Line 10:
> What is the build warning?
The "coreboot has been built without the IT8987 EC Firmware..." in the Makefile.inc. It was showing for KBL, which has a separate SPI.
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Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57140 )
Change subject: soc/tigerlake: Make IO decode / enable register configurable
......................................................................
Patch Set 15:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/57140/comment/c586062e_bb0362b3
PS14, Line 9: Would allow
> This allows
Done
https://review.coreboot.org/c/coreboot/+/57140/comment/dde9bb64_5b24c133
PS14, Line 10: the same way that Skylake can be i.e. register "lpc_ioe"
> Dot/period at the end.
Done
File src/soc/intel/tigerlake/bootblock/pch.c:
https://review.coreboot.org/c/coreboot/+/57140/comment/7b4d1b87_84463236
PS14, Line 115: io_enables = config->lpc_ioe;
> Skylake has: […]
TGL has one 32bit register, previous SOCs had two separate 16bit registers.
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Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57173 )
Change subject: ec/starlabs/it8987: Add Kconfig option for EC binary
......................................................................
Patch Set 7:
(1 comment)
File src/ec/starlabs/it8987/Kconfig:
https://review.coreboot.org/c/coreboot/+/57173/comment/622c51ce_2404e9a9
PS6, Line 14: The EC binary
> Could you elaborate how to get the binary file?
Done
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Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57209 )
Change subject: soc/intel/adl: Drop SGPM, RGPM and EGPM methods
......................................................................
Patch Set 4:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/57209/comment/6fd437ab_72b2b9c2
PS3, Line 7: SGPM,RGPM
> Please add a space after the comma.
Done
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Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56926 )
Change subject: mb/google/brya: Fix Idle S0ix issue due to dynamic GPIO PM disabled
......................................................................
Patch Set 8:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/56926/comment/7e4ceaf1_a8eb0546
PS7, Line 9: GPIO PM was disabled for brya to evaluate if longer interrupt pulses
: are required for ADL.Since ADL requires 4us long pulses(EDS:626817),
: GPIO PM can be enabled.All devices currently tested on brya support 4us
: long pulses.This change drops the GPIO PM override and
: re-enables dynamic GPIO PM.
:
> Spaces after periods and before `(` please
Done
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